[AMDGPU] fixed underflow in getOccupancyWithNumVGPRs

[rampitec]

Summary

The function could return zero if an extreme number or
registers were used. Minimal possible occupancy is 1.

[arsenm]

Testcase?

[rampitec]

In D67771#1675523, @arsenm wrote:

Testcase?

Bug is trivial and testcase must be huge to hit this condition. You need to have thousands of spills for this.

[arsenm]

In D67771#1675524, @rampitec wrote:

In D67771#1675523, @arsenm wrote:

Testcase?

Bug is trivial and testcase must be huge to hit this condition. You need to have thousands of spills for this.

I don't see how the number of spills factors in, only the number of used VGPRs

[rampitec]

In D67771#1675537, @arsenm wrote:

In D67771#1675524, @rampitec wrote:

In D67771#1675523, @arsenm wrote:

Testcase?

Bug is trivial and testcase must be huge to hit this condition. You need to have thousands of spills for this.

I don't see how the number of spills factors in, only the number of used VGPRs

It happens in the scheduler. These are still virtual registers and there are no spills yet.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp

602 ↗

(On Diff #220893)

(Could also do getTotalNumVGPRs() + RoundedRegs - 1) / RoundedRegs

llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp

 }
 
 unsigned GCNSubtarget::getOccupancyWithNumVGPRs(unsigned VGPRs) const {
   unsigned MaxWaves = getMaxWavesPerEU();
   unsigned Granule = getVGPRAllocGranule();
   if (VGPRs < Granule)
     return MaxWaves;
   unsigned RoundedRegs = ((VGPRs + Granule - 1) / Granule) * Granule;
-  return std::min(getTotalNumVGPRs() / RoundedRegs, MaxWaves);
+  return std::min(std::max(getTotalNumVGPRs() / RoundedRegs, 1u), MaxWaves);
 }
 
 unsigned GCNSubtarget::getReservedNumSGPRs(const MachineFunction &MF) const {
   const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>();
   if (getGeneration() >= AMDGPUSubtarget::GFX10)
     return 2; // VCC. FLAT_SCRATCH and XNACK are no longer in SGPRs.
 
   if (MFI.hasFlatScratchInit()) {