[GlobalISel][AArch64] Check caller for swifterror params in tailcall eligibility

[paquette]

Summary

Before, we only checked the callee for swifterror. However, we should also be checking the caller to see if it has a swifterror parameter.

Since we don't currently handle outgoing arguments, this didn't show up in the swifterror.ll testcase. (It did show up when I started implementing outgoing arguments though.)

Also, remove the swifterror checks from call-translator-tail-call.ll, since they are covered by the existing swifterror testing. Better to have it all in one place.

[aemerson]

LGTM.

llvm/lib/Target/AArch64/AArch64CallLowering.cpp

500

extra newline.

llvm/lib/Target/AArch64/AArch64CallLowering.cpp

bool AArch64CallLowering::isEligibleForTailCallOptimization(
   // it?
   //
   // On Windows, "inreg" attributes signify non-aggregate indirect returns.
   // In this case, it is necessary to save/restore X0 in the callee. Tail
   // call opt interferes with this. So we disable tail call opt when the
   // caller has an argument with "inreg" attribute.
   //
   // FIXME: Check whether the callee also has an "inreg" argument.
+  //
+  // When the caller has a swifterror argument, we don't want to tail call
+  // because would have to move into the swifterror register before the
+  // tail
+  // call.
   if (any_of(CallerF.args(), [](const Argument &A) {
-        return A.hasByValAttr() || A.hasInRegAttr();
+        return A.hasByValAttr() || A.hasInRegAttr() || A.hasSwiftErrorAttr();
       })) {
-    LLVM_DEBUG(dbgs() << "... Cannot tail call from callers with byval or "
-                         "inreg arguments.\n");
+    LLVM_DEBUG(dbgs() << "... Cannot tail call from callers with byval, "
+                         "inreg, or swifterror arguments\n");
     return false;
   }
 
   // Externally-defined functions with weak linkage should not be
   // tail-called on AArch64 when the OS does not support dynamic
   // pre-emption of symbols, as the AAELF spec requires normal calls
   // to undefined weak functions to be replaced with a NOP or jump to the
   // next instruction. The behaviour of branch instructions in this

llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll

 define i32 @test_nonvoid_ret() {
   ; COMMON-LABEL: name: test_nonvoid_ret
   ; COMMON: bb.1 (%ir-block.0):
   ; COMMON:   TCRETURNdi @nonvoid_ret, 0, csr_aarch64_aapcs, implicit $sp
   %call = tail call i32 @nonvoid_ret()
   ret i32 %call
 }
 
-; Don't want to handle swifterror at all right now, since lowerCall will
-; insert a COPY after the call right now.
-; TODO: Support this.
-%swift_error = type {i64, i8}
-define float @swifterror(%swift_error** swifterror %ptr) {
-  ; COMMON-LABEL: name: swifterror
-  ; COMMON: bb.1 (%ir-block.0):
-  ; COMMON:   liveins: $x21
-  ; COMMON:   [[COPY:%[0-9]+]]:_(p0) = COPY $x21
-  ; COMMON:   [[COPY1:%[0-9]+]]:gpr64all = COPY [[COPY]](p0)
-  ; COMMON:   [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY1]]
-  ; COMMON:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
-  ; COMMON:   $x21 = COPY [[COPY2]](p0)
-  ; COMMON:   BL @swifterror, csr_aarch64_aapcs_swifterror, implicit-def $lr, implicit $sp, implicit $x21, implicit-def $s0, implicit-def $x21
-  ; COMMON:   [[COPY3:%[0-9]+]]:_(s32) = COPY $s0
-  ; COMMON:   [[COPY4:%[0-9]+]]:gpr64all = COPY $x21
-  ; COMMON:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
-  ; COMMON:   $s0 = COPY [[COPY3]](s32)
-  ; COMMON:   $x21 = COPY [[COPY4]]
-  ; COMMON:   RET_ReallyLR implicit $s0, implicit $x21
-  %call = tail call float @swifterror(%swift_error** swifterror %ptr)
-  ret float %call
-}
-
-define swiftcc float @swifterror_swiftcc(%swift_error** swifterror %ptr) {
-  ; COMMON-LABEL: name: swifterror_swiftcc
-  ; COMMON: bb.1 (%ir-block.0):
-  ; COMMON:   liveins: $x21
-  ; COMMON:   [[COPY:%[0-9]+]]:_(p0) = COPY $x21
-  ; COMMON:   [[COPY1:%[0-9]+]]:gpr64all = COPY [[COPY]](p0)
-  ; COMMON:   [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY1]]
-  ; COMMON:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
-  ; COMMON:   $x21 = COPY [[COPY2]](p0)
-  ; COMMON:   BL @swifterror_swiftcc, csr_aarch64_aapcs_swifterror, implicit-def $lr, implicit $sp, implicit $x21, implicit-def $s0, implicit-def $x21
-  ; COMMON:   [[COPY3:%[0-9]+]]:_(s32) = COPY $s0
-  ; COMMON:   [[COPY4:%[0-9]+]]:gpr64all = COPY $x21
-  ; COMMON:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
-  ; COMMON:   $s0 = COPY [[COPY3]](s32)
-  ; COMMON:   $x21 = COPY [[COPY4]]
-  ; COMMON:   RET_ReallyLR implicit $s0, implicit $x21
-  %call = tail call swiftcc float @swifterror_swiftcc(%swift_error** swifterror %ptr)
-  ret float %call
-}
-
 ; Right now, this should not be tail called.
 ; TODO: Support this.
 declare void @varargs(i32, double, i64, ...)
 define void @test_varargs() {
   ; COMMON-LABEL: name: test_varargs
   ; COMMON: bb.1 (%ir-block.0):
   ; COMMON:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
   ; COMMON:   [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00

llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll

 ; CHECK: bl _acallee
 
 define swiftcc void @tailcall_from_swifterror(%swift_error** swifterror %error_ptr_ref) {
 entry:
   tail call void @acallee(i8* null)
   ret void
 }
 
+; CHECK: tailcall_from_swifterror2
+; CHECK-NOT: b _simple_fn
+; CHECK: bl _simple_fn
+declare void @simple_fn()
+define swiftcc void @tailcall_from_swifterror2(%swift_error** swifterror %error_ptr_ref) {
+  tail call void @simple_fn()
+  ret void
+}
+
 declare swiftcc void @foo2(%swift_error** swifterror)
 ; CHECK-LABEL: testAssign
 ; CHECK: mov      x21, xzr
 ; CHECK: bl      _foo2
 ; CHECK: mov      x0, x21
 
 define swiftcc %swift_error* @testAssign(i8* %error_ref) {
 entry: