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[mips] Use less registers to load address of TargetExternalSymbol
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Authored by atanasyan on Aug 26 2019, 3:46 PM.

Details

Summary

There is no pattern matched add hi, (MipsLo texternalsym). As a result, loading an address of 32-bit symbol requires two registers and one more additional instruction:

addiu $1, $zero, %lo(foo)
lui   $2, %hi(foo)
addu  $25, $2, $1

This patch adds the missed pattern and enables generation more effective set of instructions:

lui   $1, %hi(foo)
addiu $25, $1, %lo(foo)

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Repository
rL LLVM

Event Timeline

atanasyan created this revision.Aug 26 2019, 3:46 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 26 2019, 3:46 PM
This revision is now accepted and ready to land.Aug 27 2019, 6:37 AM
This revision was automatically updated to reflect the committed changes.