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Differential D64807

AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC
ClosedPublic

Authored by nhaehnle on Jul 16 2019, 9:59 AM.

Details

Reviewers
rampitec
mareko
Commits
rG8b7041a5c6f0: AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC
rL366314: AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC
Summary

Change-Id: I854fbf7d48e937bef9f8f3f5d0c8aeb970652630

Diff Detail

Event Timeline

nhaehnle created this revision.Jul 16 2019, 9:59 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 16 2019, 9:59 AM
Herald added subscribers: t-tye, tpr, dstuttard and 5 others. · View Herald Transcript
Harbormaster completed remote builds in B35101: Diff 210129.Jul 16 2019, 9:59 AM
rampitec accepted this revision.Jul 16 2019, 10:02 AM

LGTM

This revision is now accepted and ready to land.Jul 16 2019, 10:02 AM
nhaehnle updated this revision to Diff 210131.Jul 16 2019, 10:31 AM

Add missing test changes

Harbormaster completed remote builds in B35102: Diff 210131.Jul 16 2019, 10:31 AM
Closed by commit rL366314: AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC (authored by nha). · Explain WhyJul 17 2019, 4:23 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
AMDGPU/
2 lines
test/
CodeGen/
AMDGPU/
14 lines

Diff 210129

lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Show First 20 Lines • Show All 914 Lines • ▼ Show 20 Linesbool GCNHazardRecognizer::fixVMEMtoScalarWriteHazards(MachineInstr *MI) {
auto IsHazardFn = [TRI, MI] (MachineInstr *I) { auto IsHazardFn = [TRI, MI] (MachineInstr *I) {
if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isDS(*I) && if (!SIInstrInfo::isVMEM(*I) && !SIInstrInfo::isDS(*I) &&
!SIInstrInfo::isFLAT(*I)) !SIInstrInfo::isFLAT(*I))
return false; return false;
for (const MachineOperand &Def : MI->defs()) { for (const MachineOperand &Def : MI->defs()) {
MachineOperand *Op = I->findRegisterUseOperand(Def.getReg(), false, TRI); MachineOperand *Op = I->findRegisterUseOperand(Def.getReg(), false, TRI);
if (!Op || (Op->isImplicit() && Op->getReg() == AMDGPU::EXEC)) if (!Op)
continue; continue;
return true; return true;
} }
return false; return false;
}; };
auto IsExpiredFn = [] (MachineInstr *MI, int) { auto IsExpiredFn = [] (MachineInstr *MI, int) {
return MI && (SIInstrInfo::isVALU(*MI) || return MI && (SIInstrInfo::isVALU(*MI) ||
▲ Show 20 Lines • Show All 477 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir

Show First 20 Lines • Show All 86 Lines • ▼ Show 20 Lines bb.0:
$sgpr4 = IMPLICIT_DEF $sgpr4 = IMPLICIT_DEF
$vgpr0 = IMPLICIT_DEF $vgpr0 = IMPLICIT_DEF
$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
S_WAITCNT 1 S_WAITCNT 1
$sgpr0 = S_MOV_B32 0 $sgpr0 = S_MOV_B32 0
... ...
# GCN-LABEL: name: vmem_write_exec_impread # GCN-LABEL: name: vmem_write_exec_impread
# GCN: BUFFER_LOAD_DWORD_OFFEN # GCN: BUFFER_LOAD_DWORD_OFFEN
# GCN: V_NOP
# GCN-NEXT: S_MOV_B64 # GCN-NEXT: S_MOV_B64
--- ---
name: vmem_write_exec_impread name: vmem_write_exec_impread
body: | body: |
bb.0: bb.0:
$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
$sgpr4 = IMPLICIT_DEF $sgpr4 = IMPLICIT_DEF
$vgpr0 = IMPLICIT_DEF $vgpr0 = IMPLICIT_DEF
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Lines bb.0:
$sgpr4 = IMPLICIT_DEF $sgpr4 = IMPLICIT_DEF
$vgpr0 = IMPLICIT_DEF $vgpr0 = IMPLICIT_DEF
$sgpr0 = S_MOV_B32 0 $sgpr0 = S_MOV_B32 0
bb.1: bb.1:
$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
S_BRANCH %bb.0 S_BRANCH %bb.0
... ...
# GCN-LABEL: name: ds_write_exec
# GCN: DS_WRITE_B32_gfx9
# GCN-NEXT: V_NOP
# GCN-NEXT: S_MOV_B32
---
name: ds_write_exec
body: |
bb.0:
$vgpr0 = IMPLICIT_DEF
$vgpr1 = IMPLICIT_DEF
DS_WRITE_B32_gfx9 $vgpr0, $vgpr1, 0, 0, implicit $exec
$exec_lo = S_MOV_B32 -1
...