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[ARM] Fix handling of zero offsets in LOB instructions.
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Authored by simon_tatham on Jun 27 2019, 2:49 AM.

Details

Summary

The BF and WLS/WLSTP instructions have various branch-offset fields
occupying different positions and lengths in the instruction encoding,
and all of them were decoded at disassembly time by the function
DecodeBFLabelOffset() which returned SoftFail if the offset was zero.

In fact, it's perfectly fine and not even a SoftFail for most of those
offset fields to be zero. The only one that can't be zero is the 4-bit
field labelled boff in the architecture spec, occupying bits {26-23}
of the BF instruction family. If that one is zero, the encoding
overlaps other instructions (WLS, DLS, LETP, VCTP), so it ought to be
a full Fail.

Fixed by adding an extra template parameter to DecodeBFLabelOffset
which controls whether a zero offset is accepted or rejected. Adjusted
existing tests (only in error messages for bad disassemblies); added
extra tests to demonstrate zero offsets being accepted in all the
right places, and a few demonstrating rejection of zero boff.

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Repository
rL LLVM

Event Timeline

simon_tatham created this revision.Jun 27 2019, 2:49 AM
This revision is now accepted and ready to land.Jun 27 2019, 3:43 AM
This revision was automatically updated to reflect the committed changes.