[RISCV] Allow parsing dot '.' in assembly

[JohnLLVM]

Summary

Useful for jumps, such as j ..

I am not sure who should review this. Do not hesitate to change the reviewers if needed.

[JohnLLVM]

Ping on this?

[lenary]

This looks good! It seems to match what other implementations do, so I'd be happy for this to land.

[lenary]

Ok, after further discussion, I'm not sure about the test coverage of this change.

1. The tests you've added should probably go with the other tests of the j instruction in llvm/test/MC/RISCV/rvi-aliases-valid.s (and should match the others in that file).
2. Please add a test of jalr %lo(.) to rv32i-valid.s. This will test that . can go in more complex places, and is not an instruction alias.
3. Please add a test to rv32i-aliases-invalid.s to test something like addi x1, . which will show what happens if someone provides . as an immediate somewhere that doesn't make sense.

[JohnLLVM]

Address feedback.

[JohnLLVM]

1. The tests you've added should probably go with the other tests of the j instruction in llvm/test/MC/RISCV/rvi-aliases-valid.s (and should match the others in that file).

Done. I have left a single one in the non-alias file, which I have reworked to not use an alias: this way, we also have an encoding test.

2. Please add a test of jalr %lo(.) to rv32i-valid.s. This will test that . can go in more complex places, and is not an instruction alias.

These advanced cases are not handled by this review (even j .+4 does not work). I intend to look at it after this review; currently, I am not sure how to proceed.

3. Please add a test to rv32i-aliases-invalid.s to test something like addi x1, . which will show what happens if someone provides . as an immediate somewhere that doesn't make sense.

Done.

[JohnLLVM]

llvm/test/MC/RISCV/rvi-aliases-valid.s

121

I am not sure if .Ltmp0 if robust enough for tests. If not, what should go here?

[jrtc27]

llvm/test/MC/RISCV/rvi-aliases-valid.s

121

You could do something like:

# CHECK-S-NOALIAS: [[LABEL:.L[[:alnum:]_]+]]:
# CHECK-S-NOALIAS-NEXT: jal zero, [[LABEL]]
# CHECK-S: [[LABEL:.L[[:alnum:]_]+]]:
# CHECK-S-NEXT: j [[LABEL]]

[lenary]

If you make the test change suggested by @jrtc27, I'm happy for this to land.

[JohnLLVM]

Feedback from @jrtc27.

[JohnLLVM]

Feedback from @jrtc27.

[JohnLLVM]

@jrtc27: done, thanks!

@lenary: done. I do not have commit rights, so I cannot land it myself.

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

OperandMatchResultTy RISCVAsmParser::parseImmediate(OperandVector &Operands) {
   SMLoc S = getLoc();
   SMLoc E = SMLoc::getFromPointer(S.getPointer() - 1);
   const MCExpr *Res;
 
   switch (getLexer().getKind()) {
   default:
     return MatchOperand_NoMatch;
   case AsmToken::LParen:
+  case AsmToken::Dot:
   case AsmToken::Minus:
   case AsmToken::Plus:
   case AsmToken::Exclaim:
   case AsmToken::Tilde:
   case AsmToken::Integer:
   case AsmToken::String:
   case AsmToken::Identifier:
     if (getParser().parseExpression(Res))

llvm/test/MC/RISCV/rv32i-aliases-invalid.s

 sll x2, x3, 32  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 srl x2, x3, 32  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 sra x2, x3, 32  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 
 sll x2, x3, -1  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 srl x2, x3, -2  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 sra x2, x3, -3  # CHECK: :[[@LINE]]:13: error: immediate must be an integer in the range [0, 31]
 
+addi x1, .      # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
+
 foo:
   .space 4

llvm/test/MC/RISCV/rv32i-valid.s

 # CHECK-ASM: encoding: [0x6f,0x05,0xe0,0x01]
 jal a0, CONST
 # CHECK-ASM-AND-OBJ: jal s0, 0
 # CHECK-ASM: encoding: [0x6f,0x04,0x00,0x00]
 jal s0, (0)
 # CHECK-ASM-AND-OBJ: jal s0, 156
 # CHECK-ASM: encoding: [0x6f,0x04,0xc0,0x09]
 jal s0, (0xff-99)
+# CHECK-ASM: encoding: [0x6f,0bAAAA0000,A,A]
+# CHECK-OBJ: jal zero, 0
+jal zero, .
 
 # CHECK-ASM-AND-OBJ: jalr a0, a1, -2048
 # CHECK-ASM: encoding: [0x67,0x85,0x05,0x80]
 jalr a0, a1, -2048
 # CHECK-ASM-AND-OBJ: jalr a0, a1, -2048
 # CHECK-ASM: encoding: [0x67,0x85,0x05,0x80]
 jalr a0, a1, ~2047
 # CHECK-ASM-AND-OBJ: jalr a0, a1, 0

llvm/test/MC/RISCV/rvi-aliases-valid.s

 # CHECK-OBJ: R_RISCV_JAL foo
 j foo
 # CHECK-S-NOALIAS: jal zero, a0
 # CHECK-S: j a0
 # CHECK-OBJ-NOALIAS: jal zero, 0
 # CHECK-OBJ: j 0
 # CHECK-OBJ: R_RISCV_JAL a0
 j a0
+# CHECK-S-NOALIAS: jal zero, .Ltmp0
+# CHECK-S: j .Ltmp0
+# CHECK-OBJ-NOALIAS: jal zero, 0
+# CHECK-OBJ: j 0
+j .
 # CHECK-S-OBJ-NOALIAS: jal ra, 2040
 # CHECK-S-OBJ: jal 2040
 jal 2040
 # CHECK-S-NOALIAS: jal ra, foo
 # CHECK-S: jal foo
 # CHECK-OBJ-NOALIAS: jal ra, 0
 # CHECK-OBJ: jal 0
 # CHECK-OBJ: R_RISCV_JAL foo