[RISCV] Allow parsing dot '.' in assembly

[JohnLLVM]

Summary

Useful for jumps, such as j ..

I am not sure who should review this. Do not hesitate to change the reviewers if needed.

[JohnLLVM]

Ping on this?

[lenary]

This looks good! It seems to match what other implementations do, so I'd be happy for this to land.

[lenary]

Ok, after further discussion, I'm not sure about the test coverage of this change.

1. The tests you've added should probably go with the other tests of the j instruction in llvm/test/MC/RISCV/rvi-aliases-valid.s (and should match the others in that file).
2. Please add a test of jalr %lo(.) to rv32i-valid.s. This will test that . can go in more complex places, and is not an instruction alias.
3. Please add a test to rv32i-aliases-invalid.s to test something like addi x1, . which will show what happens if someone provides . as an immediate somewhere that doesn't make sense.

[JohnLLVM]

Address feedback.

[JohnLLVM]

1. The tests you've added should probably go with the other tests of the j instruction in llvm/test/MC/RISCV/rvi-aliases-valid.s (and should match the others in that file).

Done. I have left a single one in the non-alias file, which I have reworked to not use an alias: this way, we also have an encoding test.

2. Please add a test of jalr %lo(.) to rv32i-valid.s. This will test that . can go in more complex places, and is not an instruction alias.

These advanced cases are not handled by this review (even j .+4 does not work). I intend to look at it after this review; currently, I am not sure how to proceed.

3. Please add a test to rv32i-aliases-invalid.s to test something like addi x1, . which will show what happens if someone provides . as an immediate somewhere that doesn't make sense.

Done.

[JohnLLVM]

llvm/test/MC/RISCV/rvi-aliases-valid.s

121 ↗

(On Diff #208504)

I am not sure if .Ltmp0 if robust enough for tests. If not, what should go here?

[jrtc27]

llvm/test/MC/RISCV/rvi-aliases-valid.s

121 ↗

(On Diff #208504)

You could do something like:

# CHECK-S-NOALIAS: [[LABEL:.L[[:alnum:]_]+]]:
# CHECK-S-NOALIAS-NEXT: jal zero, [[LABEL]]
# CHECK-S: [[LABEL:.L[[:alnum:]_]+]]:
# CHECK-S-NEXT: j [[LABEL]]

[lenary]

If you make the test change suggested by @jrtc27, I'm happy for this to land.

[JohnLLVM]

Feedback from @jrtc27.

[JohnLLVM]

Feedback from @jrtc27.

[JohnLLVM]

@jrtc27: done, thanks!

@lenary: done. I do not have commit rights, so I cannot land it myself.

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

OperandMatchResultTy RISCVAsmParser::parseImmediate(OperandVector &Operands) {
   SMLoc S = getLoc();
   SMLoc E = SMLoc::getFromPointer(S.getPointer() - 1);
   const MCExpr *Res;
 
   switch (getLexer().getKind()) {
   default:
     return MatchOperand_NoMatch;
   case AsmToken::LParen:
+  case AsmToken::Dot:
   case AsmToken::Minus:
   case AsmToken::Plus:
   case AsmToken::Exclaim:
   case AsmToken::Tilde:
   case AsmToken::Integer:
   case AsmToken::String:
   case AsmToken::Identifier:
     if (getParser().parseExpression(Res))

llvm/test/MC/RISCV/rv32i-valid.s

 # CHECK-ASM: encoding: [0x17,0bAAAA0101,A,A]
 # CHECK-OBJ: auipc a0, 0
 # CHECK-OBJ: R_RISCV_PCREL_HI20 foo
 auipc a0, %pcrel_hi(foo)
 # CHECK-ASM-AND-OBJ: auipc a0, 30
 # CHECK-ASM: encoding: [0x17,0xe5,0x01,0x00]
 auipc a0, CONST
 
+# CHECK-ASM: encoding: [0x6f,0bAAAA0000,A,A]
+# CHECK-OBJ: jal zero, 0
+dummy_jump_label:
+j dummy_jump_label
+# CHECK-ASM: encoding: [0x6f,0bAAAA0000,A,A]
+# CHECK-OBJ: jal zero, 0
+j .
+
 # CHECK-ASM-AND-OBJ: jal a2, 1048574
 # CHECK-ASM: encoding: [0x6f,0xf6,0xff,0x7f]
 jal a2, 1048574
 # CHECK-ASM-AND-OBJ: jal a3, 256
 # CHECK-ASM: encoding: [0xef,0x06,0x00,0x10]
 jal a3, 256
 # CHECK-ASM: jal a0, foo
 # CHECK-ASM: encoding: [0x6f,0bAAAA0101,A,A]