[WebAssembly] Fix p2align in assembler.

[aardappel]

Summary

• Match the syntax output by InstPrinter.
• Fix it always emitting 0 for align. Had to work around fact that opcode is not available for GetDefaultP2Align while parsing.
• Updated tests that were erroneously happy with a p2align=0

Fixes https://bugs.llvm.org/show_bug.cgi?id=40752

[sbc100]

Nice!

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

717

Does llvm style allow this? clang-format?

Is there some way we can tell if an opcode requires alignment? Calling GetDefaultP2AlignAny and checking for -1 seems bit hacky. Assuming I understand what happing I think this code would be more readable as:

if (requiresAlignment() && !hasAlignment) {
  setImm(getDefaultAlign())
}

[aardappel]

clang-format

[aardappel]

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

717

Clang-formatted.
It is mildly-hacky, but I didn't want to duplicate the gigantic switch in GetDefaultP2AlignAny. Right now GetDefaultP2AlignAny is the source of truth for alignment in one place, which is also kinda nice.

[aheejin]

Thanks!

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

Can atomic operations take p2align? Looks like alignments for atomic instructions are predefined.

[sbc100]

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

717

On I didn't see that we have already calculated IsLoadStore.. can we just use that?

[aardappel]

Atomics only use default alignment.

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

They are still stored in the encoding, and the tablegen def doesn't seem to make a difference between atomic and normal loads as to wether p2align can be changed, but yeah, the spec seems to indicate they are fixed. I can force atomics to use natural alignment for now.

717

IsLoadStore is a bit of a hack that I would prefer to remove, rather than rely more on. I'd also have the get the instruction name in MatchAndEmitInstruction and repeat the same parsing there, so I think that will make the code generally worse.

[aheejin]

LGTM, as long as @sbc100 is ok

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

You're right, we don't distinguish it in Tablegen... maybe we should.

[aardappel]

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

Well, I presume they're in the encoding because we want to be able to relax the fixed alignment later.. if these instructions alignment is meant to be always fixed, they shouldn't be in the encoding.

[aheejin]

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

What do you mean by encoding, you mean TableGen? I wrote that and I just copy-pasted that from normal memory instruction :$

[aardappel]

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

351–352

I mean the actual encoded bytes in the binary format.

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

Operands.push_back(make_unique<WebAssemblyOperand>(
         WebAssemblyOperand::IntOp{Val}));
     Parser.Lex();
   }
 
   bool parseOperandStartingWithInteger(bool IsNegative, OperandVector &Operands,
                                        StringRef InstName) {
     parseSingleInteger(IsNegative, Operands);
     // FIXME: there is probably a cleaner way to do this.
     auto IsLoadStore = InstName.startswith("load") ||
-                       InstName.startswith("store") ||
-                       InstName.startswith("atomic");
-    if (IsLoadStore) {
-      // Parse load/store operands of the form: offset align
-      auto &Offset = Lexer.getTok();
-      if (Offset.is(AsmToken::Integer)) {
+                       InstName.startswith("store");
+    auto IsAtomic = InstName.startswith("atomic");
+    if (IsLoadStore || IsAtomic) {
+      // Parse load/store operands of the form: offset:p2align=align
+      if (IsLoadStore && isNext(AsmToken::Colon)) {
+        auto Id = expectIdent();
+        if (Id != "p2align")
+          return error("Expected p2align, instead got: " + Id);
+        if (expect(AsmToken::Equal, "="))
+          return true;
+        if (!Lexer.is(AsmToken::Integer))
+          return error("Expected integer constant");
         parseSingleInteger(false, Operands);
       } else {
-        // Alignment not specified.
-        // FIXME: correctly derive a default from the instruction.
+        // Alignment not specified (or atomics, must use default alignment).
         // We can't just call WebAssembly::GetDefaultP2Align since we don't have
-        // an opcode until after the assembly matcher.
+        // an opcode until after the assembly matcher, so set a default to fix
+        // up later.
+        auto Tok = Lexer.getTok();
         Operands.push_back(make_unique<WebAssemblyOperand>(
-            WebAssemblyOperand::Integer, Offset.getLoc(), Offset.getEndLoc(),
-            WebAssemblyOperand::IntOp{0}));
+            WebAssemblyOperand::Integer, Tok.getLoc(), Tok.getEndLoc(),
+            WebAssemblyOperand::IntOp{-1}));
       }
     }
     return false;
   }
 
   void addBlockTypeOperand(OperandVector &Operands, SMLoc NameLoc,
                            WebAssembly::ExprType BT) {
     Operands.push_back(make_unique<WebAssemblyOperand>(
case Match_Success: {
         // This is the first instruction in a function, but we haven't seen
         // a .local directive yet. The streamer requires locals to be encoded
         // as a prelude to the instructions, so emit an empty list of locals
         // here.
         auto &TOut = reinterpret_cast<WebAssemblyTargetStreamer &>(
             *Out.getTargetStreamer());
         TOut.emitLocal(SmallVector<wasm::ValType, 0>());
       }
+      // Fix unknown p2align operands.
+      auto Align = WebAssembly::GetDefaultP2AlignAny(Inst.getOpcode());
+      if (Align != -1U) {
+        auto &Op0 = Inst.getOperand(0);
+        if (Op0.getImm() == -1)
+          Op0.setImm(Align);
+      }
       Out.EmitInstruction(Inst, getSTI());
       if (CurrentState == EndFunction) {
         onEndOfFunction();
       } else {
         CurrentState = Instructions;
       }
       return false;
     }

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

 //
 #define GET_INSTRINFO_ENUM
 #include "WebAssemblyGenInstrInfo.inc"
 
 namespace llvm {
 namespace WebAssembly {
 
 /// Return the default p2align value for a load or store with the given opcode.
-inline unsigned GetDefaultP2Align(unsigned Opcode) {
+inline unsigned GetDefaultP2AlignAny(unsigned Opcode) {
   switch (Opcode) {
   case WebAssembly::LOAD8_S_I32:
   case WebAssembly::LOAD8_S_I32_S:
   case WebAssembly::LOAD8_U_I32:
   case WebAssembly::LOAD8_U_I32_S:
   case WebAssembly::LOAD8_S_I64:
   case WebAssembly::LOAD8_S_I64_S:
   case WebAssembly::LOAD8_U_I64:
inline unsigned GetDefaultP2AlignAny(unsigned Opcode) {
   case WebAssembly::STORE_v2i64:
   case WebAssembly::STORE_v2i64_S:
   case WebAssembly::STORE_v4f32:
   case WebAssembly::STORE_v4f32_S:
   case WebAssembly::STORE_v2f64:
   case WebAssembly::STORE_v2f64_S:
     return 4;
   default:
+    return -1;
+  }
+}
+
+inline unsigned GetDefaultP2Align(unsigned Opcode) {
+  auto Align = GetDefaultP2AlignAny(Opcode);
+  if (Align == -1U) {
     llvm_unreachable("Only loads and stores have p2align values");
   }
+  return Align;
 }
 
 /// This is used to indicate block signatures.
 enum class ExprType : unsigned {
   Void = 0x40,
   I32 = 0x7F,
   I64 = 0x7E,
   F32 = 0x7D,

test/MC/WebAssembly/atomics-encodings.s

 # RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+atomics < %s | FileCheck %s
 
 main:
   .functype main () -> ()
 
   # FIXME This doesn't work because of PR40728. Enable this once it's fixed.
-  # C HECK:  atomic.notify 0:p2align=0 # encoding: [0xfe,0x00,0x00,0x00]
+  # C HECK:  atomic.notify 0 # encoding: [0xfe,0x00,0x00,0x00]
   # atomic.notify 0
-  # CHECK:  i32.atomic.wait 0:p2align=0 # encoding: [0xfe,0x01,0x00,0x00]
+  # CHECK:  i32.atomic.wait 0 # encoding: [0xfe,0x01,0x02,0x00]
   i32.atomic.wait 0
-  # CHECK:  i64.atomic.wait 0:p2align=0 # encoding: [0xfe,0x02,0x00,0x00]
+  # CHECK:  i64.atomic.wait 0 # encoding: [0xfe,0x02,0x03,0x00]
   i64.atomic.wait 0
 
-  # CHECK: i32.atomic.load 0:p2align=0 # encoding: [0xfe,0x10,0x00,0x00]
+  # CHECK: i32.atomic.load 0 # encoding: [0xfe,0x10,0x02,0x00]
   i32.atomic.load 0
-  # CHECK: i64.atomic.load 4:p2align=0 # encoding: [0xfe,0x11,0x00,0x04]
+  # CHECK: i64.atomic.load 4 # encoding: [0xfe,0x11,0x03,0x04]
   i64.atomic.load 4
   # CHECK:  i32.atomic.load8_u 48 # encoding: [0xfe,0x12,0x00,0x30]
   i32.atomic.load8_u 48
-  # CHECK:  i32.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x13,0x00,0x00]
+  # CHECK:  i32.atomic.load16_u 0 # encoding: [0xfe,0x13,0x01,0x00]
   i32.atomic.load16_u 0
   # CHECK:  i64.atomic.load8_u 0 # encoding: [0xfe,0x14,0x00,0x00]
   i64.atomic.load8_u 0
-  # CHECK:  i64.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x15,0x00,0x00]
+  # CHECK:  i64.atomic.load16_u 0 # encoding: [0xfe,0x15,0x01,0x00]
   i64.atomic.load16_u 0
-  # CHECK:  i64.atomic.load32_u 0:p2align=0 # encoding: [0xfe,0x16,0x00,0x00]
+  # CHECK:  i64.atomic.load32_u 0 # encoding: [0xfe,0x16,0x02,0x00]
   i64.atomic.load32_u 0
 
-  # CHECK:  i32.atomic.store 0:p2align=0 # encoding: [0xfe,0x17,0x00,0x00]
+  # CHECK:  i32.atomic.store 0 # encoding: [0xfe,0x17,0x02,0x00]
   i32.atomic.store 0
-  # CHECK:  i64.atomic.store 8:p2align=0 # encoding: [0xfe,0x18,0x00,0x08]
+  # CHECK:  i64.atomic.store 8 # encoding: [0xfe,0x18,0x03,0x08]
   i64.atomic.store 8
   # CHECK:  i32.atomic.store8 0 # encoding: [0xfe,0x19,0x00,0x00]
   i32.atomic.store8 0
-  # CHECK:  i32.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1a,0x00,0x00]
+  # CHECK:  i32.atomic.store16 0 # encoding: [0xfe,0x1a,0x01,0x00]
   i32.atomic.store16 0
   # CHECK:  i64.atomic.store8 16 # encoding: [0xfe,0x1b,0x00,0x10]
   i64.atomic.store8 16
-  # CHECK:  i64.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1c,0x00,0x00]
+  # CHECK:  i64.atomic.store16 0 # encoding: [0xfe,0x1c,0x01,0x00]
   i64.atomic.store16 0
-  # CHECK:  i64.atomic.store32 0:p2align=0 # encoding: [0xfe,0x1d,0x00,0x00]
+  # CHECK:  i64.atomic.store32 0 # encoding: [0xfe,0x1d,0x02,0x00]
   i64.atomic.store32 0
 
-  # CHECK:  i32.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1e,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.add 0 # encoding: [0xfe,0x1e,0x02,0x00]
   i32.atomic.rmw.add 0
-  # CHECK:  i64.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1f,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.add 0 # encoding: [0xfe,0x1f,0x03,0x00]
   i64.atomic.rmw.add 0
   # CHECK:  i32.atomic.rmw8.add_u 0 # encoding: [0xfe,0x20,0x00,0x00]
   i32.atomic.rmw8.add_u 0
-  # CHECK:  i32.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x21,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.add_u 0 # encoding: [0xfe,0x21,0x01,0x00]
   i32.atomic.rmw16.add_u 0
   # CHECK:  i64.atomic.rmw8.add_u 0 # encoding: [0xfe,0x22,0x00,0x00]
   i64.atomic.rmw8.add_u 0
-  # CHECK:  i64.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x23,0x00,0x00]
+  # CHECK:  i64.atomic.rmw16.add_u 0 # encoding: [0xfe,0x23,0x01,0x00]
   i64.atomic.rmw16.add_u 0
-  # CHECK:  i64.atomic.rmw32.add_u 16:p2align=0 # encoding: [0xfe,0x24,0x00,0x10]
+  # CHECK:  i64.atomic.rmw32.add_u 16 # encoding: [0xfe,0x24,0x02,0x10]
   i64.atomic.rmw32.add_u 16
 
-  # CHECK:  i32.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x25,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.sub 0 # encoding: [0xfe,0x25,0x02,0x00]
   i32.atomic.rmw.sub 0
-  # CHECK:  i64.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x26,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.sub 0 # encoding: [0xfe,0x26,0x03,0x00]
   i64.atomic.rmw.sub 0
   # CHECK:  i32.atomic.rmw8.sub_u 0 # encoding: [0xfe,0x27,0x00,0x00]
   i32.atomic.rmw8.sub_u 0
-  # CHECK:  i32.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x28,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.sub_u 0 # encoding: [0xfe,0x28,0x01,0x00]
   i32.atomic.rmw16.sub_u 0
   # CHECK:  i64.atomic.rmw8.sub_u 8 # encoding: [0xfe,0x29,0x00,0x08]
   i64.atomic.rmw8.sub_u 8
-  # CHECK:  i64.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x2a,0x00,0x00]
+  # CHECK:  i64.atomic.rmw16.sub_u 0 # encoding: [0xfe,0x2a,0x01,0x00]
   i64.atomic.rmw16.sub_u 0
-  # CHECK:  i64.atomic.rmw32.sub_u 0:p2align=0 # encoding: [0xfe,0x2b,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.sub_u 0 # encoding: [0xfe,0x2b,0x02,0x00]
   i64.atomic.rmw32.sub_u 0
 
-  # CHECK:  i32.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2c,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.and 0 # encoding: [0xfe,0x2c,0x02,0x00]
   i32.atomic.rmw.and 0
-  # CHECK:  i64.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2d,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.and 0 # encoding: [0xfe,0x2d,0x03,0x00]
   i64.atomic.rmw.and 0
   # CHECK:  i32.atomic.rmw8.and_u 0 # encoding: [0xfe,0x2e,0x00,0x00]
   i32.atomic.rmw8.and_u 0
-  # CHECK:  i32.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x2f,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.and_u 0 # encoding: [0xfe,0x2f,0x01,0x00]
   i32.atomic.rmw16.and_u 0
   # CHECK:  i64.atomic.rmw8.and_u 96 # encoding: [0xfe,0x30,0x00,0x60]
   i64.atomic.rmw8.and_u 96
-  # CHECK:  i64.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x31,0x00,0x00]
+  # CHECK:  i64.atomic.rmw16.and_u 0 # encoding: [0xfe,0x31,0x01,0x00]
   i64.atomic.rmw16.and_u 0
-  # CHECK:  i64.atomic.rmw32.and_u 0:p2align=0 # encoding: [0xfe,0x32,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.and_u 0 # encoding: [0xfe,0x32,0x02,0x00]
   i64.atomic.rmw32.and_u 0
 
-  # CHECK:  i32.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x33,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.or 0 # encoding: [0xfe,0x33,0x02,0x00]
   i32.atomic.rmw.or 0
-  # CHECK:  i64.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x34,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.or 0 # encoding: [0xfe,0x34,0x03,0x00]
   i64.atomic.rmw.or 0
   # CHECK:  i32.atomic.rmw8.or_u 0 # encoding: [0xfe,0x35,0x00,0x00]
   i32.atomic.rmw8.or_u 0
-  # CHECK:  i32.atomic.rmw16.or_u 0:p2align=0 # encoding: [0xfe,0x36,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.or_u 0 # encoding: [0xfe,0x36,0x01,0x00]
   i32.atomic.rmw16.or_u 0
   # CHECK:  i64.atomic.rmw8.or_u 0 # encoding: [0xfe,0x37,0x00,0x00]
   i64.atomic.rmw8.or_u 0
-  # CHECK:  i64.atomic.rmw16.or_u 48:p2align=0 # encoding: [0xfe,0x38,0x00,0x30]
+  # CHECK:  i64.atomic.rmw16.or_u 48 # encoding: [0xfe,0x38,0x01,0x30]
   i64.atomic.rmw16.or_u 48
-  # CHECK:  i64.atomic.rmw32.or_u 0:p2align=0 # encoding: [0xfe,0x39,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.or_u 0 # encoding: [0xfe,0x39,0x02,0x00]
   i64.atomic.rmw32.or_u 0
 
-  # CHECK:  i32.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3a,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.xor 0 # encoding: [0xfe,0x3a,0x02,0x00]
   i32.atomic.rmw.xor 0
-  # CHECK:  i64.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3b,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.xor 0 # encoding: [0xfe,0x3b,0x03,0x00]
   i64.atomic.rmw.xor 0
   # CHECK:  i32.atomic.rmw8.xor_u 4 # encoding: [0xfe,0x3c,0x00,0x04]
   i32.atomic.rmw8.xor_u 4
-  # CHECK:  i32.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3d,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.xor_u 0 # encoding: [0xfe,0x3d,0x01,0x00]
   i32.atomic.rmw16.xor_u 0
   # CHECK:  i64.atomic.rmw8.xor_u 0 # encoding: [0xfe,0x3e,0x00,0x00]
   i64.atomic.rmw8.xor_u 0
-  # CHECK:  i64.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3f,0x00,0x00]
+  # CHECK:  i64.atomic.rmw16.xor_u 0 # encoding: [0xfe,0x3f,0x01,0x00]
   i64.atomic.rmw16.xor_u 0
-  # CHECK:  i64.atomic.rmw32.xor_u 0:p2align=0 # encoding: [0xfe,0x40,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.xor_u 0 # encoding: [0xfe,0x40,0x02,0x00]
   i64.atomic.rmw32.xor_u 0
 
-  # CHECK:  i32.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x41,0x00,0x00]
+  # CHECK:  i32.atomic.rmw.xchg 0 # encoding: [0xfe,0x41,0x02,0x00]
   i32.atomic.rmw.xchg 0
-  # CHECK:  i64.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x42,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.xchg 0 # encoding: [0xfe,0x42,0x03,0x00]
   i64.atomic.rmw.xchg 0
   # CHECK:  i32.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x43,0x00,0x00]
   i32.atomic.rmw8.xchg_u 0
-  # CHECK:  i32.atomic.rmw16.xchg_u 0:p2align=0 # encoding: [0xfe,0x44,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.xchg_u 0 # encoding: [0xfe,0x44,0x01,0x00]
   i32.atomic.rmw16.xchg_u 0
   # CHECK:  i64.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x45,0x00,0x00]
   i64.atomic.rmw8.xchg_u 0
-  # CHECK:  i64.atomic.rmw16.xchg_u 8:p2align=0 # encoding: [0xfe,0x46,0x00,0x08]
+  # CHECK:  i64.atomic.rmw16.xchg_u 8 # encoding: [0xfe,0x46,0x01,0x08]
   i64.atomic.rmw16.xchg_u 8
-  # CHECK:  i64.atomic.rmw32.xchg_u 0:p2align=0 # encoding: [0xfe,0x47,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.xchg_u 0 # encoding: [0xfe,0x47,0x02,0x00]
   i64.atomic.rmw32.xchg_u 0
 
-  # CHECK:  i32.atomic.rmw.cmpxchg 32:p2align=0 # encoding: [0xfe,0x48,0x00,0x20]
+  # CHECK:  i32.atomic.rmw.cmpxchg 32 # encoding: [0xfe,0x48,0x02,0x20]
   i32.atomic.rmw.cmpxchg 32
-  # CHECK:  i64.atomic.rmw.cmpxchg 0:p2align=0 # encoding: [0xfe,0x49,0x00,0x00]
+  # CHECK:  i64.atomic.rmw.cmpxchg 0 # encoding: [0xfe,0x49,0x03,0x00]
   i64.atomic.rmw.cmpxchg 0
   # CHECK:  i32.atomic.rmw8.cmpxchg_u 0 # encoding: [0xfe,0x4a,0x00,0x00]
   i32.atomic.rmw8.cmpxchg_u 0
-  # CHECK:  i32.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4b,0x00,0x00]
+  # CHECK:  i32.atomic.rmw16.cmpxchg_u 0 # encoding: [0xfe,0x4b,0x01,0x00]
   i32.atomic.rmw16.cmpxchg_u 0
   # CHECK:  i64.atomic.rmw8.cmpxchg_u 16 # encoding: [0xfe,0x4c,0x00,0x10]
   i64.atomic.rmw8.cmpxchg_u 16
-  # CHECK:  i64.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4d,0x00,0x00]
+  # CHECK:  i64.atomic.rmw16.cmpxchg_u 0 # encoding: [0xfe,0x4d,0x01,0x00]
   i64.atomic.rmw16.cmpxchg_u 0
-  # CHECK:  i64.atomic.rmw32.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4e,0x00,0x00]
+  # CHECK:  i64.atomic.rmw32.cmpxchg_u 0 # encoding: [0xfe,0x4e,0x02,0x00]
   i64.atomic.rmw32.cmpxchg_u 0
 
   end_function

test/MC/WebAssembly/basic-assembly.s

test0:
     local.set   2
     # Immediates:
     i32.const   -1
     f64.const   0x1.999999999999ap1
     v128.const  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
     v128.const  0, 1, 2, 3, 4, 5, 6, 7
     # Indirect addressing:
     local.get   0
-    f64.store   0
+    f64.store   1234:p2align=4
+    f64.store   1234     # Natural alignment (3)
     # Loops, conditionals, binary ops, calls etc:
     block       i32
     i32.const   1
     local.get   0
     i32.ge_s
     br_if       0        # 0: down to label0
 .LBB0_1:
     loop        i32      # label1:

 # CHECK-NEXT:      .local      f32, f64
 # CHECK-NEXT:      local.get   2
 # CHECK-NEXT:      local.set   2
 # CHECK-NEXT:      i32.const   -1
 # CHECK-NEXT:      f64.const   0x1.999999999999ap1
 # CHECK-NEXT:      v128.const  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
 # CHECK-NEXT:      v128.const  0, 1, 2, 3, 4, 5, 6, 7
 # CHECK-NEXT:      local.get   0
-# CHECK-NEXT:      f64.store   0:p2align=0
+# CHECK-NEXT:      f64.store   1234:p2align=4
+# CHECK-NEXT:      f64.store   1234
 # CHECK-NEXT:      block       i32
 # CHECK-NEXT:      i32.const   1
 # CHECK-NEXT:      local.get   0
 # CHECK-NEXT:      i32.ge_s
 # CHECK-NEXT:      br_if 0            # 0: down to label0
 # CHECK-NEXT:  .LBB0_1:
 # CHECK-NEXT:      loop        i32         # label1:
 # CHECK-NEXT:      call        something1

test/MC/WebAssembly/reloc-pic.s

 # CHECK-NEXT:         Index:           8
 # CHECK-NEXT:         Offset:          0x0000002C
 # CHECK-NEXT:       - Type:            R_WASM_TABLE_INDEX_REL_SLEB
 # CHECK-NEXT:         Index:           9
 # CHECK-NEXT:         Offset:          0x00000032
 # CHECK-NEXT:     Functions:
 # CHECK-NEXT:       - Index:           1
 # CHECK-NEXT:         Locals:          []
-# CHECK-NEXT:         Body:            2380808080002800000B
+# CHECK-NEXT:         Body:            2380808080002802000B
 # CHECK-NEXT:       - Index:           2
 # CHECK-NEXT:         Locals:          []
-# CHECK-NEXT:         Body:            2381808080002800000B
+# CHECK-NEXT:         Body:            2381808080002802000B
 # CHECK-NEXT:       - Index:           3
 # CHECK-NEXT:         Locals:          []
 # CHECK-NEXT:         Body:            2380808080004180808080006A0B
 # CHECK-NEXT:       - Index:           4
 # CHECK-NEXT:         Locals:          []
 # CHECK-NEXT:         Body:            2380808080004180808080006A0B
 # CHECK-NEXT:       - Index:           5
 # CHECK-NEXT:         Locals:          []

test/MC/WebAssembly/simd-encodings.s

 # RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+unimplemented-simd128 < %s | FileCheck %s
 
 main:
     .functype main () -> ()
 
-    # CHECK: v128.load 48:p2align=0 # encoding: [0xfd,0x00,0x00,0x30]
+    # CHECK: v128.load 48 # encoding: [0xfd,0x00,0x04,0x30]
     v128.load 48
 
-    # CHECK: v128.store 48:p2align=0 # encoding: [0xfd,0x01,0x00,0x30]
+    # CHECK: v128.store 48 # encoding: [0xfd,0x01,0x04,0x30]
     v128.store 48
 
     # CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
     # CHECK-SAME: # encoding: [0xfd,0x02,
     # CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
     # CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
     v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15