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[ARM] Add MVE addressing to isLegalT2AddressImmediate
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Authored by dmgreen on Jun 6 2019, 10:06 AM.

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Summary

Now with MVE being added, we can add the vector addressing modes for it. These are generally imm7 multiplied by the size of the type being loaded/stored.

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rL LLVM

Event Timeline

dmgreen created this revision.Jun 6 2019, 10:06 AM
samparker added inline comments.Jun 7 2019, 12:31 AM
llvm/lib/Target/ARM/ARMISelLowering.cpp
13305 ↗(On Diff #203394)

I think it would be cleaner to exit early for floats without support, like we do currently at the start of the function. Then we can have a single switch statement here.

dmgreen added inline comments.Jun 7 2019, 5:03 AM
llvm/lib/Target/ARM/ARMISelLowering.cpp
13305 ↗(On Diff #203394)

OK. yeah. I see what you mean. That sounds like a good idea.

dmgreen updated this revision to Diff 203538.Jun 7 2019, 5:20 AM

Cleanup and added mve (nofp) to the tests.

Worth noting that I'm pretty sure we do have sensible vector load instructions for floats without mve.fp (they are the same as integer loads). We don't generate them at the moment, and this more accurately models the mess that we do create (i.e. it's expensive).

samparker accepted this revision.Jun 7 2019, 7:11 AM

LGTM.

This revision is now accepted and ready to land.Jun 7 2019, 7:11 AM
This revision was automatically updated to reflect the committed changes.