llvm.x86.sse.stmxcsr only writes to memory.
llvm.x86.sse.ldmxcsr only reads from memory, amd might generate an FPE.
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Buildable 32985 Build 32984: arc lint + arc unit
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There are a bunch of tests to update, but I'd like to get opinions on this before going further. I'm not sure why the properties were not already there. Did I miss something ?
Don’t we need stmxcsr to have side effects to keep it from reordering relative to ldmxcsr?
Reordering should be prevented by ldmxcsr having side effects, right ?
Essentially stmxcsr is nothing more than a fancy MOV32mr.
I don't think that's sufficient. A side effecting instruction doesn't prevent other non-side effecting instructions from moving across it. It only prevents other side effecting instructions from moving relative to it. If you load mxcsr from some address A, then store mxcsr to some address B. Without having side effects on the stmxcsr, nothing would prevent it from being able to move above the ldmxcsr.
- Mark ldmxscr as writing to memory. Unfortunately the DAG relies on intrinsics writing to memory to determine side-effet-ness.
- Mark stmxscr as having side effects, as discusse din the review.
- Update tests.
llvm/include/llvm/IR/IntrinsicsX86.td | ||
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290 | @craig.topper Are you OK with this? |
@craig.topper Are you OK with this?