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AMDGPU/GFX10: V_CMPX_xxx instructions still have an omod operand
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Authored by nhaehnle on May 31 2019, 1:47 AM.

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Summary

Change-Id: If6ee98e4a723b643bc37254fc6ef8b3812db16da

Repository

rL LLVM

Build Status

Buildable 32722
Build 32721: arc lint + arc unit

LGTM

This revision is now accepted and ready to land.May 31 2019, 1:48 AM

This revision was automatically updated to reflect the committed changes.

Sorry for the stale copy-and-paste buffer noise. This did NOT break non-PIC builds.

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Size

lib/

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AMDGPU/

3 lines

Show First 20 Lines • Show All 264 Lines • ▼ Show 20 Lines	if (TRI->isVGPR(MBB.getParent()->getRegInfo(),
if (!ST.hasNoSdstCMPX())		if (!ST.hasNoSdstCMPX())
I.addReg(AMDGPU::VCC, RegState::Define);		I.addReg(AMDGPU::VCC, RegState::Define);

I.addImm(0) // src0 modifiers		I.addImm(0) // src0 modifiers
.add(MI.getOperand(1))		.add(MI.getOperand(1))
.addImm(0) // src1 modifiers		.addImm(0) // src1 modifiers
.add(MI.getOperand(0));		.add(MI.getOperand(0));

if (!ST.hasNoSdstCMPX())
I.addImm(0); // omod		I.addImm(0); // omod
}		}
break;		break;
}		}
case AMDGPU::SI_KILL_I1_TERMINATOR: {		case AMDGPU::SI_KILL_I1_TERMINATOR: {
const MachineOperand &Op = MI.getOperand(0);		const MachineOperand &Op = MI.getOperand(0);
int64_t KillVal = MI.getOperand(1).getImm();		int64_t KillVal = MI.getOperand(1).getImm();
assert(KillVal == 0 \|\| KillVal == -1);		assert(KillVal == 0 \|\| KillVal == -1);

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