[mips] fix segment fault for plt on mips64.

[QiaoPengcheng]

Summary

fix segment fault for plt on mips64.

[QiaoPengcheng]

while using clang+lld+flto compiling on mips64-linux platform,
the compiling is ok, but generating mips64-assemble-code is wrong wthin @plt,
If runnging the mips64-elf executable file will emit a segment fault because the codes within section of .plt are not for mips64.

for example,
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>:** lw  t9,-31944(t3)**
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:  **  addiu  t8,t3,-31944**

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>:** lw  t9,-31936(t3)**
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    **addiu  t8,t3,-31936**

End of assembler dump.

The correct codes are:
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>: ld  t9,-31944(t3)
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:    daddiu  t8,t3,-31944

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>: ld  t9,-31936(t3)
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    daddiu  t8,t3,-31936

End of assembler dump.

[atanasyan]

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

lld/ELF/Arch/Mips.cpp

334–338

Remove curly brackets for this branch or add them for both ones.

340–344

Ditto

[QiaoPengcheng]

In D61586#1491724, @atanasyan wrote:

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

My OS is mips64el-fedora desktop-PC.
Our company is loongson, a CPU-processor-design company in China.
And our company are now pupulating the mips64el-linux-desktop in China quickly.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

I will upload later.

[QiaoPengcheng]

updateing the patch for coding-style.

[QiaoPengcheng]

In D61586#1491724, @atanasyan wrote:

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

How to distinguish between the N32 and N64 abi by llvm-mc if we split lld/test/ELF/mips-26-n32-n64.s into two files ?

Such as my OS-mips64el, if we split lld/test/ELF/mips-26-n32-n64.s into mips-26-n32.s and mips-26-n64.s ,
we compile the two files using llvm-mc, they are both N64 becaause there is no args liking -mabi=n32 for llvm-mc.

[MaskRay]

I think the title line should be more descriptive, e.g. "[mips] Fix ld instruction in PLT entries on MIPS64"....

lld/ELF/Arch/Mips.cpp

if (isMicroMips()) {
     }
     return;
   }
 
   uint32_t JrInst = isMipsR6() ? (Config->ZHazardplt ? 0x03200409 : 0x03200009)
                                : (Config->ZHazardplt ? 0x03200408 : 0x03200008);
 
   write32<E>(Buf, 0x3c0f0000);     // lui   $15, %hi(.got.plt entry)
-  write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
+  if (ELFT::Is64Bits) {
+    write32<E>(Buf + 4, 0xddf90000); // ld $25, %lo(.got.plt entry)($15)
+  } else {
+    write32<E>(Buf + 4, 0x8df90000); // lw $25, %lo(.got.plt entry)($15)
+  }
   write32<E>(Buf + 8, JrInst);     // jr  $25 / jr.hb $25
+  if (ELFT::Is64Bits) {
+    write32<E>(Buf + 12, 0x65f80000); // daddiu $24, $15, %lo(.got.plt entry)
+  } else {
     write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
+  }
   writeValue<E>(Buf, GotPltEntryAddr + 0x8000, 16, 16);
   writeValue<E>(Buf + 4, GotPltEntryAddr, 16, 0);
   writeValue<E>(Buf + 12, GotPltEntryAddr, 16, 0);
 }
 
 template <class ELFT>
 bool MIPS<ELFT>::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
                             uint64_t BranchAddr, const Symbol &S) const {