Page MenuHomePhabricator

[mips] fix segment fault for plt on mips64.
ClosedPublic

Authored by QiaoPengcheng on May 6 2019, 1:27 AM.

Diff Detail

Repository
rLLD LLVM Linker

Event Timeline

QiaoPengcheng created this revision.May 6 2019, 1:27 AM
Herald added a project: Restricted Project. · View Herald Transcript

while using clang+lld+flto compiling on mips64-linux platform,
the compiling is ok, but generating mips64-assemble-code is wrong wthin @plt,
If runnging the mips64-elf executable file will emit a segment fault because the codes within section of .plt are not for mips64.

for example,
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>:** lw  t9,-31944(t3)**
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:  **  addiu  t8,t3,-31944**

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>:** lw  t9,-31936(t3)**
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    **addiu  t8,t3,-31936**

End of assembler dump.

The correct codes are:
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>: ld  t9,-31944(t3)
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:    daddiu  t8,t3,-31944

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>: ld  t9,-31936(t3)
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    daddiu  t8,t3,-31936

End of assembler dump.

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

lld/ELF/Arch/Mips.cpp
334 ↗(On Diff #198234)

Remove curly brackets for this branch or add them for both ones.

339 ↗(On Diff #198234)

Ditto

QiaoPengcheng marked an inline comment as done.May 6 2019, 6:13 PM

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

My OS is mips64el-fedora desktop-PC.
Our company is loongson, a CPU-processor-design company in China.
And our company are now pupulating the mips64el-linux-desktop in China quickly.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

I will upload later.

updateing the patch for coding-style.

QiaoPengcheng marked an inline comment as done.May 6 2019, 7:52 PM

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

How to distinguish between the N32 and N64 abi by llvm-mc if we split lld/test/ELF/mips-26-n32-n64.s into two files ?

Such as my OS-mips64el, if we split lld/test/ELF/mips-26-n32-n64.s into mips-26-n32.s and mips-26-n64.s ,
we compile the two files using llvm-mc, they are both N64 becaause there is no args liking -mabi=n32 for llvm-mc.

I think the title line should be more descriptive, e.g. "[mips] Fix ld instruction in PLT entries on MIPS64"....

This revision was not accepted when it landed; it landed in state Needs Review.May 7 2019, 1:25 PM
This revision was automatically updated to reflect the committed changes.