[mips] fix segment fault for plt on mips64.

[QiaoPengcheng]

Summary

fix segment fault for plt on mips64.

[QiaoPengcheng]

while using clang+lld+flto compiling on mips64-linux platform,
the compiling is ok, but generating mips64-assemble-code is wrong wthin @plt,
If runnging the mips64-elf executable file will emit a segment fault because the codes within section of .plt are not for mips64.

for example,
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>:** lw  t9,-31944(t3)**
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:  **  addiu  t8,t3,-31944**

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>:** lw  t9,-31936(t3)**
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    **addiu  t8,t3,-31936**

End of assembler dump.

The correct codes are:
Dump of assembler code for function __cxa_atexit@plt:

0x0000000000e11d20 <+0>: lui t3,0x189
0x0000000000e11d24 <+4>: ld  t9,-31944(t3)
0x0000000000e11d28 <+8>: jr  t9  
0x0000000000e11d2c <+12>:    daddiu  t8,t3,-31944

End of assembler dump.
Dump of assembler code for function clock_gettime@plt:

0x0000000000e11d30 <+0>: lui t3,0x189
0x0000000000e11d34 <+4>: ld  t9,-31936(t3)
0x0000000000e11d38 <+8>: jr  t9  
0x0000000000e11d3c <+12>:    daddiu  t8,t3,-31936

End of assembler dump.

[atanasyan]

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

lld/ELF/Arch/Mips.cpp

334 ↗

(On Diff #198234)

Remove curly brackets for this branch or add them for both ones.

339 ↗

(On Diff #198234)

Ditto

[QiaoPengcheng]

In D61586#1491724, @atanasyan wrote:

Good catch, thanks. BTW on what OS do you get this problem? PLT records on MIPS 64-bit code are not widely used.

My OS is mips64el-fedora desktop-PC.
Our company is loongson, a CPU-processor-design company in China.
And our company are now pupulating the mips64el-linux-desktop in China quickly.

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

I will upload later.

[QiaoPengcheng]

updateing the patch for coding-style.

[QiaoPengcheng]

In D61586#1491724, @atanasyan wrote:

Please add test case for the patch. Probably we can split the lld/test/ELF/mips-26-n32-n64.s into N32 and N64 variants.

How to distinguish between the N32 and N64 abi by llvm-mc if we split lld/test/ELF/mips-26-n32-n64.s into two files ?

Such as my OS-mips64el, if we split lld/test/ELF/mips-26-n32-n64.s into mips-26-n32.s and mips-26-n64.s ,
we compile the two files using llvm-mc, they are both N64 becaause there is no args liking -mabi=n32 for llvm-mc.

[MaskRay]

I think the title line should be more descriptive, e.g. "[mips] Fix ld instruction in PLT entries on MIPS64"....

ELF/Arch/Mips.cpp

if (isMipsR6()) {
       write16<E>(Buf + 4, 0xff22);  // lw $25, 0($2)
       write16<E>(Buf + 8, 0x4599);  // jrc $25 / jr16 $25
       write16<E>(Buf + 10, 0x0f02); // move $24, $2
       relocateOne(Buf, R_MICROMIPS_PC23_S2, GotPltEntryAddr - PltEntryAddr);
     }
     return;
   }
 
+  uint32_t LoadInst = ELFT::Is64Bits ? 0xddf90000 : 0x8df90000;
   uint32_t JrInst = isMipsR6() ? (Config->ZHazardplt ? 0x03200409 : 0x03200009)
                                : (Config->ZHazardplt ? 0x03200408 : 0x03200008);
+  uint32_t AddInst = ELFT::Is64Bits ? 0x65f80000 : 0x25f80000;
 
   write32<E>(Buf, 0x3c0f0000);     // lui   $15, %hi(.got.plt entry)
-  write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
+  write32<E>(Buf + 4, LoadInst);   // l[wd] $25, %lo(.got.plt entry)($15)
   write32<E>(Buf + 8, JrInst);     // jr  $25 / jr.hb $25
-  write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
+  write32<E>(Buf + 12, AddInst);   // [d]addiu $24, $15, %lo(.got.plt entry)
   writeValue<E>(Buf, GotPltEntryAddr + 0x8000, 16, 16);
   writeValue<E>(Buf + 4, GotPltEntryAddr, 16, 0);
   writeValue<E>(Buf + 12, GotPltEntryAddr, 16, 0);
 }
 
 template <class ELFT>
 bool MIPS<ELFT>::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
                             uint64_t BranchAddr, const Symbol &S) const {

test/ELF/mips-plt-n64.s

 # REQUIRES: mips
 # Check R_MIPS_26 relocation handling in case of N64 ABIs.
 
 # RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux \
 # RUN:         %S/Inputs/mips-dynamic.s -o %t-so.o
 # RUN: ld.lld %t-so.o -shared -o %t.so
 # RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux %s -o %t.o
 # RUN: ld.lld %t.o %t.so -o %t.exe
 # RUN: llvm-objdump -d %t.exe | FileCheck %s --check-prefixes=CHECK,DEFAULT
 # RUN: ld.lld %t-so.o -shared -o %t.so -z hazardplt
 # RUN: ld.lld %t.o %t.so -o %t.exe -z hazardplt
 # RUN: llvm-objdump -d %t.exe | FileCheck %s --check-prefixes=CHECK,HAZARDPLT
 
-
 # CHECK:      Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: __start:
 # CHECK-NEXT:    20000:       0c 00 80 0c     jal     131120
 # CHECK-NEXT:    20004:       00 00 00 00     nop
 # CHECK-EMPTY:
 # CHECK-NEXT: Disassembly of section .plt:
 # CHECK-EMPTY:
 # CHECK-NEXT: .plt:
 # CHECK-NEXT:    20010:       3c 0e 00 03     lui     $14, 3
 # CHECK-NEXT:    20014:       dd d9 00 08     ld      $25, 8($14)
 # CHECK-NEXT:    20018:       25 ce 00 08     addiu   $14, $14, 8
 # CHECK-NEXT:    2001c:       03 0e c0 23     subu    $24, $24, $14
 # CHECK-NEXT:    20020:       03 e0 78 25     move    $15, $ra
 # CHECK-NEXT:    20024:       00 18 c0 c2     srl     $24, $24, 3
 # DEFAULT:       20028:       03 20 f8 09     jalr    $25
 # HAZARDPLT:     20028:       03 20 fc 09     jalr.hb $25
 # CHECK-NEXT:    2002c:       27 18 ff fe     addiu   $24, $24, -2
 # CHECK-NEXT:    20030:       3c 0f 00 03     lui     $15, 3
-# CHECK-NEXT:    20034:       8d f9 00 18     lw      $25, 24($15)
+# CHECK-NEXT:    20034:       dd f9 00 18     ld      $25, 24($15)
 # DEFAULT:       20038:       03 20 00 08     jr      $25
 # HAZARDPLT:     20038:       03 20 04 08     jr.hb   $25
-# CHECK-NEXT:    2003c:       25 f8 00 18     addiu   $24, $15, 24
+# CHECK-NEXT:    2003c:       65 f8 00 18     daddiu  $24, $15, 24
 
   .text
   .option pic0
   .global __start
 __start:
   jal   foo0