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[AArch64] Add lowering pattern for scalar fp16 facge and facgt
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Authored by dnsampaio on Apr 3 2019, 9:49 AM.

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Summary

The fp16 scalar version of facge and facgt requires a custom patter matching, as the result type is not the same width of the operands.

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Repository
rL LLVM

Event Timeline

dnsampaio created this revision.Apr 3 2019, 9:49 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 3 2019, 9:49 AM
dnsampaio edited reviewers, added: pbarrio; removed: pablooliveira.Apr 3 2019, 9:50 AM
javed.absar added inline comments.Apr 3 2019, 10:04 PM
test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
322 ↗(On Diff #193528)

move the declares to the top like the rest of the tests.

326 ↗(On Diff #193528)

fix/alignindentation

dnsampaio updated this revision to Diff 193674.Apr 4 2019, 1:59 AM

Attended requests.

Ping.
I know the usual time is a week, but for such a small bug-fix I don't believe much more people would care.

javed.absar accepted this revision.Apr 10 2019, 12:13 AM
This revision is now accepted and ready to land.Apr 10 2019, 12:13 AM
This revision was automatically updated to reflect the committed changes.