[CorrelatedValuePropagation] Mark subs that we know not to wrap with nuw/nsw.

[luqmana]

Summary

Teach CorrelatedValuePropagation to also handle sub instructions in addition to add. Relatively simple since makeGuaranteedNoWrapRegion already understood sub instructions. Only subtle change is which range is passed as "Other" to that function, since sub isn't commutative.

Note that CorrelatedValuePropagation::processAddSub is still hidden behind a default-off flag as IndVarSimplify hasn't yet been fixed to strip the added nsw/nuw flags and causes a miscompile. (PR31181)

[luqmana]

Ping?

[nikic]

Generally looks fine to me, but I'm not particularly familiar with CVP. I'd suggest to decouple the naming from add/sub in particular, as this optimization could also be easily extended to muls as well, which also support calculation of the nowrap region. So rename AddSubOp to just Op or BinOp, processAdd to processNoWrapFlags or so and the option to cvp-dont-add-nowrap-flags.

We should probably give reenabling the option by default another try (in a separate revision), at least I can't seem to reproduce the issue in PR31181 anymore.

llvm/test/Transforms/CorrelatedValuePropagation/sub.ll

11 ↗

(On Diff #192992)

These cases aren't particularly meaningful, because this is non-canonical IR -- usually the sub %a, 1 gets canonicalized to add %a, -1, at which point the existing add code would add nowrap flags. Sub nowrap flags are generally only useful if the second operand is non-constant.

But I guess that for the purposes of this test this doesn't really matter, as it shows the relevant transform, even if the specific case can't occur naturally.

[luqmana]

Rename option and method to be more general.

[luqmana]

llvm/test/Transforms/CorrelatedValuePropagation/sub.ll

11 ↗

(On Diff #192992)

Yea, mostly just to test that the right flags get added.

[luqmana]

In D60036#1454548, @nikic wrote:

We should probably give reenabling the option by default another try (in a separate revision), at least I can't seem to reproduce the issue in PR31181 anymore.

PR31181 still repros for me:

With the nowrap flag marking disabled (default):

➜  llc -o PR31181.opt.s PR31181.opt.bc
➜  opt -instcombine -early-cse -jump-threading -correlated-propagation -loop-rotate -indvars -gvn -o PR31181.opt.bc PR31181.bc
➜  llc -o PR31181.opt.s PR31181.opt.bc                                                                                        
➜  gcc -o PR31181 PR31181.opt.s
➜  timeout -s 9 10 ./PR31181

Enabling nowrap flag marking:

➜  opt -instcombine -early-cse -jump-threading -correlated-propagation -loop-rotate -indvars -gvn -cvp-dont-add-nowrap-flags=false -o PR31181.opt.bc PR31181.bc
➜  llc -o PR31181.opt.s PR31181.opt.bc
➜  gcc -o PR31181 PR31181.opt.s
➜  timeout -s 9 10 ./PR31181
[1]    5928 killed     timeout -s 9 10 ./PR31181

[nikic]

I've committed the baseline sub.ll tests in rL358808. Could you please rebase over them and rerun update_test_checks.py?

[luqmana]

Rebase over committed baseline tests.

[nikic]

LGTM

llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp

 STATISTIC(NumReturns,   "Number of return values propagated");
 STATISTIC(NumDeadCases, "Number of switch cases removed");
 STATISTIC(NumSDivs,     "Number of sdiv converted to udiv");
 STATISTIC(NumUDivs,     "Number of udivs whose width was decreased");
 STATISTIC(NumAShrs,     "Number of ashr converted to lshr");
 STATISTIC(NumSRems,     "Number of srem converted to urem");
 STATISTIC(NumOverflows, "Number of overflow checks removed");
 
-static cl::opt<bool> DontProcessAdds("cvp-dont-process-adds", cl::init(true));
+static cl::opt<bool> DontAddNoWrapFlags("cvp-dont-add-nowrap-flags", cl::init(true));
 
 namespace {
 
   class CorrelatedValuePropagation : public FunctionPass {
   public:
     static char ID;
 
     CorrelatedValuePropagation(): FunctionPass(ID) {
static bool processAShr(BinaryOperator *SDI, LazyValueInfo *LVI) {
   BO->setDebugLoc(SDI->getDebugLoc());
   BO->setIsExact(SDI->isExact());
   SDI->replaceAllUsesWith(BO);
   SDI->eraseFromParent();
 
   return true;
 }
 
-static bool processAdd(BinaryOperator *AddOp, LazyValueInfo *LVI) {
+static bool processBinOp(BinaryOperator *BinOp, LazyValueInfo *LVI) {
   using OBO = OverflowingBinaryOperator;
 
-  if (DontProcessAdds)
+  if (DontAddNoWrapFlags)
     return false;
 
-  if (AddOp->getType()->isVectorTy())
+  if (BinOp->getType()->isVectorTy())
     return false;
 
-  bool NSW = AddOp->hasNoSignedWrap();
-  bool NUW = AddOp->hasNoUnsignedWrap();
+  bool NSW = BinOp->hasNoSignedWrap();
+  bool NUW = BinOp->hasNoUnsignedWrap();
   if (NSW && NUW)
     return false;
 
-  BasicBlock *BB = AddOp->getParent();
+  BasicBlock *BB = BinOp->getParent();
 
-  Value *LHS = AddOp->getOperand(0);
-  Value *RHS = AddOp->getOperand(1);
+  Value *LHS = BinOp->getOperand(0);
+  Value *RHS = BinOp->getOperand(1);
 
-  ConstantRange LRange = LVI->getConstantRange(LHS, BB, AddOp);
+  ConstantRange RRange = LVI->getConstantRange(RHS, BB, BinOp);
 
-  // Initialize RRange only if we need it. If we know that guaranteed no wrap
-  // range for the given LHS range is empty don't spend time calculating the
-  // range for the RHS.
-  Optional<ConstantRange> RRange;
-  auto LazyRRange = [&] () {
-      if (!RRange)
-        RRange = LVI->getConstantRange(RHS, BB, AddOp);
-      return RRange.getValue();
+  // Initialize LRange only if we need it. If we know that guaranteed no wrap
+  // range for the given RHS range is empty don't spend time calculating the
+  // range for the LHS.
+  Optional<ConstantRange> LRange;
+  auto LazyLRange = [&] () {
+      if (!LRange)
+        LRange = LVI->getConstantRange(LHS, BB, BinOp);
+      return LRange.getValue();
   };
 
   bool Changed = false;
   if (!NUW) {
     ConstantRange NUWRange = ConstantRange::makeGuaranteedNoWrapRegion(
-        BinaryOperator::Add, LRange, OBO::NoUnsignedWrap);
+        BinOp->getOpcode(), RRange, OBO::NoUnsignedWrap);
     if (!NUWRange.isEmptySet()) {
-      bool NewNUW = NUWRange.contains(LazyRRange());
-      AddOp->setHasNoUnsignedWrap(NewNUW);
+      bool NewNUW = NUWRange.contains(LazyLRange());
+      BinOp->setHasNoUnsignedWrap(NewNUW);
       Changed |= NewNUW;
     }
   }
   if (!NSW) {
     ConstantRange NSWRange = ConstantRange::makeGuaranteedNoWrapRegion(
-        BinaryOperator::Add, LRange, OBO::NoSignedWrap);
+        BinOp->getOpcode(), RRange, OBO::NoSignedWrap);
     if (!NSWRange.isEmptySet()) {
-      bool NewNSW = NSWRange.contains(LazyRRange());
-      AddOp->setHasNoSignedWrap(NewNSW);
+      bool NewNSW = NSWRange.contains(LazyLRange());
+      BinOp->setHasNoSignedWrap(NewNSW);
       Changed |= NewNSW;
     }
   }
 
   return Changed;
 }
 
 static Constant *getConstantAt(Value *V, Instruction *At, LazyValueInfo *LVI) {
for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); BI != BE;) {
       case Instruction::UDiv:
       case Instruction::URem:
         BBChanged |= processUDivOrURem(cast<BinaryOperator>(II), LVI);
         break;
       case Instruction::AShr:
         BBChanged |= processAShr(cast<BinaryOperator>(II), LVI);
         break;
       case Instruction::Add:
-        BBChanged |= processAdd(cast<BinaryOperator>(II), LVI);
+      case Instruction::Sub:
+        BBChanged |= processBinOp(cast<BinaryOperator>(II), LVI);
         break;
       }
     }
 
     Instruction *Term = BB->getTerminator();
     switch (Term->getOpcode()) {
     case Instruction::Switch:
       BBChanged |= processSwitch(cast<SwitchInst>(Term), LVI, DT);

llvm/trunk/test/Transforms/CorrelatedValuePropagation/add.ll

-; RUN: opt < %s -correlated-propagation -cvp-dont-process-adds=false -S | FileCheck %s
+; RUN: opt < %s -correlated-propagation -cvp-dont-add-nowrap-flags=false -S | FileCheck %s
 
 ; CHECK-LABEL: @test0(
 define void @test0(i32 %a) {
 entry:
   %cmp = icmp slt i32 %a, 100
   br i1 %cmp, label %bb, label %exit
 
 bb:

llvm/trunk/test/Transforms/CorrelatedValuePropagation/sub.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -correlated-propagation -cvp-dont-process-adds=false -S | FileCheck %s
+; RUN: opt < %s -correlated-propagation -cvp-dont-add-nowrap-flags=false -S | FileCheck %s
 
 define void @test0(i32 %a) {
 ; CHECK-LABEL: @test0(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp sgt i32 %a, 100
   br i1 %cmp, label %bb, label %exit
 
 bb:
   %sub = sub i32 %a, 1
   br label %exit
 
 exit:
   ret void
 }
 
 define void @test1(i32 %a) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp ugt i32 %a, 100
   br i1 %cmp, label %bb, label %exit
 

 }
 
 define void @test3(i32 %a) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp sgt i32 %a, -1
   br i1 %cmp, label %bb, label %exit
 
 bb:
   %sub = sub i32 %a, 1
   br label %exit
 
 exit:
   ret void
 }
 
 define void @test4(i32 %a) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 2147483647
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp ugt i32 %a, 2147483647
   br i1 %cmp, label %bb, label %exit
 

 ;   and ( i s< 100, Unknown )
 define void @test7(i32 %a, i1 %flag) {
 ; CHECK-LABEL: @test7(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp ugt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp ugt i32 %a, 100
   %cmp = and i1 %cmp.1, %flag
   br i1 %cmp, label %bb, label %exit

 define void @test8(i32 %a) {
 ; CHECK-LABEL: @test8(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp slt i32 %a, 100
   %cmp.2 = icmp sgt i32 %a, 0
   %cmp = and i1 %cmp.1, %cmp.2

 ; CHECK-LABEL: @test9(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
 ; CHECK-NEXT:    [[CMP_3:%.*]] = and i1 [[CMP_2]], [[FLAG:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_3]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp slt i32 %a, 100
   %cmp.2 = icmp sgt i32 %a, 0
   %cmp.3 = and i1 %cmp.2, %flag

 ;   and ( i s> Unknown, ... )
 define void @test10(i32 %a, i32 %b, i1 %flag) {
 ; CHECK-LABEL: @test10(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp sgt i32 %a, %b
   %cmp = and i1 %cmp.1, %flag
   br i1 %cmp, label %bb, label %exit

 ; CHECK-LABEL: @test11(
 ; CHECK-NEXT:    [[LIMIT:%.*]] = load i32, i32* [[P:%.*]], !range !0
 ; CHECK-NEXT:    [[WITHIN_1:%.*]] = icmp slt i32 [[LIMIT]], [[I:%.*]]
 ; CHECK-NEXT:    [[I_MINUS_7:%.*]] = add i32 [[I]], -7
 ; CHECK-NEXT:    [[WITHIN_2:%.*]] = icmp slt i32 [[LIMIT]], [[I_MINUS_7]]
 ; CHECK-NEXT:    [[WITHIN:%.*]] = and i1 [[WITHIN_1]], [[WITHIN_2]]
 ; CHECK-NEXT:    br i1 [[WITHIN]], label [[THEN:%.*]], label [[ELSE:%.*]]
 ; CHECK:       then:
-; CHECK-NEXT:    [[I_MINUS_6:%.*]] = sub i32 [[I]], 6
+; CHECK-NEXT:    [[I_MINUS_6:%.*]] = sub nuw nsw i32 [[I]], 6
 ; CHECK-NEXT:    ret i32 [[I_MINUS_6]]
 ; CHECK:       else:
 ; CHECK-NEXT:    ret i32 0
 ;
   %limit = load i32, i32* %p, !range !{i32 0, i32 2147483647}
   %within.1 = icmp slt i32 %limit, %i
   %i.minus.7 = add i32 %i, -7
   %within.2 = icmp slt i32 %limit, %i.minus.7

 ;   or ( i s<= -100, Unknown )
 define void @test12(i32 %a, i1 %flag) {
 ; CHECK-LABEL: @test12(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], -100
 ; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp sle i32 %a, -100
   %cmp = or i1 %cmp.1, %flag
   br i1 %cmp, label %exit, label %bb

 define void @test13(i32 %a) {
 ; CHECK-LABEL: @test13(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
 ; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
 ; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp sge i32 %a, 100
   %cmp.2 = icmp sle i32 %a, 0
   %cmp = or i1 %cmp.1, %cmp.2

 ; CHECK-LABEL: @test14(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
 ; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
 ; CHECK-NEXT:    [[CMP_3:%.*]] = or i1 [[CMP_2]], [[FLAG:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_3]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp sge i32 %a, 100
   %cmp.2 = icmp sle i32 %a, 0
   %cmp.3 = or i1 %cmp.2, %flag

 ;   or ( i s<= Unknown, ... )
 define void @test15(i32 %a, i32 %b, i1 %flag) {
 ; CHECK-LABEL: @test15(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
+; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp.1 = icmp sle i32 %a, %b
   %cmp = or i1 %cmp.1, %flag
   br i1 %cmp, label %exit, label %bb

 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[ACC:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[ACC_CURR:%.*]], [[LOOP]] ]
 ; CHECK-NEXT:    [[X:%.*]] = load atomic i32, i32* [[A:%.*]] unordered, align 8
 ; CHECK-NEXT:    fence acquire
 ; CHECK-NEXT:    [[ACC_CURR]] = sub i32 [[ACC]], [[X]]
-; CHECK-NEXT:    [[IV_NEXT]] = sub i32 [[IV]], -1
+; CHECK-NEXT:    [[IV_NEXT]] = sub nsw i32 [[IV]], -1
 ; CHECK-NEXT:    [[NVAL:%.*]] = load atomic i32, i32* [[N:%.*]] unordered, align 8
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[IV_NEXT]], [[NVAL]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i32 [[ACC_CURR]]
 ;
 preheader:
   br label %loop

 }
 
 define void @test17(i32 %a) {
 ; CHECK-LABEL: @test17(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 1, [[A]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 1, [[A]]
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp sgt i32 %a, 100
   br i1 %cmp, label %bb, label %exit
 
 bb:
   %sub = sub i32 1, %a
   br label %exit
 
 exit:
   ret void
 }
 
 define void @test18(i32 %a) {
 ; CHECK-LABEL: @test18(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 10000
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 -2, [[A]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 -2, [[A]]
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp sgt i32 %a, 10000
   br i1 %cmp, label %bb, label %exit
 
 bb:
   %sub = sub i32 -2, %a
   br label %exit
 
 exit:
   ret void
 }
 
 define void @test19(i32 %a) {
 ; CHECK-LABEL: @test19(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 100
 ; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 -1, [[A]]
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 -1, [[A]]
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp = icmp ult i32 %a, 100
   br i1 %cmp, label %bb, label %exit