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[RISCV] Allow conversion of CC logic to bitwise logic
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Authored by luismarques on Mar 20 2019, 4:32 AM.

Details

Summary

Indicates in the TargetLowering interface that conversions from CC logic to
bitwise logic are allowed. Adds tests that show the benefit when optimization
opportunities are detected. Also adds tests that show that when the optimization
is not applied correct code is generated (but opportunities for other
optimizations remain).

Diff Detail

Repository
rL LLVM

Event Timeline

luismarques created this revision.Mar 20 2019, 4:32 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 20 2019, 4:32 AM
asb accepted this revision.Mar 21 2019, 7:50 AM

Looks good to me, thanks.

Nit: I'd put the simpler / more fundamental tests (and_icmp_ne and or_icmp_ne) at the beginning of the test file.

This revision is now accepted and ready to land.Mar 21 2019, 7:50 AM
This revision was automatically updated to reflect the committed changes.