Differential D58873
[ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt' Authored by Higuoxing on Mar 2 2019, 4:58 AM.
Details Instruction [0xfe 0xf0 0x20 0xe3] is a valid instruction on ARM-v7, which is dbg #14. See: Encoding A1: DBG<c> #<option> |31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16|15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00| | cond | 0 0 1 1 0| 0| 1 0| 0 0 0 0| 1 1 1 1| 0 0 0 0| 1 1 1 1| option |
Diff Detail
Event TimelineComment Actions The instruction [0xfe 0xf0 0x20 0xe3 is dbg #14, and it's a legal instruction. I think the test needs an invalid encoding which related with hint instruction. Comment Actions Oh, I see, you changed the instruction bytes for the test. Are you planning to fix the decoding for "dbg" instructions? If not, is there a bug filed? Comment Actions I think there's no bug here, what we need is an undefined encoding space for hint instruction test. So, [0xfe 0xf0 0x20 0xf3] is an invalid instruction which has an invalid cond field. According to the manual, there's only one invalid instruction in dbg hint instruction, which is this. Comment Actions I spotted this FIXME when I trying to find some typos in llvm. I don't know if it's a deliberate typo to skip CHECK, because the encoding is a valid arm instruction. |