Fixed typos in tests: s/CHEKC/CHECK/

[ilya-biryukov]

LGTM

clang/test/CodeGenObjC/dllstorage.m

 
 __declspec(dllimport)
 @interface M : I {
   @public
   id _ivar;
 }
 @end
 
-// CHEKC-FW-DAG: @_OBJC_CLASS_M = external dllimport global i32
+// CHECK-FW-DAG: @_OBJC_CLASS_M = external dllimport global i32
 
 // CHECK-IR-DAG: @"OBJC_IVAR_$_M._ivar" = external dllimport global i32
 
 __declspec(dllexport)
 __attribute__((__objc_exception__))
 @interface N : I
 @end
 

clang/test/CodeGenObjC/gnustep2-category-protocol.m

 // RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s
 
 // Regression test.  We weren't emitting definitions for protocols used in
 // categories, causing linker errors when the category was the only reference
 // to a protocol in a binary.
 
 // CHECK: @._OBJC_PROTOCOL_Y = global 
-// CHEKC-SAME: section "__objc_protocols", comdat, align 8
+// CHECK-SAME: section "__objc_protocols", comdat, align 8
 
 
 @interface X
 {
 id isa;
 }
 @end
 @implementation X

llvm/test/CodeGen/AArch64/nonlazybind.ll

 ; CHECK: bl _local
 
 ; CHECK: adrp x[[TMP:[0-9]+]], _nonlocal@GOTPAGE
 ; CHECK: ldr [[FUNC:x[0-9]+]], [x[[TMP]], _nonlocal@GOTPAGEOFF]
 ; CHECK: blr [[FUNC]]
 
 ; CHECK-NORMAL-LABEL: test_laziness:
 ; CHECK-NORMAL: bl _local
-; CHEKC-NORMAL: bl _nonlocal
+; CHECK-NORMAL: bl _nonlocal
 
   call void @local()
   call void @nonlocal()
   ret void
 }
 
 define void @test_laziness_tail() {
 ; CHECK-LABEL: test_laziness_tail:

llvm/test/CodeGen/ARM/cmpxchg.mir

 # RUN: llc -o - %s -mtriple=armv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s
 ---
 # CHECK-LABEL: name: func
 name: func
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $r0_r1, $r4_r5, $r3, $lr
     dead early-clobber renamable $r0_r1, dead early-clobber renamable $r2 = CMP_SWAP_64 killed renamable $r3, killed renamable $r4_r5, renamable $r4_r5 :: (volatile load store monotonic monotonic 8)
     ; CHECK: bb.0:
     ; CHECK:   liveins: $r0_r1, $r4_r5, $r3, $lr
     ; CHECK: bb.1:
-    ; CHEKC:   liveins: $r4_r5, $r3
+    ; CHECK:   liveins: $r4_r5, $r3
     ; CHECK:   $r0_r1 = LDREXD $r3, 14, $noreg
     ; CHECK:   CMPrr killed $r0, $r4, 14, $noreg, implicit-def $cpsr
     ; CHECK:   CMPrr killed $r1, $r5, 0, killed $cpsr, implicit-def $cpsr
     ; CHECK:   Bcc %bb.3, 1, killed $cpsr
     ; CHECK: bb.2:
     ; CHECK:   liveins: $r4_r5, $r3
     ; CHECK:   early-clobber $r2 = STREXD $r4_r5, $r3, 14, $noreg
     ; CHECK:   CMPri killed $r2, 0, 14, $noreg, implicit-def $cpsr
     ; CHECK:   Bcc %bb.1, 1, killed $cpsr
     ; CHECK: bb.3:
 ...

llvm/test/CodeGen/ARM/peephole-phi.mir

body: |
 
   bb.3:
     %5:gpr = PHI %1, %bb.1, %4, %bb.2
     %6:spr = VMOVSR %5, 14, $noreg
 ...
 
 # CHECK-LABEL: name: func1
 # CHECK:    %6:spr = PHI %0, %bb.1, %2, %bb.2
-# CHEKC:    %7:spr = COPY %6
+# CHECK:    %7:spr = COPY %6
 ---
 name: func1
 tracksRegLiveness: true
 body: |
   bb.0:
     Bcc %bb.2, 1, undef $cpsr
 
   bb.1:

llvm/test/CodeGen/PowerPC/scavenging.mir

 # block.
 # CHECK-LABEL: name: spill_at_begin
 # CHECK: bb.0:
 # CHECK: liveins:
 # CHECK: STD killed [[REG:\$x[0-9]+]]{{.*}}(store 8 into %stack.{{[0-9]+}})
 # CHECK: [[REG]] = LIS8 0
 # CHECK: [[REG]] = ORI8 killed [[REG]], 48
 # CHECK: NOP implicit killed [[REG]]
-# CHEKC: [[REG]] = LD{{.*}}(load 8 from %stack.{{[0-9]+}})
+# CHECK: [[REG]] = LD{{.*}}(load 8 from %stack.{{[0-9]+}})
 name: spill_at_begin
 tracksRegLiveness: true
 stack:
   # variable-sized object should be a reason to reserve an emergency spillslot
   # in the RegScavenger
   - { id: 0, type: variable-sized, offset: -32, alignment: 1 }
 body: |
   bb.0: