[LoopSimplifyCFG] Update MemorySSA after r353911.

[asbirlea]

Summary

MemorySSA is not properly updated in LoopSimplifyCFG after recent changes. Use SplitBlock utility to resolve that and clear all updates once handleDeadExits is finished.
All updates that follow are removal of edges which are safe to handle via the removeEdge() API.
Also, deleting dead blocks is done correctly as is, i.e. delete from MemorySSA before updating the CFG and DT.

[mkazantsev]

llvm/trunk/lib/Transforms/Scalar/LoopSimplifyCFG.cpp

592

I believe we should also update MSSA here. This is the execution path taken when we don't have dead blocks.

[asbirlea]

llvm/trunk/lib/Transforms/Scalar/LoopSimplifyCFG.cpp

592

Thanks for looking at this!
I believe all updates are already done at this point as far as MemorySSA is concerned.
All updates are cleared at the end of handleDeadExits, and foldTerminators only removed edges which are safe to handle with the removeEdge API (done already inside the method).
Everything needs to be correct by the time we delete blocks anyway, since deleting assumes a correct CFG+MSSA.

If you have a case showing otherwise, I'll be happy to take a look.

llvm/trunk/lib/Transforms/Scalar/LoopSimplifyCFG.cpp

private:
   void handleDeadExits() {
     // If no dead exits, nothing to do.
     if (DeadExitBlocks.empty())
       return;
 
     // Construct split preheader and the dummy switch to thread edges from it to
     // dead exits.
     BasicBlock *Preheader = L.getLoopPreheader();
-    BasicBlock *NewPreheader = Preheader->splitBasicBlock(
-        Preheader->getTerminator(),
-        Twine(Preheader->getName()).concat("-split"));
-    if (MSSAU)
-      MSSAU->removeEdge(Preheader, L.getHeader());
-    DTUpdates.push_back({DominatorTree::Delete, Preheader, L.getHeader()});
-    DTUpdates.push_back({DominatorTree::Insert, NewPreheader, L.getHeader()});
-    DTUpdates.push_back({DominatorTree::Insert, Preheader, NewPreheader});
+    BasicBlock *NewPreheader = llvm::SplitBlock(
+        Preheader, Preheader->getTerminator(), &DT, &LI, MSSAU);
+
     IRBuilder<> Builder(Preheader->getTerminator());
     SwitchInst *DummySwitch =
         Builder.CreateSwitch(Builder.getInt32(0), NewPreheader);
     Preheader->getTerminator()->eraseFromParent();
 
     unsigned DummyIdx = 1;
     for (BasicBlock *BB : DeadExitBlocks) {
       SmallVector<Instruction *, 4> DeadPhis;
       for (auto &PN : BB->phis())
         DeadPhis.push_back(&PN);
 
       // Eliminate all Phis from dead exits.
       for (Instruction *PN : DeadPhis) {
         PN->replaceAllUsesWith(UndefValue::get(PN->getType()));
         PN->eraseFromParent();
       }
       assert(DummyIdx != 0 && "Too many dead exits!");
       DummySwitch->addCase(Builder.getInt32(DummyIdx++), BB);
       DTUpdates.push_back({DominatorTree::Insert, Preheader, BB});
       ++NumLoopExitsDeleted;
     }
 
     assert(L.getLoopPreheader() == NewPreheader && "Malformed CFG?");
     if (Loop *OuterLoop = LI.getLoopFor(Preheader)) {
-      OuterLoop->addBasicBlockToLoop(NewPreheader, LI);
-
       // When we break dead edges, the outer loop may become unreachable from
       // the current loop. We need to fix loop info accordingly. For this, we
       // find the most nested loop that still contains L and remove L from all
       // loops that are inside of it.
       Loop *StillReachable = getInnermostLoopFor(LiveExitBlocks, L, LI);
 
       // Okay, our loop is no longer in the outer loop (and maybe not in some of
       // its parents as well). Make the fixup.
if (Loop *OuterLoop = LI.getLoopFor(Preheader)) {
         // in the current loop. Now it is not their child anymore, so such uses
         // require LCSSA Phis.
         Loop *FixLCSSALoop = OuterLoop;
         while (FixLCSSALoop->getParentLoop() != StillReachable)
           FixLCSSALoop = FixLCSSALoop->getParentLoop();
         assert(FixLCSSALoop && "Should be a loop!");
         // We need all DT updates to be done before forming LCSSA.
         DTU.applyUpdates(DTUpdates);
+        if (MSSAU)
+          MSSAU->applyUpdates(DTUpdates, DT);
         DTUpdates.clear();
         formLCSSARecursively(*FixLCSSALoop, DT, &LI, &SE);
       }
     }
+
+    if (MSSAU) {
+      // Clear all updates now. Facilitates deletes that follow.
+      DTU.applyUpdates(DTUpdates);
+      MSSAU->applyUpdates(DTUpdates, DT);
+      DTUpdates.clear();
+      if (VerifyMemorySSA)
+        MSSAU->getMemorySSA()->verifyMemorySSA();
+    }
   }
 
   /// Delete loop blocks that have become unreachable after folding. Make all
   /// relevant updates to DT and LI.
   void deleteDeadLoopBlocks() {
     if (MSSAU) {
       SmallPtrSet<BasicBlock *, 8> DeadLoopBlocksSet(DeadLoopBlocks.begin(),
                                                      DeadLoopBlocks.end());
bool run() {
     foldTerminators();
 
     if (!DeadLoopBlocks.empty()) {
       LLVM_DEBUG(dbgs() << "Deleting " << DeadLoopBlocks.size()
                     << " dead blocks in loop " << Header->getName() << "\n");
       deleteDeadLoopBlocks();
     } else {
       // If we didn't do updates inside deleteDeadLoopBlocks, do them here.
       DTU.applyUpdates(DTUpdates);
       DTUpdates.clear();
     }
 
+    if (MSSAU && VerifyMemorySSA)
+      MSSAU->getMemorySSA()->verifyMemorySSA();
+
 #ifndef NDEBUG
     // Make sure that we have preserved all data structures after the transform.
     assert(DT.verify() && "DT broken after transform!");
     assert(DT.isReachableFromEntry(Header));
     LI.verify(DT);
 #endif
 
     return true;

llvm/trunk/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; REQUIRES: asserts
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
 
 ; Make sure that we can eliminate a provably dead backedge.
 define i32 @dead_backedge_test_branch_loop(i32 %end) {
 ; CHECK-LABEL: @dead_backedge_test_branch_loop(
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]

 ; Check that we preserve static reachibility of a dead exit block while deleting
 ; a branch.
 define i32 @dead_exit_test_branch_loop(i32 %end) {
 ; CHECK-LABEL: @dead_exit_test_branch_loop(
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[DEAD:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[HEADER]], label [[EXIT_LOOPEXIT:%.*]]
 ; CHECK:       dead:
 ; CHECK-NEXT:    br label [[DUMMY:%.*]]

 ; Check that we preserve static reachibility of a dead exit block while deleting
 ; a switch.
 define i32 @dead_exit_test_switch_loop(i32 %end) {
 ; CHECK-LABEL: @dead_exit_test_switch_loop(
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[DEAD:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[HEADER]], label [[EXIT_LOOPEXIT:%.*]]
 ; CHECK:       dead:
 ; CHECK-NEXT:    br label [[DUMMY:%.*]]

 ; Check that we preserve static reachability of an exit block even if we prove
 ; that the loop is infinite. Branch case.
 define i32 @inf_loop_test_branch_loop(i32 %end) {
 ; CHECK-LABEL: @inf_loop_test_branch_loop(
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i32 undef

 }
 
 define i32 @inf_loop_test_switch_loop(i32 %end) {
 ; CHECK-LABEL: @inf_loop_test_switch_loop(
 ; CHECK-NEXT:  preheader:
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[EXIT:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_INC]], [[END:%.*]]
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i32 undef

 ; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       outer_backedge:

 ; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_2:%.*]] = add i32 [[I]], 1
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I_2]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       outer_backedge:

 ; CHECK-LABEL: @full_sub_loop_test_branch_loop_inverse_3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       outer_backedge:
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1

 ; CHECK-LABEL: @full_sub_loop_test_switch_loop_inverse_3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[OUTER_HEADER:%.*]]
 ; CHECK:       outer_header:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[PREHEADER_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[OUTER_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       preheader-split:
+; CHECK:       preheader.split:
 ; CHECK-NEXT:    br label [[HEADER:%.*]]
 ; CHECK:       header:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER_SPLIT]] ], [ [[I_INC:%.*]], [[HEADER]] ]
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[I]], [[I]]
 ; CHECK-NEXT:    [[I_INC]] = add i32 [[I]], 1
 ; CHECK-NEXT:    br label [[HEADER]]
 ; CHECK:       outer_backedge:
 ; CHECK-NEXT:    [[J_INC]] = add i32 [[J]], 1

 ; CHECK:       loop_1:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    br label [[LOOP_2:%.*]]
 ; CHECK:       loop_2:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[LOOP_2_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       loop_2-split:
+; CHECK:       loop_2.split:
 ; CHECK-NEXT:    br label [[LOOP_3:%.*]]
 ; CHECK:       loop_3:
 ; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
 ; CHECK:       loop_3_backedge:
 ; CHECK-NEXT:    [[K_NEXT]] = add i32 [[K]], 1
 ; CHECK-NEXT:    br label [[LOOP_3]]
 ; CHECK:       loop_2_backedge:

 ; CHECK:       loop_1:
 ; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_NEXT:%.*]], [[LOOP_1_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    br label [[LOOP_2:%.*]]
 ; CHECK:       loop_2:
 ; CHECK-NEXT:    [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[LOOP_2_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[LOOP_2_BACKEDGE]]
 ; CHECK-NEXT:    ]
-; CHECK:       loop_2-split:
+; CHECK:       loop_2.split:
 ; CHECK-NEXT:    br label [[LOOP_3:%.*]]
 ; CHECK:       loop_3:
 ; CHECK-NEXT:    [[K:%.*]] = phi i32 [ 0, [[LOOP_2_SPLIT]] ], [ [[K_NEXT:%.*]], [[LOOP_3_BACKEDGE:%.*]] ]
 ; CHECK-NEXT:    br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]]
 ; CHECK:       loop_3_backedge:
 ; CHECK-NEXT:    [[K_NEXT]] = add i32 [[K]], 1
 ; CHECK-NEXT:    br label [[LOOP_3]]
 ; CHECK:       loop_2_backedge:

 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    br label [[BB1:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br i1 undef, label [[BB17:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    switch i32 0, label [[BB2_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[BB19:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       bb2-split:
+; CHECK:       bb2.split:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    switch i32 undef, label [[BB16:%.*]] [
 ; CHECK-NEXT:    i32 0, label [[BB15:%.*]]
 ; CHECK-NEXT:    i32 1, label [[BB14:%.*]]
 ; CHECK-NEXT:    i32 2, label [[BB13:%.*]]
 ; CHECK-NEXT:    i32 3, label [[BB12:%.*]]
 ; CHECK-NEXT:    i32 4, label [[BB11:%.*]]

llvm/trunk/test/Transforms/LoopSimplifyCFG/lcssa.ll

 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
 ; CHECK:       for.cond.loopexit:
 ; CHECK-NEXT:    br label [[FOR_COND]]
 ; CHECK:       for.cond:
 ; CHECK-NEXT:    [[INC41_LCSSA3:%.*]] = phi i16 [ undef, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]
 ; CHECK-NEXT:    switch i32 0, label [[FOR_COND_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[FOR_COND_LOOPEXIT]]
 ; CHECK-NEXT:    ]
-; CHECK:       for.cond-split:
+; CHECK:       for.cond.split:
 ; CHECK-NEXT:    [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]
 ; CHECK-NEXT:    br label [[WHILE_COND:%.*]]
 ; CHECK:       while.cond:
 ; CHECK-NEXT:    [[INC41:%.*]] = phi i16 [ [[INC4:%.*]], [[WHILE_COND]] ], [ [[INC41_LCSSA3_LCSSA]], [[FOR_COND_SPLIT]] ]
 ; CHECK-NEXT:    [[INC4]] = add nsw i16 [[INC41]], 1
 ; CHECK-NEXT:    br label [[WHILE_COND]]
 ;
 entry:

 }
 
 define void @bar() {
 ; CHECK-LABEL: @bar(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    switch i32 0, label [[BB_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[BB10:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       bb-split:
+; CHECK:       bb.split:
 ; CHECK-NEXT:    br label [[BB1:%.*]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ [[TMP7:%.*]], [[BB6:%.*]] ], [ undef, [[BB_SPLIT]] ]
 ; CHECK-NEXT:    switch i32 undef, label [[BB5:%.*]] [
 ; CHECK-NEXT:    i32 0, label [[BB6]]
 ; CHECK-NEXT:    i32 1, label [[BB8:%.*]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bb5:

 }
 
 define void @memlcssa() {
 ; CHECK-LABEL: @memlcssa(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[DEFAULT_BB:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       entry-split:
+; CHECK:       entry.split:
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    call void @foo()
 ; CHECK-NEXT:    br label [[FOR_BODY]]
 ; CHECK:       default.bb:
 ; CHECK-NEXT:    unreachable
 ;
 entry:

llvm/trunk/test/Transforms/LoopSimplifyCFG/live_block_marking.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; REQUIRES: asserts
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(indvars,simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(indvars,simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -indvars -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
 
 define void @test(i1 %c) {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    switch i32 0, label [[ENTRY_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[DEAD_EXIT:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       entry-split:
+; CHECK:       entry.split:
 ; CHECK-NEXT:    br label [[OUTER:%.*]]
 ; CHECK:       outer:
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[TO_FOLD:%.*]], label [[LATCH:%.*]]
 ; CHECK:       to_fold:
 ; CHECK-NEXT:    br i1 [[C]], label [[LATCH]], label [[INNER_PREHEADER:%.*]]
 ; CHECK:       inner.preheader:
 ; CHECK-NEXT:    br label [[INNER:%.*]]
 ; CHECK:       inner:

llvm/trunk/test/Transforms/LoopSimplifyCFG/mssa_update.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; REQUIRES: asserts
-; XFAIL: *
 ; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
 ; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
 ; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 
 ; Make sure we update MSSA properly.
 define void @test(i32* %a, i32* %b) {

llvm/trunk/test/Transforms/LoopSimplifyCFG/update_parents.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; REQUIRES: asserts
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
-; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -debug-only=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(simplify-cfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
+; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -loop-simplifycfg -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s
 
 target triple = "x86_64-unknown-linux-gnu"
 
 define void @test() {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:    br label [[BB1:%.*]]
 ; CHECK:       bb1.loopexit:
 ; CHECK-NEXT:    br label [[BB1]]
 ; CHECK:       bb1:
 ; CHECK-NEXT:    br label [[BB2:%.*]]
 ; CHECK:       bb2.loopexit:
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    switch i32 0, label [[BB2_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[BB1_LOOPEXIT:%.*]]
 ; CHECK-NEXT:    i32 2, label [[BB2_LOOPEXIT:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       bb2-split:
+; CHECK:       bb2.split:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    br label [[BB3]]
 ;
 
   br label %bb1
 
 bb1:                                              ; preds = %bb4, %0

 ; CHECK-NEXT:    br label [[BB2:%.*]]
 ; CHECK:       bb2.loopexit:
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    switch i32 0, label [[BB2_SPLIT:%.*]] [
 ; CHECK-NEXT:    i32 1, label [[BB1_LOOPEXIT:%.*]]
 ; CHECK-NEXT:    i32 2, label [[BB2_LOOPEXIT:%.*]]
 ; CHECK-NEXT:    ]
-; CHECK:       bb2-split:
+; CHECK:       bb2.split:
 ; CHECK-NEXT:    br label [[BB3:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    br label [[BB3]]
 ;
 
   br label %bb1
 
 bb1: