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rtereshin (Roman Tereshin)
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User Since
Jan 9 2018, 11:39 AM (202 w, 4 d)

Recent Activity

Apr 29 2021

rtereshin added inline comments to D101187: [MachineCSE] Prevent CSE of non-local convergent instrs.
Apr 29 2021, 2:03 PM · Restricted Project

Apr 27 2021

rtereshin accepted D101187: [MachineCSE] Prevent CSE of non-local convergent instrs.

My suggestion is to keep making progress here:

  1. move the check out of is profitable to processBlock top level
  2. put a comprehensive comment on it outlining the issues discussed here (and off fabricator) so far
  3. do (2) in the test as well (and keep the test otherwise as is)
Apr 27 2021, 1:45 PM · Restricted Project

Apr 23 2021

rtereshin added inline comments to D101187: [MachineCSE] Prevent CSE of non-local convergent instrs.
Apr 23 2021, 6:59 PM · Restricted Project

Feb 24 2020

rtereshin committed rGb3bce6a3ddb7: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV… (authored by rtereshin).
[MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV…
Feb 24 2020, 7:10 PM
rtereshin closed D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 7:10 PM · Restricted Project
rtereshin updated the diff for D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.

Addressing the feedback (tidying up the comments a bit as discussed, going for if(! continue; instead of if() {})

Feb 24 2020, 6:33 PM · Restricted Project
rtereshin added inline comments to D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 4:09 PM · Restricted Project
rtereshin added inline comments to D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 4:00 PM · Restricted Project
rtereshin added inline comments to D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 3:33 PM · Restricted Project
rtereshin added inline comments to D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 3:24 PM · Restricted Project
rtereshin committed rG6f87b162e636: [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV, NFC (authored by rtereshin).
[MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV, NFC
Feb 24 2020, 1:34 PM
rtereshin closed D75032: [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV.
Feb 24 2020, 1:34 PM · Restricted Project
rtereshin updated the diff for D75032: [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV.

Trimming down the comments a little bit as requested.

Feb 24 2020, 1:16 PM · Restricted Project
rtereshin added inline comments to D75032: [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV.
Feb 24 2020, 1:06 PM · Restricted Project
rtereshin created D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV.
Feb 24 2020, 12:43 AM · Restricted Project
rtereshin created D75032: [MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV.
Feb 24 2020, 12:42 AM · Restricted Project

Dec 13 2019

rtereshin committed rG8731799fc6cf: [Legalizer] Making artifact combining order-independent (authored by rtereshin).
[Legalizer] Making artifact combining order-independent
Dec 13 2019, 3:55 PM
rtereshin committed rG18bf9670aac9: [Legalizer] Refactoring out legalizeMachineFunction (authored by rtereshin).
[Legalizer] Refactoring out legalizeMachineFunction
Dec 13 2019, 3:54 PM
rtereshin closed D71448: [Legalizer] Making artifact combining order-independent.
Dec 13 2019, 3:54 PM · Restricted Project
rtereshin committed rG8207c81597ad: [Legalizer] More detailed debugging printing in main loop (authored by rtereshin).
[Legalizer] More detailed debugging printing in main loop
Dec 13 2019, 3:54 PM
rtereshin updated the diff for D71448: [Legalizer] Making artifact combining order-independent.

Addressing the feedback, NFC.

Dec 13 2019, 3:27 PM · Restricted Project
rtereshin updated subscribers of D71448: [Legalizer] Making artifact combining order-independent.
Dec 13 2019, 3:18 PM · Restricted Project
rtereshin added inline comments to D71448: [Legalizer] Making artifact combining order-independent.
Dec 13 2019, 12:05 PM · Restricted Project
rtereshin updated the diff for D71448: [Legalizer] Making artifact combining order-independent.

Adding // Adding Use to ArtifactList. comment in front of WrapperObserver.changedInstr(Use); as requested, NFC.

Dec 13 2019, 11:19 AM · Restricted Project
rtereshin updated the diff for D71448: [Legalizer] Making artifact combining order-independent.

missed a test case update (arm64-fallback.ll)

Dec 13 2019, 12:44 AM · Restricted Project

Dec 12 2019

rtereshin created D71448: [Legalizer] Making artifact combining order-independent.
Dec 12 2019, 5:28 PM · Restricted Project

Nov 1 2019

rtereshin committed rG6082a062a76d: [GlobalISel] Match table opt: fix a bug in matching num of operands (authored by rtereshin).
[GlobalISel] Match table opt: fix a bug in matching num of operands
Nov 1 2019, 2:46 AM
rtereshin closed D69653: [GlobalISel] Match table opt: fix a bug in matching num of operands.
Nov 1 2019, 2:46 AM · Restricted Project
rtereshin updated the diff for D69653: [GlobalISel] Match table opt: fix a bug in matching num of operands.

Added a TableGen test as requested, though, I'm quite convinced it wasn't worth the time and will be difficult to maintain.

Nov 1 2019, 2:19 AM · Restricted Project

Oct 31 2019

rtereshin added inline comments to D69653: [GlobalISel] Match table opt: fix a bug in matching num of operands.
Oct 31 2019, 11:52 PM · Restricted Project

Oct 30 2019

rtereshin added a comment to D69653: [GlobalISel] Match table opt: fix a bug in matching num of operands.

Testcase?

Oct 30 2019, 10:20 PM · Restricted Project
rtereshin created D69653: [GlobalISel] Match table opt: fix a bug in matching num of operands.
Oct 30 2019, 9:07 PM · Restricted Project

Oct 16 2019

rtereshin accepted D69078: Move LiveRangeCalc header to the llvm/include directory to make it publicly available.
Oct 16 2019, 7:23 PM · Restricted Project

Oct 14 2019

rtereshin committed rG044297ccbfcf: [update_mir_test_checks] Handle MI flags properly (authored by rtereshin).
[update_mir_test_checks] Handle MI flags properly
Oct 14 2019, 3:02 PM
rtereshin closed D68905: [update_mir_test_checks] Handle MI flags properly.
Oct 14 2019, 3:02 PM · Restricted Project
rtereshin committed rL374829: [update_mir_test_checks] Handle MI flags properly.
[update_mir_test_checks] Handle MI flags properly
Oct 14 2019, 3:00 PM
rtereshin added inline comments to D68905: [update_mir_test_checks] Handle MI flags properly.
Oct 14 2019, 10:43 AM · Restricted Project

Oct 11 2019

rtereshin created D68905: [update_mir_test_checks] Handle MI flags properly.
Oct 11 2019, 11:07 PM · Restricted Project

Sep 18 2019

rtereshin committed rL372279: Request commit access for rtereshin.
Request commit access for rtereshin
Sep 18 2019, 5:22 PM
rtereshin committed rG84c368e2e22f: [utils] Add minimal support for MIR inputs to update_llc_test_checks.py (authored by rtereshin).
[utils] Add minimal support for MIR inputs to update_llc_test_checks.py
Sep 18 2019, 4:46 PM
rtereshin committed rG73778e9878fa: [utils] Amend update_llc_test_checks.py to non-llc tooling, NFC (authored by rtereshin).
[utils] Amend update_llc_test_checks.py to non-llc tooling, NFC
Sep 18 2019, 4:46 PM
rtereshin committed rL372277: [utils] Add minimal support for MIR inputs to update_llc_test_checks.py.
[utils] Add minimal support for MIR inputs to update_llc_test_checks.py
Sep 18 2019, 4:45 PM
rtereshin committed rL372276: [utils] Amend update_llc_test_checks.py to non-llc tooling, NFC.
[utils] Amend update_llc_test_checks.py to non-llc tooling, NFC
Sep 18 2019, 4:45 PM

Apr 18 2019

rtereshin added inline comments to D55851: Implement basic loop fusion pass.
Apr 18 2019, 4:30 PM · Restricted Project

Mar 14 2019

rtereshin accepted D59401: Fix non-determinism in Reassociate caused by address coincidences.

LGTM, please consider adding the following test:

Mar 14 2019, 9:07 PM · Restricted Project

Feb 26 2019

rtereshin abandoned D43962: [GlobalISel][utils] Adding the init version of Instruction Select Testgen.
Feb 26 2019, 9:12 AM · Restricted Project
Herald added a project to D43962: [GlobalISel][utils] Adding the init version of Instruction Select Testgen: Restricted Project.

Closing as we decided not to pursue this.

Feb 26 2019, 9:11 AM · Restricted Project

Feb 22 2019

rtereshin committed rG99a6672bba80: [LowerSwitch][AMDGPU] Do not handle impossible values (authored by rtereshin).
[LowerSwitch][AMDGPU] Do not handle impossible values
Feb 22 2019, 6:35 AM
rtereshin committed rL354670: [LowerSwitch][AMDGPU] Do not handle impossible values.
[LowerSwitch][AMDGPU] Do not handle impossible values
Feb 22 2019, 6:34 AM
rtereshin closed D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
Feb 22 2019, 6:34 AM · Restricted Project
rtereshin added a comment to D58500: [DO NOT MERGE] Explore MSSA behavior in LoopSimplifyCFG.

Shall we close this?

Feb 22 2019, 6:27 AM · Restricted Project
rtereshin added a comment to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.

Thank you!

Feb 22 2019, 6:19 AM · Restricted Project
rtereshin added a comment to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.

Is this good to go in?

Feb 22 2019, 4:23 AM · Restricted Project

Feb 20 2019

rtereshin added inline comments to D58098: [IR] Add Use::moveToFrontOfUseList() method.
Feb 20 2019, 11:14 AM · Restricted Project

Feb 19 2019

rtereshin added inline comments to D58098: [IR] Add Use::moveToFrontOfUseList() method.
Feb 19 2019, 6:50 PM · Restricted Project
rtereshin added inline comments to D58098: [IR] Add Use::moveToFrontOfUseList() method.
Feb 19 2019, 6:00 PM · Restricted Project
rtereshin added inline comments to D58098: [IR] Add Use::moveToFrontOfUseList() method.
Feb 19 2019, 4:52 PM · Restricted Project
rtereshin added a comment to D58098: [IR] Add Use::moveToFrontOfUseList() method.

This seems like it could be useful. Do you have specific places in mind where you'd take advantage of it?

Feb 19 2019, 4:33 PM · Restricted Project

Feb 18 2019

rtereshin added a comment to D58123: GlobalISel: Implement moreElementsVector for bit ops.

I've filed https://bugs.llvm.org/show_bug.cgi?id=40766 to track that.

Feb 18 2019, 2:24 PM
rtereshin accepted D58123: GlobalISel: Implement moreElementsVector for bit ops.

Thanks for addressing the comments.

Feb 18 2019, 1:51 PM
rtereshin added a reviewer for D58098: [IR] Add Use::moveToFrontOfUseList() method: dexonsmith.
Feb 18 2019, 1:37 PM · Restricted Project
rtereshin added a reviewer for D58101: Reapply "[CGP] Check for existing inttotpr before creating new one": hfinkel.
Feb 18 2019, 1:14 PM · Restricted Project
rtereshin added reviewers for D58098: [IR] Add Use::moveToFrontOfUseList() method: qcolombet, bogner.
Feb 18 2019, 11:00 AM · Restricted Project

Feb 16 2019

rtereshin added a reviewer for D58123: GlobalISel: Implement moreElementsVector for bit ops: qcolombet.
Feb 16 2019, 2:07 PM
rtereshin added a comment to D58123: GlobalISel: Implement moreElementsVector for bit ops.

Hi Matt,

Feb 16 2019, 2:02 PM

Feb 15 2019

rtereshin updated the diff for D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
  1. Addressed comments
  2. Refined the switch's operand constraints with known bits and added corresponding tests (all based on real-world cases)
Feb 15 2019, 3:12 AM · Restricted Project

Feb 14 2019

rtereshin added inline comments to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
Feb 14 2019, 11:07 PM · Restricted Project
rtereshin added inline comments to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
Feb 14 2019, 6:20 PM · Restricted Project
rtereshin added inline comments to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
Feb 14 2019, 5:57 PM · Restricted Project
rtereshin added a comment to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.

It seems weird to me that doing this somewhere else somehow ends up being more expensive, but this needs a comment somewhere explaining why it should be handled here

Feb 14 2019, 5:24 PM · Restricted Project
rtereshin added a comment to D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.

I'm not sure I see why LowerSwitch needs to worry about this optimization. Why doesn't SimplifyCFG or DCE or one of some other control flow optimization pass handle this so LowerSwitch doesn't have to worry about it?

Feb 14 2019, 11:28 AM · Restricted Project
rtereshin added a reviewer for D58096: [LowerSwitch][AMDGPU] Do not handle impossible values: marcello.maggioni.
Feb 14 2019, 11:28 AM · Restricted Project

Feb 12 2019

rtereshin added inline comments to D54468: [LoadStoreVectorizer] Fix infinite loop in reorder..
Feb 12 2019, 7:21 PM · Restricted Project

Feb 11 2019

rtereshin added a reviewer for D54468: [LoadStoreVectorizer] Fix infinite loop in reorder.: volkan.
Feb 11 2019, 11:43 PM · Restricted Project
rtereshin created D58101: Reapply "[CGP] Check for existing inttotpr before creating new one".
Feb 11 2019, 10:03 PM · Restricted Project
rtereshin created D58100: [CGP] Replace MaxMemoryUsesToScan cut-off with Use::moveToFrontOfUseList().
Feb 11 2019, 9:48 PM · Restricted Project
rtereshin created D58098: [IR] Add Use::moveToFrontOfUseList() method.
Feb 11 2019, 9:28 PM · Restricted Project
rtereshin created D58096: [LowerSwitch][AMDGPU] Do not handle impossible values.
Feb 11 2019, 9:09 PM · Restricted Project
rtereshin accepted D58080: GlobalISel: Use default rounding mode when extending fconstant.
Feb 11 2019, 4:40 PM
rtereshin added a comment to D58080: GlobalISel: Use default rounding mode when extending fconstant.

I don't think this matters since the values should all be exactly representable.

Feb 11 2019, 4:21 PM

Feb 5 2019

rtereshin added a comment to D57243: GlobalISel: Allow bitcount ops to have different result type.

The type used in this case for the result has more to do with the type required for the operations after required for the legalization. The G_SUB can be done in either width, but the narrower sub seems like a more preferable canonical form.

Feb 5 2019, 11:50 AM
rtereshin added a comment to D57243: GlobalISel: Allow bitcount ops to have different result type.

Should we revert this change to have the conversation going or am I the only one unhappy with the absence of guarantees for the other operands?

Feb 5 2019, 11:03 AM

Feb 4 2019

rtereshin added inline comments to D57243: GlobalISel: Allow bitcount ops to have different result type.
Feb 4 2019, 4:13 PM
rtereshin updated subscribers of D57243: GlobalISel: Allow bitcount ops to have different result type.
Feb 4 2019, 3:49 PM
rtereshin added inline comments to D57243: GlobalISel: Allow bitcount ops to have different result type.
Feb 4 2019, 1:14 PM

Jan 18 2019

rtereshin committed rL351626: Reapply "[CGP] Check for existing inttotpr before creating new one".
Reapply "[CGP] Check for existing inttotpr before creating new one"
Jan 18 2019, 7:43 PM
rtereshin committed rL351619: Revert "Reapply "[CGP] Check for existing inttotpr before creating new one"".
Revert "Reapply "[CGP] Check for existing inttotpr before creating new one""
Jan 18 2019, 5:58 PM
rtereshin committed rL351618: Reapply "[CGP] Check for existing inttotpr before creating new one".
Reapply "[CGP] Check for existing inttotpr before creating new one"
Jan 18 2019, 5:45 PM
rtereshin committed rL351598: Revert "[CGP] Check for existing inttotpr before creating new one".
Revert "[CGP] Check for existing inttotpr before creating new one"
Jan 18 2019, 1:43 PM
rtereshin committed rL351582: [CGP] Check for existing inttotpr before creating new one.
[CGP] Check for existing inttotpr before creating new one
Jan 18 2019, 12:19 PM
rtereshin closed D56838: [CGP] Check for existing inttotpr before creating new one.
Jan 18 2019, 12:19 PM

Jan 17 2019

rtereshin added a comment to D56838: [CGP] Check for existing inttotpr before creating new one.

Can we run EarlyCSE after CGP (instead of trying to do these kinds of point fixes)?

Hi Hal,

Thank you for looking into this!

That's a great suggestion! Originally I just eyeballed it as too expensive compile-time wise for the little effect that is achieved here.

This time around with you pointing it out, I performed the actual measurements for a very large suite of shaders (the downstream target in question is a GPU). I see about 1.0 (+/-0.3)% increase in overall compile time (the part of it that happens at an application run-time) on average. The generated code quality improvement that comes out of this may be important, but it doesn't trigger often enough to justify 1% compile time increase across the board.

Thanks,
Roman

Fair enough. Thanks for checking.

I have a comment about the test case, but otherwise LGTM.

Jan 17 2019, 10:52 PM
rtereshin updated the diff for D56838: [CGP] Check for existing inttotpr before creating new one.

Updated the test as requested

Jan 17 2019, 10:52 PM
rtereshin added reviewers for D56838: [CGP] Check for existing inttotpr before creating new one: bogner, hfinkel.
Jan 17 2019, 4:26 PM
rtereshin added a comment to D56838: [CGP] Check for existing inttotpr before creating new one.

Can we run EarlyCSE after CGP (instead of trying to do these kinds of point fixes)?

Jan 17 2019, 4:26 PM
rtereshin created D56838: [CGP] Check for existing inttotpr before creating new one.
Jan 17 2019, 2:58 AM

Oct 31 2018

rtereshin accepted D53189: [SCEV] Avoid redundant computations when doing AddRec merge.

Do you think it's better to remove the NFC tag from the patch? It doesn't look like it's completely NFC, though, I've tested this out for a major (though, out of tree) GPU target on a very large suite of shaders and found no difference.

Oct 31 2018, 12:52 PM
rtereshin accepted D53447: [adt] SparseBitVector::test() should be const.

LGTM, thanks for doing this!

Oct 31 2018, 10:34 AM

Oct 19 2018

rtereshin committed rL344822: [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again).
[MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)
Oct 19 2018, 5:08 PM
rtereshin closed D53144: [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again).
Oct 19 2018, 5:08 PM