Try to organize MachineVerifier tests

[arsenm]

Summary

The Verifier is separate from the MachineVerifier, so move it to a
different directory. Some other verifier tests were scattered in
target codegen tests as well (although I'm sure I missed some). Work
towards using a more consistent naming scheme to make it clearer where
the gaps still are for generic instructions.

[aditya_nandakumar]

LGTM. Thanks for this change.

[arsenm]

r354138

test/MachineVerifier/test_g_build_vector.mir

 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
   define i32 @g_build_vector() {
     ret i32 0
   }
 
 ...
 ---
 name:            g_build_vector
 legalized:       true
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR src operands total size don't match dest size
 
     %0(s32) = IMPLICIT_DEF
     %1:_(<2 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0
 ...

test/MachineVerifier/test_g_build_vector_trunc.mir

 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
   define i32 @g_build_vector_trunc() {
     ret i32 0
   }
 
 ...
 ---
 name:            g_build_vector_trunc
 legalized:       true
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR_TRUNC source operand types are not larger than dest elt type
 
     %0(s32) = IMPLICIT_DEF
     %1:_(<2 x s32>) = G_BUILD_VECTOR_TRUNC %0, %0
 ...

test/MachineVerifier/verifier-generic-extend-truncate.mir

 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
 # CHECK-NEXT: - function:    bad_generic_extends_and_truncates
 # CHECK-NEXT: - basic block: %bb.1
 # CHECK-NEXT: - instruction: %t_p:_(s32) = G_TRUNC %p:_(p0)
 
 # CHECK: Bad machine code: operand types must be all-vector or all-scalar
 # CHECK-NEXT: - function:    bad_generic_extends_and_truncates

test/MachineVerifier/verifier-generic-types-1.mir

 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK-NOT: Type mismatch
 
 # CHECK: Bad machine code: Generic instruction is missing a virtual register type
 # CHECK-NEXT: - function:    first_type_of_a_type_index_missing_and_no_mismatches
 # CHECK-NEXT: - basic block: %bb.0
 # CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
 # CHECK-NEXT: - operand 0:   %2:gr64

test/MachineVerifier/verifier-generic-types-2.mir

 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic instruction is missing a virtual register type
 # CHECK-NEXT: - function:    first_type_of_a_type_index_missing_and_a_mismatch
 # CHECK-NEXT: - basic block: %bb.0
 # CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
 # CHECK-NEXT: - operand 0:   %2:gr64
 
 # CHECK: Bad machine code: Type mismatch in generic instruction

test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir

 # RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+# REQUIRES: amdgpu-registered-target
 
 # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
 
 
 # ERROR: *** Bad machine code: Using an undefined physical register ***
 # ERROR: instruction: S_ENDPGM implicit %0:vgpr_32, implicit $vcc
 # ERROR: operand 1:   implicit $vcc
 

test/MachineVerifier/verifier-phi-fail0.mir

 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
+
 ---
 # CHECK: Bad machine code: PHI operand is not live-out from predecessor
 # CHECK: - function:    func0
 # CHECK: - basic block: %bb.3
 # CHECK: - instruction: %0:gr32 = PHI
 # CHECK: - operand 1:   %1
 #
 # CHECK: Bad machine code: PHI operand is not live-out from predecessor

test/MachineVerifier/verifier-phi.mir

 # RUN: llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none | FileCheck %s
+# REQUIRES: x86-registered-target
+
 # This should cleanly pass the machine verifier
 ---
 # CHECK-LABEL: name: func0
 # CHECK: %0:gr32 = PHI undef %1:gr32, %bb.0, undef %1:gr32, %bb.1
 name: func0
 tracksRegLiveness: true
 body: |
   bb.0:

test/MachineVerifier/verifier-pseudo-terminators.mir

 # RUN: not llc -march=amdgcn -run-pass=verify %s 2>&1 | FileCheck %s
+# REQUIRES: amdgpu-registered-target
+
 # Make sure that mismatched successors are caught when a _term
 # instruction is used
 
 # CHECK: *** Bad machine code: MBB exits via unconditional branch but the CFG successor doesn't match the actual successor! ***
 
 ---
 name: verifier_pseudo_terminators
 body:             |

test/MachineVerifier/verify-regbankselected.mir

 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |
 
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64--"
   define void @test() { ret void }
 
 ...

test/MachineVerifier/verify-selected.mir

 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |
 
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64--"
   define void @test() { ret void }
 
 ...