[CUDA][HIP] Check calling convention based on function target

[yaxunl]

Summary

MSVC header files using vectorcall to differentiate overloaded functions, which
causes failure for AMDGPU target. This is because clang does not check function
calling convention based on function target.

This patch checks calling convention using the proper target info.

[yaxunl]

My last fix is not right. This patch fixes the issue by checking calling convention based on whether it is host or device function.

[tra]

lib/Sema/SemaDeclAttr.cpp

4621–4638

This is rather convoluted.
Perhaps it would be easier to understand if the code is restructured. along these lines:

// Returns a tuple indicating whether we need to check TargetInfo on host/device side of the compilation
bool CheckHost = false, CheckDevice=false;

switch (CudaTarget) { 
    case CFT_HostDevice: 
      CheckHost = true; CheckDevice=true; break;
    case CFT_Host: 
      CheckHost = true; break;
    case CFG_Device: 
    case CFG_Global: 
      CheckDevice=true; break;
  }
} ();
TargetInfo *HostTI = CudaIsDevice ? Aux : &TI;
TargetInfo * DeviceTI = CudaIsDevice ? &TI : Aux;
if (CheckHost && HostTI)
  HostTI->checkCallingConvention(CC);
if (CheckDevice && DeviceTI)
    DeviceTI->checkCallingConvention(CC);

test/SemaCUDA/amdgpu-windows-vectorcall.cu

4

It may be good to add a check where we *would* expect to see the diagnostics.

[yaxunl]

Revised by Artem's comments.

[tra]

test/SemaCUDA/amdgpu-windows-vectorcall.cu

4

It may be good to add a check where we *would* expect to see the diagnostics.

Scratch that. Wrong calling convention attribute will be ignored.

10–11

I don't think we need templates here. We're only making sure that the function attributes are handled correctly.
Can we get by with a regular function declaration or definition?

[yaxunl]

test/SemaCUDA/amdgpu-windows-vectorcall.cu

10–11

Here we want to make sure _Ret (__cdecl _Arg0::*)(_Types) and _Ret (__vectorcall _Arg0::*)(_Types) are different types because calling convention is part of type, otherwise it results in compilation error due to duplicate template instantation. I can come up with a test without template.

[yaxunl]

modify test to use non-template functions.

[yaxunl]

ping

[tra]

LGTM.

[rjmccall]

lib/Sema/SemaDeclAttr.cpp

4619

Please sink these declarations into the CUDA-specific block. Also, please add some comments to explain why different logic is needed for CUDA.

[yaxunl]

lib/Sema/SemaDeclAttr.cpp

4619

will do. thanks.

[yaxunl]

lib/Sema/SemaDeclAttr.cpp

4619

variables A and TI are also used by else part of the if statement, so only variable Aux can be moved in the if part.

[rjmccall]

lib/Sema/SemaDeclAttr.cpp

4619

Yes, sorry, only your new declaration needs to be sunk.

include/clang/Basic/Specifiers.h

enum CallingConv {
     CC_AAPCS_VFP,   // __attribute__((pcs("aapcs-vfp")))
     CC_IntelOclBicc, // __attribute__((intel_ocl_bicc))
     CC_SpirFunction, // default for OpenCL functions on SPIR target
     CC_OpenCLKernel, // inferred for OpenCL kernels
     CC_Swift,        // __attribute__((swiftcall))
     CC_PreserveMost, // __attribute__((preserve_most))
     CC_PreserveAll,  // __attribute__((preserve_all))
     CC_AArch64VectorCall, // __attribute__((aarch64_vector_pcs))
+    CC_AMDGPUVectorCall, // __attribute__((vectorcall))
   };
 
   /// Checks whether the given calling convention supports variadic
   /// calls. Unprototyped calls also use the variadic call rules.
   inline bool supportsVariadicCall(CallingConv CC) {
     switch (CC) {
     case CC_X86StdCall:
     case CC_X86FastCall:

lib/AST/ItaniumMangle.cpp

 }
 
 StringRef CXXNameMangler::getCallingConvQualifierName(CallingConv CC) {
   switch (CC) {
   case CC_C:
     return "";
 
   case CC_X86VectorCall:
+  case CC_AMDGPUVectorCall:
   case CC_X86Pascal:
   case CC_X86RegCall:
   case CC_AAPCS:
   case CC_AAPCS_VFP:
   case CC_AArch64VectorCall:
   case CC_IntelOclBicc:
   case CC_SpirFunction:
   case CC_OpenCLKernel:

lib/AST/Type.cpp

 StringRef FunctionType::getNameForCallConv(CallingConv CC) {
   switch (CC) {
   case CC_C: return "cdecl";
   case CC_X86StdCall: return "stdcall";
   case CC_X86FastCall: return "fastcall";
   case CC_X86ThisCall: return "thiscall";
   case CC_X86Pascal: return "pascal";
   case CC_X86VectorCall: return "vectorcall";
+  case CC_AMDGPUVectorCall: return "amdgpu_vectorcall";
   case CC_Win64: return "ms_abi";
   case CC_X86_64SysV: return "sysv_abi";
   case CC_X86RegCall : return "regcall";
   case CC_AAPCS: return "aapcs";
   case CC_AAPCS_VFP: return "aapcs-vfp";
   case CC_AArch64VectorCall: return "aarch64_vector_pcs";
   case CC_IntelOclBicc: return "intel_ocl_bicc";
   case CC_SpirFunction: return "spir_function";

lib/AST/TypePrinter.cpp

case CC_X86StdCall:
       break;
     case CC_X86FastCall:
       OS << " __attribute__((fastcall))";
       break;
     case CC_X86ThisCall:
       OS << " __attribute__((thiscall))";
       break;
     case CC_X86VectorCall:
+    case CC_AMDGPUVectorCall:
       OS << " __attribute__((vectorcall))";
       break;
     case CC_X86Pascal:
       OS << " __attribute__((pascal))";
       break;
     case CC_AAPCS:
       OS << " __attribute__((pcs(\"aapcs\")))";
       break;

lib/Basic/Targets/AMDGPU.h

public:
   }
 
   CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
     switch (CC) {
     default:
       return CCCR_Warning;
     case CC_C:
     case CC_OpenCLKernel:
+    case CC_AMDGPUVectorCall:
       return CCCR_OK;
     }
   }
 
   // In amdgcn target the null pointer in global, constant, and generic
   // address space has value 0 but in private and local address space has
   // value ~0.
   uint64_t getNullPointerValue(LangAS AS) const override {

lib/CodeGen/CGCall.cpp

unsigned CodeGenTypes::ClangCallConvToLLVMCallConv(CallingConv CC) {
   case CC_X86_64SysV: return llvm::CallingConv::X86_64_SysV;
   case CC_AAPCS: return llvm::CallingConv::ARM_AAPCS;
   case CC_AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP;
   case CC_IntelOclBicc: return llvm::CallingConv::Intel_OCL_BI;
   // TODO: Add support for __pascal to LLVM.
   case CC_X86Pascal: return llvm::CallingConv::C;
   // TODO: Add support for __vectorcall to LLVM.
   case CC_X86VectorCall: return llvm::CallingConv::X86_VectorCall;
+  case CC_AMDGPUVectorCall: return llvm::CallingConv::C;
   case CC_AArch64VectorCall: return llvm::CallingConv::AArch64_VectorCall;
   case CC_SpirFunction: return llvm::CallingConv::SPIR_FUNC;
   case CC_OpenCLKernel: return CGM.getTargetCodeGenInfo().getOpenCLKernelCallingConv();
   case CC_PreserveMost: return llvm::CallingConv::PreserveMost;
   case CC_PreserveAll: return llvm::CallingConv::PreserveAll;
   case CC_Swift: return llvm::CallingConv::Swift;
   }
 }

lib/CodeGen/CGDebugInfo.cpp

return DBuilder.createTypedef(
       getOrCreateType(Ty->getDecl()->getUnderlyingType(), Unit),
       Ty->getDecl()->getName(), getOrCreateFile(Loc), getLineNumber(Loc),
       getDeclContextDescriptor(Ty->getDecl()));
 }
 
 static unsigned getDwarfCC(CallingConv CC) {
   switch (CC) {
   case CC_C:
+  case CC_AMDGPUVectorCall:
     // Avoid emitting DW_AT_calling_convention if the C convention was used.
     return 0;
 
   case CC_X86StdCall:
     return llvm::dwarf::DW_CC_BORLAND_stdcall;
   case CC_X86FastCall:
     return llvm::dwarf::DW_CC_BORLAND_msfastcall;
   case CC_X86ThisCall:

lib/Sema/SemaDeclAttr.cpp

case ParsedAttr::AT_ThisCall:
     break;
   case ParsedAttr::AT_Pascal:
     CC = CC_X86Pascal;
     break;
   case ParsedAttr::AT_SwiftCall:
     CC = CC_Swift;
     break;
   case ParsedAttr::AT_VectorCall:
-    CC = CC_X86VectorCall;
+    CC = Context.getTargetInfo().getTriple().isAMDGPU()
+      ? CC_AMDGPUVectorCall : CC_X86VectorCall;
     break;
   case ParsedAttr::AT_AArch64VectorPcs:
     CC = CC_AArch64VectorCall;
     break;
   case ParsedAttr::AT_RegCall:
     CC = CC_X86RegCall;
     break;
   case ParsedAttr::AT_MSABI:
case ParsedAttr::AT_PreserveMost:
     break;
   case ParsedAttr::AT_PreserveAll:
     CC = CC_PreserveAll;
     break;
   default: llvm_unreachable("unexpected attribute kind");
   }
 
   const TargetInfo &TI = Context.getTargetInfo();
   TargetInfo::CallingConvCheckResult A = TI.checkCallingConvention(CC);
   if (A != TargetInfo::CCCR_OK) {
     if (A == TargetInfo::CCCR_Warning)
       Diag(Attrs.getLoc(), diag::warn_cconv_ignored) << Attrs;
 
     // This convention is not valid for the target. Use the default function or
     // method calling convention.
     bool IsCXXMethod = false, IsVariadic = false;
     if (FD) {
       IsCXXMethod = FD->isCXXInstanceMember();
       IsVariadic = FD->isVariadic();
     }
     CC = Context.getDefaultCallingConvention(IsVariadic, IsCXXMethod);
   }
 
   Attrs.setProcessingCache((unsigned) CC);
   return false;
 }
 
 /// Pointer-like types in the default address space.
 static bool isValidSwiftContextType(QualType Ty) {
   if (!Ty->hasPointerRepresentation())
     return Ty->isDependentType();
   return Ty->getPointeeType().getAddressSpace() == LangAS::Default;
 }
 
 /// Pointers and references in the default address space.
 static bool isValidSwiftIndirectResultType(QualType Ty) {

test/SemaCUDA/amdgpu-windows-vectorcall.cu

+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -aux-triple x86_64-pc-windows-msvc -fms-compatibility -fcuda-is-device -fsyntax-only -verify %s
+
+// expected-no-diagnostics
+template<class _Ty>
+ struct A
+ {
+ };
+
+template<class _Ret, class _Arg0, class _Types> struct A<_Ret (__cdecl _Arg0::*)(_Types) > { }; 
+template<class _Ret, class _Arg0, class _Types> struct A<_Ret (__vectorcall _Arg0::*)(_Types) > {};
+