[PPC64] Set the number of relocations processed for R_PPC64_TLS[GL]D to 2

[MaskRay]

Summary

R_PPC64_TLSGD and R_PPC64_TLSLD are used as markers on TLS code sequences. For GD-to-IE and GD-to-LE relaxations, the next relocation R_PPC64_REL24 should be skipped to avoid "undefined symbol" (__tls_get_addr) error when linking statically.

R_PPC64_GOT_TLSGD16_HA
R_PPC64_GOT_TLSGD16_LO
R_PPC64_TLSGD R_TLSDESC_CALL
R_PPC64_REL24 __tls_get_addr

[MaskRay]

drop an inadvertent change

[MaskRay]

Not directly related to the issue but I want to know whether it is allowed to have other relocation types between R_PPC64_GOT_TLSGD16_HA and R_PPC64_GOT_TLSGD16_LO. Below is one example:

1748:       00 00 62 3c     addis   r3,r2,0
                    1748: R_PPC64_GOT_TLSGD16_HA    foo
174c:       80 00 9f f8     std     r4,128(r31)
1750:       00 00 88 38     addi    r4,r8,0
                    1750: R_PPC64_TOC16_LO  .rodata.str1.1+0x364
1754:       00 00 63 38     addi    r3,r3,0
                    1754: R_PPC64_GOT_TLSGD16_LO    foo
1758:       78 00 9f f8     std     r4,120(r31)
175c:       01 00 00 48     bl      175c <foo+0x1dc>
                    175c: R_PPC64_TLSGD     foo
                    175c: R_PPC64_REL24     __tls_get_addr

If this is allowed. Is there any restriction on the TLS code sequence? e.g. Is it allowed to omit R_PPC64_GOT_TLSGD16_HA or swap the order of some sequences?

[sfertile]

In D57673#1382845, @MaskRay wrote:

If this is allowed. Is there any restriction on the TLS code sequence? e.g. Is it allowed to omit R_PPC64_GOT_TLSGD16_HA?

In general other relocations are allowed to show up in-between the TLS relocations. You can omit the R_PPC64_GOT_TLSGD16_HA relocation and use a R_PPC64_GOT_TLSGD16 instead of the _LO. Clang and xlc don't do that but gcc will with small code model (clang not doing it is likely a bug, xlc doesn't support small code model for V2 abi).

In D57673#1382845, @MaskRay wrote:

or swap the order of some sequences?

I hadn't considered this before. I don't belive there is an abi guarantee that the HA/HI comes before the low so something like:

addi 3, 2, i@got@tlsgd@l
addis 3, 3, i@got@tlsgd@ha
bl __tls_get_addr(i@tlsgd)
nop

Is potentially valid, while the tls optimizations we produce in lld are likely invlaid :(. I'll have to look into this a bit deeper.

[sfertile]

LGTM other then 1 minor comment.

ELF/Arch/PPC64.cpp

246

I think we should describe it a bit more in depth as its not clear why we skip 2 unless you are familiar with PPC64 tls already. maybe along the lines of:

The calls to __tls_get_addr are marked with 2 relocations on the call instructions. The first is a TLS hint to tie the call to its tls related arguments,  the second relocation is the R_PPC64_REL24 used to speicfy the target of the call. When we relax the tls sequnce we no longer need the call and should skip both relocations to not create a false dependence on __tls_get_addr being defined.

[MaskRay]

Update comment

[MaskRay]

Fix a typo

[MaskRay]

ELF/Arch/PPC64.cpp

246

Added a comment with your suggestion in mind. Does it look good?

[sfertile]

ELF/Arch/PPC64.cpp

246

Yeah, that's perfect.

[MaskRay]

Rebase

[ruiu]

LGTM

ELF/Arch/PPC64.cpp

bool elf::isPPC64SmallCodeModelReloc(RelType Type) {
   return Type == R_PPC64_GOT16 || Type == R_PPC64_TOC16 ||
          Type == R_PPC64_TOC16_DS;
 }
 
 namespace {
 class PPC64 final : public TargetInfo {
 public:
   PPC64();
+  int getTlsGdRelaxSkip(RelType Type) const override;
   uint32_t calcEFlags() const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void writeGotHeader(uint8_t *Buf) const override;
PPC64::PPC64() {
   //
   // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers
   // use 0x10000000 as the starting address.
   DefaultImageBase = 0x10000000;
 
   write32(TrapInstr.data(), 0x7fe00008);
 }
 
+int PPC64::getTlsGdRelaxSkip(RelType Type) const {
+  // A __tls_get_addr call instruction is marked with 2 relocations:
+  //
+  //   R_PPC64_TLSGD / R_PPC64_TLSLD: marker relocation
+  //   R_PPC64_REX24:  __tls_get_addr
+  //
+  // After the relaxation we no longer need to call __tls_get_addr and should
+  // skip both relocations to not create a false dependence on __tls_get_addr
+  // being defined.
+  if (Type == R_PPC64_TLSGD || Type == R_PPC64_TLSLD)
+    return 2;
+  return 1;
+}
+
 static uint32_t getEFlags(InputFile *File) {
   if (Config->EKind == ELF64BEKind)
     return cast<ObjFile<ELF64BE>>(File)->getObj().getHeader()->e_flags;
   return cast<ObjFile<ELF64LE>>(File)->getObj().getHeader()->e_flags;
 }
 
 // This file implements v2 ABI. This function makes sure that all
 // object files have v2 or an unspecified version as an ABI version.

ELF/Arch/X86.cpp

 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 class X86 : public TargetInfo {
 public:
   X86();
+  int getTlsGdRelaxSkip(RelType Type) const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
   int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
   void writeGotPltHeader(uint8_t *Buf) const override;
   RelType getDynRel(RelType Type) const override;
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
   void writeIgotPlt(uint8_t *Buf, const Symbol &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
X86::X86() {
   RelativeRel = R_386_RELATIVE;
   TlsGotRel = R_386_TLS_TPOFF;
   TlsModuleIndexRel = R_386_TLS_DTPMOD32;
   TlsOffsetRel = R_386_TLS_DTPOFF32;
   GotEntrySize = 4;
   GotPltEntrySize = 4;
   PltEntrySize = 16;
   PltHeaderSize = 16;
-  TlsGdRelaxSkip = 2;
   TrapInstr = {0xcc, 0xcc, 0xcc, 0xcc}; // 0xcc = INT3
 
   // Align to the non-PAE large page size (known as a superpage or huge page).
   // FreeBSD automatically promotes large, superpage-aligned allocations.
   DefaultImageBase = 0x400000;
 }
 
+int X86::getTlsGdRelaxSkip(RelType Type) const {
+  return 2;
+}
+
 static bool hasBaseReg(uint8_t ModRM) { return (ModRM & 0xc7) != 0x5; }
 
 RelExpr X86::getRelExpr(RelType Type, const Symbol &S,
                         const uint8_t *Loc) const {
   switch (Type) {
   case R_386_8:
   case R_386_16:
   case R_386_32:

ELF/Arch/X86_64.cpp

 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 template <class ELFT> class X86_64 : public TargetInfo {
 public:
   X86_64();
+  int getTlsGdRelaxSkip(RelType Type) const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
   RelType getDynRel(RelType Type) const override;
   void writeGotPltHeader(uint8_t *Buf) const override;
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
template <class ELFT> X86_64<ELFT>::X86_64() {
   IRelativeRel = R_X86_64_IRELATIVE;
   TlsGotRel = R_X86_64_TPOFF64;
   TlsModuleIndexRel = R_X86_64_DTPMOD64;
   TlsOffsetRel = R_X86_64_DTPOFF64;
   GotEntrySize = 8;
   GotPltEntrySize = 8;
   PltEntrySize = 16;
   PltHeaderSize = 16;
-  TlsGdRelaxSkip = 2;
   TrapInstr = {0xcc, 0xcc, 0xcc, 0xcc}; // 0xcc = INT3
 
   // Align to the large page size (known as a superpage or huge page).
   // FreeBSD automatically promotes large, superpage-aligned allocations.
   DefaultImageBase = 0x200000;
 }
 
 template <class ELFT>
+int X86_64<ELFT>::getTlsGdRelaxSkip(RelType Type) const {
+  return 2;
+}
+
+template <class ELFT>
 RelExpr X86_64<ELFT>::getRelExpr(RelType Type, const Symbol &S,
                                  const uint8_t *Loc) const {
   switch (Type) {
   case R_X86_64_8:
   case R_X86_64_16:
   case R_X86_64_32:
   case R_X86_64_32S:
   case R_X86_64_64:

ELF/Relocations.cpp

handleTlsRelocation(RelType Type, Symbol &Sym, InputSectionBase &C,
 
   if (isRelExprOneOf<R_TLSLD_GOT, R_TLSLD_GOT_FROM_END, R_TLSLD_PC,
                      R_TLSLD_HINT>(Expr)) {
     // Local-Dynamic relocs can be relaxed to Local-Exec.
     if (!Config->Shared) {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_LD_TO_LE), Type,
            Offset, Addend, &Sym});
-      return Target->TlsGdRelaxSkip;
+      return Target->getTlsGdRelaxSkip(Type);
     }
     if (Expr == R_TLSLD_HINT)
       return 1;
     if (In.Got->addTlsIndex())
       In.RelaDyn->addReloc(Target->TlsModuleIndexRel, In.Got,
                            In.Got->getTlsIndexOff(), nullptr);
     C.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return 1;
if (Sym.IsPreemptible) {
         In.RelaDyn->addReloc(Target->TlsGotRel, In.Got, Sym.getGotOffset(),
                              &Sym);
       }
     } else {
       C.Relocations.push_back(
           {Target->adjustRelaxExpr(Type, nullptr, R_RELAX_TLS_GD_TO_LE), Type,
            Offset, Addend, &Sym});
     }
-    return Target->TlsGdRelaxSkip;
+    return Target->getTlsGdRelaxSkip(Type);
   }
 
   // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally
   // defined.
   if (isRelExprOneOf<R_GOT, R_GOT_FROM_END, R_GOT_PC, R_AARCH64_GOT_PAGE_PC,
                      R_GOT_OFF, R_TLSIE_HINT>(Expr) &&
       !Config->Shared && !Sym.IsPreemptible) {
     C.Relocations.push_back({R_RELAX_TLS_IE_TO_LE, Type, Offset, Addend, &Sym});

ELF/Target.h

 public:
   virtual uint32_t calcEFlags() const { return 0; }
   virtual RelType getDynRel(RelType Type) const { return Type; }
   virtual void writeGotPltHeader(uint8_t *Buf) const {}
   virtual void writeGotHeader(uint8_t *Buf) const {}
   virtual void writeGotPlt(uint8_t *Buf, const Symbol &S) const {};
   virtual void writeIgotPlt(uint8_t *Buf, const Symbol &S) const;
   virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
+  virtual int getTlsGdRelaxSkip(RelType Type) const { return 1; }
 
   // If lazy binding is supported, the first entry of the PLT has code
   // to call the dynamic linker to resolve PLT entries the first time
   // they are called. This function writes that code.
   virtual void writePltHeader(uint8_t *Buf) const {}
 
   virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                         uint64_t PltEntryAddr, int32_t Index,
virtual bool inBranchRange(RelType Type, uint64_t Src,
                              uint64_t Dst) const;
   virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
                              const uint8_t *Loc) const = 0;
 
   virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
 
   virtual ~TargetInfo();
 
-  unsigned TlsGdRelaxSkip = 1;
   unsigned PageSize = 4096;
   unsigned DefaultMaxPageSize = 4096;
 
   uint64_t getImageBase();
 
   // Offset of _GLOBAL_OFFSET_TABLE_ from base of .got or .got.plt section.
   uint64_t GotBaseSymOff = 0;
   // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got.

test/ELF/ppc64-gd-to-ie.s

.Lfunc_lep1:
         nop
         lwa 3, 0(3)
         add 3, 4, 3
         addi 1, 1, 32
         ld 0, 16(1)
         mtlr 0
         blr
 
-        .globl __tls_get_addr
-        .type __tls_get_addr,@function
-__tls_get_addr:
-
 
 # CheckGot: .got          00000018 00000000100200c0 DATA
 # .got is at 0x100200c0 so the toc-base is 100280c0.
 # `a` is at .got[1], we expect the offsets to be:
 # Ha(a) = ((0x100200c8  - 0x100280c0) + 0x8000) >> 16 = 0
 # Lo(a) = (0x100200c8  - 0x100280c0) = -32760
 
 # Dis-LABEL: _start

test/ELF/ppc64-tls-gd-le.s

# %bb.0:                                # %entry
   ld 31, -8(1)
   mtlr 0
   blr
   .long 0
   .quad 0
 .Lfunc_end0:
   .size _start, .Lfunc_end0-.Lfunc_begin0
 
-.globl __tls_get_addr
-.type __tls_get_addr,@function
-__tls_get_addr:
-
                                         # -- End function
   .type a,@object               # @a
   .section  .tdata,"awT",@progbits
   .globl  a
   .p2align  2
 a:
   .long 55                      # 0x37
   .size a, 4