[LLD] [COFF] Add support for the new relocations IMAGE_REL_ARM{,64}_REL32

[pcc]

LGTM

[mstorsjo]

Adding the same for IMAGE_REL_ARM_REL32 as well.

[pcc]

COFF/Chunks.cpp

201

Are you sure that this is S and not SX?

[mstorsjo]

COFF/Chunks.cpp

201

Oh, great catch. Indeed, this should be SX, after crosschecking with link.exe.

[mstorsjo]

Using SX instead of S for the ARM relocation, extended the testcase with a relocation against a data section as well.

[pcc]

LGTM

[ruiu]

LGTM

COFF/Chunks.cpp

void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, OutputSection *OS,
   case IMAGE_REL_ARM_ADDR32:    add32(Off, SX + Config->ImageBase); break;
   case IMAGE_REL_ARM_ADDR32NB:  add32(Off, SX); break;
   case IMAGE_REL_ARM_MOV32T:    applyMOV32T(Off, SX + Config->ImageBase); break;
   case IMAGE_REL_ARM_BRANCH20T: applyBranch20T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_BRANCH24T: applyBranch24T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_BLX23T:    applyBranch24T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_SECTION:   applySecIdx(Off, OS); break;
   case IMAGE_REL_ARM_SECREL:    applySecRel(this, Off, OS, S); break;
+  case IMAGE_REL_ARM_REL32:     add32(Off, S - P - 4); break;
   default:
     error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 // Interpret the existing immediate value as a byte offset to the
 // target symbol, then update the instruction with the immediate as
void SectionChunk::applyRelARM64(uint8_t *Off, uint16_t Type, OutputSection *OS,
   case IMAGE_REL_ARM64_ADDR32:         add32(Off, S + Config->ImageBase); break;
   case IMAGE_REL_ARM64_ADDR32NB:       add32(Off, S); break;
   case IMAGE_REL_ARM64_ADDR64:         add64(Off, S + Config->ImageBase); break;
   case IMAGE_REL_ARM64_SECREL:         applySecRel(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_LOW12A:  applySecRelLow12A(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_HIGH12A: applySecRelHigh12A(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_LOW12L:  applySecRelLdr(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECTION:        applySecIdx(Off, OS); break;
+  case IMAGE_REL_ARM64_REL32:          add32(Off, S - P - 4); break;
   default:
     error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 static void maybeReportRelocationToDiscarded(const SectionChunk *FromChunk,
                                              Defined *Sym,

test/COFF/arm64-relocs-imports.test

 # BEFORE:       7c:       01 00 00 00     udf #1
 # BEFORE:       80:       00 00 00 91     add     x0, x0, #0
 # BEFORE:       84:       00 00 40 91     add     x0, x0, #0, lsl #12
 # BEFORE:       88:       00 00 40 f9     ldr     x0, [x0]
 # BEFORE:       8c:       01 00 00 00     udf #1
 # BEFORE:       90:       20 1a 09 30     adr x0, #74565
 # BEFORE:       94:       01 00 00 54     b.ne    #0
 # BEFORE:       98:       00 00 00 36     tbz     w0, #0, #0
+# BEFORE:       9c:       01 00 00 00     udf #1
 
 # AFTER: Disassembly of section .text:
 # AFTER:  140001000:      fe 0f 1f f8     str     x30, [sp, #-16]!
 # AFTER:  140001004:      00 00 00 b0     adrp    x0, #4096
 # AFTER:  140001008:      00 18 00 91     add     x0, x0, #6
-# AFTER:  14000100c:      24 00 00 94     bl      #144
+# AFTER:  14000100c:      25 00 00 94     bl      #148
 # AFTER:  140001010:      00 21 40 39     ldrb    w0, [x8, #8]
 # AFTER:  140001014:      00 11 40 79     ldrh    w0, [x8, #8]
 # AFTER:  140001018:      00 09 40 b9     ldr     w0, [x8, #8]
 # AFTER:  14000101c:      00 05 40 f9     ldr     x0, [x8, #8]
 # AFTER:  140001020:      00 21 00 39     strb    w0, [x8, #8]
 # AFTER:  140001024:      00 11 00 79     strh    w0, [x8, #8]
 # AFTER:  140001028:      00 09 00 b9     str     w0, [x8, #8]
 # AFTER:  14000102c:      00 05 00 f9     str     x0, [x8, #8]

 # AFTER:  140001074:      01 00 00 00     udf #1
 # AFTER:  140001078:      09 20 00 00     udf #8201
 # AFTER:  14000107c:      09 00 00 00     udf #9
 # AFTER:  140001080:      00 20 0e 91     add     x0, x0, #904
 # AFTER:  140001084:      00 04 40 91     add     x0, x0, #1, lsl #12
 # AFTER:  140001088:      00 c4 41 f9     ldr     x0, [x0, #904]
 # AFTER:  14000108c:      03 00 00 00     udf #3
 # AFTER:  140001090:      e0 95 09 30     adr     x0, #78525
-# AFTER:  140001094:      41 00 00 54     b.ne    #8
-# AFTER:  140001098:      20 00 00 36     tbz     w0, #0, #4
-# AFTER:  14000109c:      10 00 00 b0     adrp    x16, #4096
-# AFTER:  1400010a0:      10 2a 40 f9     ldr     x16, [x16, #80]
-# AFTER:  1400010a4:      00 02 1f d6     br      x16
+# AFTER:  140001094:      61 00 00 54     b.ne    #12
+# AFTER:  140001098:      40 00 00 36     tbz     w0, #0, #8
+# AFTER:  14000109c:      61 ff ff ff     <unknown>
+# AFTER:  1400010a0:      10 00 00 b0     adrp    x16, #4096
+# AFTER:  1400010a4:      10 2a 40 f9     ldr     x16, [x16, #80]
+# AFTER:  1400010a8:      00 02 1f d6     br      x16
 
 --- !COFF
 header:
   Machine:         IMAGE_FILE_MACHINE_ARM64
   Characteristics: [  ]
 sections:
   - Name:            .text
     Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
     Alignment:       4
-    SectionData:     FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD6080000000000000001000000010000000000009100004091000040f901000000201a09300100005400000036
+    SectionData:     FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD6080000000000000001000000010000000000009100004091000040f901000000201a0930010000540000003601000000
     Relocations:
       - VirtualAddress:  4
         SymbolName:      .Lstr
         Type:            IMAGE_REL_ARM64_PAGEBASE_REL21
       - VirtualAddress:  8
         SymbolName:      .Lstr
         Type:            IMAGE_REL_ARM64_PAGEOFFSET_12A
       - VirtualAddress:  12
Relocations:
         SymbolName:      .Lglobal
         Type:            IMAGE_REL_ARM64_REL21
       - VirtualAddress:  148
         SymbolName:      function
         Type:            IMAGE_REL_ARM64_BRANCH19
       - VirtualAddress:  152
         SymbolName:      function
         Type:            IMAGE_REL_ARM64_BRANCH14
+      - VirtualAddress:  156
+        SymbolName:      main
+        Type:            IMAGE_REL_ARM64_REL32
   - Name:            .data
     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
     Alignment:       4
     SectionData:     ''
   - Name:            .bss
     Characteristics: [ IMAGE_SCN_CNT_UNINITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
     Alignment:       4
     SectionData:     ''

test/COFF/armnt-rel32.yaml

+# REQUIRES: arm
+
+# RUN: yaml2obj < %s > %t.obj
+# RUN: llvm-objdump -s %t.obj | FileCheck %s -check-prefix BEFORE
+# RUN: lld-link /entry:function /subsystem:console /out:%t.exe %t.obj
+# RUN: llvm-objdump -s %t.exe | FileCheck %s -check-prefix AFTER
+
+# BEFORE: Contents of section .text:
+# BEFORE:    0000 704700bf 01000000
+
+# AFTER: Contents of section .text:
+# AFTER:   401000 704700bf f9ffffff
+
+--- !COFF
+header:
+  Machine:         IMAGE_FILE_MACHINE_ARMNT
+  Characteristics: []
+sections:
+  - Name:            .text
+    Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
+    Alignment:       4
+    SectionData:     704700BF01000000
+    Relocations:
+      - VirtualAddress:  4
+        SymbolName:      function
+        Type:            IMAGE_REL_ARM_REL32
+symbols:
+  - Name:            function
+    Value:           0
+    SectionNumber:   1
+    SimpleType:      IMAGE_SYM_TYPE_NULL
+    ComplexType:     IMAGE_SYM_DTYPE_FUNCTION
+    StorageClass:    IMAGE_SYM_CLASS_EXTERNAL
+...