[LLD][ELF] Fix ARM and Thumb V7PILongThunk overflow behavior.

[peter.smith]

Summary

When the range between the source and target of a V7PILongThunk exceeded an int32 we would trigger a relocation out of range error for the R_ARM_MOVT_PREL or R_ARM_THM_MOVT_PREL relocation. This case can happen when linking the linux kernel as it is loaded above 0xf0000000.

There are two parts to the fix.

• Remove the overflow check for R_ARM_MOVT_PREL or R_ARM_THM_MOVT_PREL. The ELF for the ARM Architecture document defines these relocations as having no overflow checking so the overflow check was spurious anyway.
• Use int64_t for the offset calculation, in line with similar thunks so that PC + (S - P) < 32-bits. This results in less surprising disassembly.

References: ELF for the ARM Architecture table 4-11 Static ARM instruction relocations
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044f/IHI0044F_aaelf.pdf

[grimar]

This LGTM. Minor nits.

Remove the overflow check for R_ARM_MOVT_PREL or R_ARM_THM_MOVT_PREL. The ELF for the ARM Architecture document defines these relocations as having no overflow checking so the overflow check was spurious anyway.

FTR spec says: "In §4.6.1.4 Table 4-11, removed incorrect overflow check on R_ARM_MOVT_ABS,
R_ARM_MOVT_PREL and R_ARM_MOVT_BREL."

I guess that could be a reason why overflow check was implemented in LLD initially. Anyways this patch seems to do what the latest spec says.

test/ELF/arm-extreme-range-pi-thunk.s

43

Please add a few spaces. Before the 8 here and in the expressions below. For consistency.

55

+ 8

69

+ 4

81

= 0xbits32(0x100000131), 0x131 =

[peter.smith]

Thanks very much for the review. I'll wait a day before committing (I don't think that this is controversial) and will make the suggested changes in the test there.

[ruiu]

LGTM

test/ELF/arm-extreme-range-pi-thunk.s

4–8

nit: I prefer to use multiple echo commands instead of using line concatenation, because with line concatenation all lines are concatenated to a single very long line, and if something goes wrong, this test would print out a very long line to the terminal.

Thus, I usually do something like this:

echo "SECTIONS {" > %t.script
echo "  . = SIZEOF_HEADERS;" >> %t.script
...

[peter.smith]

Thanks, I've updated the test to use multiple echos. I also specified a load address of .text_high to force the generation of a second program header. A single one was generating a close to 4Gb file.

ELF/Arch/ARM.cpp

case R_ARM_THM_JUMP24:
     break;
   case R_ARM_MOVW_ABS_NC:
   case R_ARM_MOVW_PREL_NC:
     write32le(Loc, (read32le(Loc) & ~0x000f0fff) | ((Val & 0xf000) << 4) |
                        (Val & 0x0fff));
     break;
   case R_ARM_MOVT_ABS:
   case R_ARM_MOVT_PREL:
-    checkInt(Loc, Val, 32, Type);
     write32le(Loc, (read32le(Loc) & ~0x000f0fff) |
                        (((Val >> 16) & 0xf000) << 4) | ((Val >> 16) & 0xfff));
     break;
   case R_ARM_THM_MOVT_ABS:
   case R_ARM_THM_MOVT_PREL:
     // Encoding T1: A = imm4:i:imm3:imm8
-    checkInt(Loc, Val, 32, Type);
     write16le(Loc,
               0xf2c0 |                     // opcode
                   ((Val >> 17) & 0x0400) | // i
                   ((Val >> 28) & 0x000f)); // imm4
     write16le(Loc + 2,
               (read16le(Loc + 2) & 0x8f00) | // opcode
                   ((Val >> 12) & 0x7000) |   // imm3
                   ((Val >> 16) & 0x00ff));   // imm8

ELF/Thunks.cpp

void ARMV7PILongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0xf0, 0xcf, 0x0f, 0xe3, // P:  movw ip,:lower16:S - (P + (L1-P) + 8)
       0x00, 0xc0, 0x40, 0xe3, //     movt ip,:upper16:S - (P + (L1-P) + 8)
       0x0f, 0xc0, 0x8c, 0xe0, // L1: add  ip, ip, pc
       0x1c, 0xff, 0x2f, 0xe1, //     bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA();
-  uint64_t Offset = S - P - 16;
+  int64_t Offset = S - P - 16;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_MOVW_PREL_NC, Offset);
   Target->relocateOne(Buf + 4, R_ARM_MOVT_PREL, Offset);
 }
 
 void ARMV7PILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ARMV7PILongThunk_" + Destination.getName()), STT_FUNC,
             0, IS);
   addSymbol("$a", STT_NOTYPE, 0, IS);
 }
 
 void ThumbV7PILongThunk::writeLong(uint8_t *Buf) {
   const uint8_t Data[] = {
       0x4f, 0xf6, 0xf4, 0x7c, // P:  movw ip,:lower16:S - (P + (L1-P) + 4)
       0xc0, 0xf2, 0x00, 0x0c, //     movt ip,:upper16:S - (P + (L1-P) + 4)
       0xfc, 0x44,             // L1: add  ip, pc
       0x60, 0x47,             //     bx   ip
   };
   uint64_t S = getARMThunkDestVA(Destination);
   uint64_t P = getThunkTargetSym()->getVA() & ~0x1;
-  uint64_t Offset = S - P - 12;
+  int64_t Offset = S - P - 12;
   memcpy(Buf, Data, sizeof(Data));
   Target->relocateOne(Buf, R_ARM_THM_MOVW_PREL_NC, Offset);
   Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_PREL, Offset);
 }
 
 void ThumbV7PILongThunk::addSymbols(ThunkSection &IS) {
   addSymbol(Saver.save("__ThumbV7PILongThunk_" + Destination.getName()),
             STT_FUNC, 1, IS);

test/ELF/arm-extreme-range-pi-thunk.s

+// REQUIRES: arm
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: echo "SECTIONS {" > %t.script
+// RUN: echo "          .text_low 0x130 : { *(.text) }" >> %t.script
+// RUN: echo "          .text_high 0xf0000000 : AT(0x1000) { *(.text_high) }" >> %t.script
+// RUN: echo "       } " >> %t.script
+// RUN: ld.lld --script %t.script --pie --static %t -o %t2 2>&1
+// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
+
+// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t3
+// RUN: ld.lld --script %t.script --pie %t3 -o %t4 2>&1
+// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t4 | FileCheck -check-prefix=CHECK-THUMB %s
+
+// Check that we can create Arm and Thumb v7a Position Independent Thunks that
+// can span the address space without triggering overflow errors. We use an
+// AT(0x1000) for .text_high to avoid creating an almost 4Gb size file.
+ .syntax unified
+ .text
+ .global _start
+ .type _start, %function
+_start:
+ bl high
+ bx lr
+
+ .section .text_high, "ax", %progbits
+ .global high
+ .type high, %function
+high:
+ bl _start
+ bx lr
+
+// ARMv7a instructions and relocations.
+
+// CHECK: Disassembly of section .text_low:
+// CHECK-NEXT: _start:
+// CHECK-NEXT:      130:        00 00 00 eb     bl      #0 <__ARMV7PILongThunk_high>
+// CHECK-NEXT:      134:        1e ff 2f e1     bx      lr
+
+// CHECK: __ARMV7PILongThunk_high:
+// CHECK-NEXT:      138:        b8 ce 0f e3     movw    r12, #65208
+// CHECK-NEXT:      13c:        ff cf 4e e3     movt    r12, #61439
+// 0x140 + 0xEFFF0000 + 0x0000FEB8 + 8 = 0xf0000000 = high
+// CHECK-NEXT:      140:        0f c0 8c e0     add     r12, r12, pc
+// CHECK-NEXT:      144:        1c ff 2f e1     bx      r12
+
+// CHECK: Disassembly of section .text_high:
+// CHECK-NEXT: high:
+// CHECK-NEXT: f0000000:        00 00 00 eb     bl      #0 <__ARMV7PILongThunk__start>
+// CHECK-NEXT: f0000004:        1e ff 2f e1     bx      lr
+
+// CHECK: __ARMV7PILongThunk__start:
+// CHECK-NEXT: f0000008:        18 c1 00 e3     movw    r12, #280
+// CHECK-NEXT: f000000c:        00 c0 41 e3     movt    r12, #4096
+// 0xf0000010 + 0x10000000 + 0x0000118 + 8 = bits32(0x100000130),0x130 = _start
+// CHECK-NEXT: f0000010:        0f c0 8c e0     add     r12, r12, pc
+// CHECK-NEXT: f0000014:        1c ff 2f e1     bx      r12
+
+// Thumbv7a instructions and relocations
+// CHECK-THUMB: Disassembly of section .text_low:
+// CHECK-THUMB-NEXT: _start:
+// CHECK-THUMB-NEXT:      130:  00 f0 02 f8     bl      #4
+// CHECK-THUMB-NEXT:      134:  70 47   bx      lr
+// CHECK-THUMB-NEXT:      136:  d4 d4   bmi     #-88
+
+// CHECK-THUMB: __ThumbV7PILongThunk_high:
+// CHECK-THUMB-NEXT:      138:  4f f6 bd 6c     movw    r12, #65213
+// CHECK-THUMB-NEXT:      13c:  ce f6 ff 7c     movt    r12, #61439
+// 0x140 + 0xEFFF0000 + 0x0000FEBD + 4 = 0xf0000001 = high
+// CHECK-THUMB-NEXT:      140:  fc 44   add     r12, pc
+// CHECK-THUMB-NEXT:      142:  60 47   bx      r12
+
+// CHECK-THUMB: Disassembly of section .text_high:
+// CHECK-THUMB-NEXT: high:
+// CHECK-THUMB-NEXT: f0000000:  00 f0 02 f8     bl      #4
+// CHECK-THUMB-NEXT: f0000004:  70 47   bx      lr
+
+// CHECK-THUMB: __ThumbV7PILongThunk__start:
+// CHECK-THUMB-NEXT: f0000008:  40 f2 1d 1c     movw    r12, #285
+// CHECK-THUMB-NEXT: f000000c:  c1 f2 00 0c     movt    r12, #4096
+// 0xf0000010 + 0x10000000 + 0x000011d +4 = bits32(0x100000131),0x131 = _start
+// CHECK-THUMB-NEXT: f0000010:  fc 44   add     r12, pc
+// CHECK-THUMB-NEXT: f0000012:  60 47   bx      r12