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[X86] Improve pfm counter cpu coverage for llvm-exegesis
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Authored by RKSimon on Dec 7 2018, 6:43 AM.

Details

Summary

As discussed on email, this patch attempts to improve pfm perf counter coverage for all the x86 cpus that libpfm4 supports.

Intel/AMD CPU families tend to share names for cycle/uops counters so even if they don't have a scheduler model yet they can at least use the default values (checked against the libpfm4 source code).

The remaining CPUs (where their port/pipe resource pfms are known) I've tried to add to the existing model mappings.

These are untested but don't represent a regression to current llvm-exegesis behaviour for these CPUs.

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Repository
rL LLVM

Event Timeline

RKSimon created this revision.Dec 7 2018, 6:43 AM
courbet accepted this revision.Dec 7 2018, 7:01 AM
This revision is now accepted and ready to land.Dec 7 2018, 7:01 AM

The plan is to only add these mappings, and encourage people to come up with new sched profiles,
or is the auto-sched-profile-generation upcoming?

lib/Target/X86/X86PfmCounters.td
168–179

This LG.

The plan is to only add these mappings, and encourage people to come up with new sched profiles,
or is the auto-sched-profile-generation upcoming?

I'm not sure how far auto generation has gotten.

The plan is to only add these mappings, and encourage people to come up with new sched profiles,
or is the auto-sched-profile-generation upcoming?

I'm not sure how far auto generation has gotten.

The main issue of auto-generation apart from completeness is that it would require a flat sched model - current model are intended to be read by humans, so they have a lot of structure.

This revision was automatically updated to reflect the committed changes.