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[MachineLICM][X86][AMDGPU] Fix subtle bug in the updating of PhysRegClobbers in post-RA LICM
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Authored by craig.topper on Thu, Nov 29, 6:40 PM.

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Summary

It looks like MCRegAliasIterator can visit the same physical register twice. When this happens in this code in LICM we end up setting the PhysRegDef and then later in the same loop visit the register again. Now we see that PhysRegDef is set from the earlier iteration so now set PhysRegClobber.

This patch splits the loop so we have one that uses the previous value of PhysRegDef to update PhysRegClobber and second loop that updates PhysRegDef.

The X86 atomic test is an improvement. I had to add sideeffect to the two shrink wrapping tests to prevent hoisting from occurring. I'm not sure about the AMDGPU tests. It looks like the branch instruction changed at end the of the loops. And in the branch-relaxation test I think there is now "and vcc, exec, -1" instruction that wasn't there before.

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rL LLVM

Event Timeline

craig.topper created this revision.Thu, Nov 29, 6:40 PM
arsenm added inline comments.Sun, Dec 2, 1:03 PM
lib/CodeGen/MachineLICM.cpp
460 ↗(On Diff #176024)

Can all of this code be converted to look at RegUnits instead of using MCRegAliasIterator?

craig.topper marked an inline comment as done.Mon, Dec 3, 9:07 PM
craig.topper added inline comments.
lib/CodeGen/MachineLICM.cpp
460 ↗(On Diff #176024)

Maybe. I'm not very familiar with RegUnits. Maybe we can look at that as a follow up if this change is ok by itself?

arsenm accepted this revision.Tue, Dec 4, 2:21 PM

LGTM

This revision is now accepted and ready to land.Tue, Dec 4, 2:21 PM
This revision was automatically updated to reflect the committed changes.