[simplifycfg][NFC] add tests for cross block compare instructions fold and optimization.

[yinyuefengyi]

Summary

e.g. for 3 consecutive nested condition blocks,

B1: if(s >= t) {
     bar1(s, t);
B2:  if( s != t ) {
      bar2(s, t);
B3:    if( s<=t ) {
      bar3(s, t);
    }
  }
}

If s >= t in B1, and s != t in B2, then we can infer s > t, so B3 can be eliminated if B3's condition is s<=t or merged to B2 if it is s > t. Also there other AND ICMP combinations can be folded not listed here.
LLVM IR before opt:

entry:

%cmp = icmp sge i32 %s, %t
br i1 %cmp, label %if.then, label %if.end6

if.then: ; preds = %entry

call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
%cmp1 = icmp ne i32 %s, %t

br i1 %cmp1, label %if.then2, label %if.end6

if.then2: ; preds = %if.then

call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
%cmp3 = icmp sle i32 %s, %t
br i1 %cmp3, label %if.then4, label %if.end6

if.then4: ; preds = %if.then2

call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
br label %if.end6

if.end6: ; preds = %entry, %if.then2, %if.then4, %if.then

ret void

the target code should be:

entry:

%cmp = icmp sge i32 %s, %t
br i1 %cmp, label %if.then, label %if.end6

if.then: ; preds = %entry

call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
%cmp1 = icmp ne i32 %s, %t
br i1 %cmp1, label %if.then2, label %if.end6

if.then2: ; preds = %if.then

call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
br label %if.end6

if.end6: ; preds = %if.then2, %if.then, %entry

ret void

[spatel]

llvm/test/Transforms/SimplifyCFG/branch-fold-three.ll

2

This should only be testing with a single -simplifycfg.
If there's a cross-pass dependency that you want to confirm is resolved, then you probably want to add a test to
test/Transforms/PhaseOrdering, but ideally, we will show the key transform using just a single pass.

4

You can remove the empty #0/#1 attribute specifiers.

[yinyuefengyi]

use simplifycfg only to avoid pass dependency; remove symbol '#0' and '#1'.

[spatel]

LGTM

llvm/test/Transforms/SimplifyCFG/branch-fold-three.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -simplifycfg -instcombine -simplifycfg -S | FileCheck %s
+; s >= t, s != t, s <= t
+define void @_Z4foo1ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z4foo1ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[S:%.*]], [[T:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp sge i32 %s, %t
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp ne i32 %s, %t
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+; s != t, s >= t, s <= t
+define void @_Z5foo11ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z5foo11ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[S:%.*]], [[T:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp ne i32 %s, %t
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp sge i32 %s, %t
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+; s >= t, t != s, s <= t
+define void @_Z4foo2ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z4foo2ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[S:%.*]], [[T:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[T]], [[S]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp sge i32 %s, %t
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp ne i32 %t, %s
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+; s != t, t <= s, s <= t
+define void @_Z5foo21ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z5foo21ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[S:%.*]], [[T:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[T]], [[S]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp ne i32 %s, %t
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp sle i32 %t, %s
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+; t <= s, t != s, s <= t
+define void @_Z4foo3ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z4foo3ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[T:%.*]], [[S:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[T]], [[S]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp sle i32 %t, %s
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp ne i32 %t, %s
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+; t != s, t <= s, s <= t
+define void @_Z5foo31ii(i32 signext %s, i32 signext %t) #0 {
+; CHECK-LABEL: @_Z5foo31ii(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[T:%.*]], [[S:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[IF_END6:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    call void @_Z4bar1ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[T]], [[S]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_END6]], label [[IF_THEN2:%.*]]
+; CHECK:       if.then2:
+; CHECK-NEXT:    call void @_Z4bar2ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[S]], [[T]]
+; CHECK-NEXT:    br i1 [[CMP3]], label [[IF_END6]], label [[IF_THEN4:%.*]]
+; CHECK:       if.then4:
+; CHECK-NEXT:    call void @_Z4bar3ii(i32 signext [[S]], i32 signext [[T]])
+; CHECK-NEXT:    br label [[IF_END6]]
+; CHECK:       if.end6:
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp ne i32 %t, %s
+  br i1 %cmp, label %if.then, label %if.end6
+
+if.then:                                          ; preds = %entry
+  call void @_Z4bar1ii(i32 signext %s, i32 signext %t)
+  %cmp1 = icmp sle i32 %t, %s
+  br i1 %cmp1, label %if.then2, label %if.end6
+
+if.then2:                                         ; preds = %if.then
+  call void @_Z4bar2ii(i32 signext %s, i32 signext %t)
+  %cmp3 = icmp sle i32 %s, %t
+  br i1 %cmp3, label %if.then4, label %if.end6
+
+if.then4:                                         ; preds = %if.then2
+  call void @_Z4bar3ii(i32 signext %s, i32 signext %t)
+  br label %if.end6
+
+if.end6:                                          ; preds = %if.then, %if.then4, %if.then2, %entry
+  ret void
+}
+
+declare void @_Z4bar1ii(i32 signext, i32 signext) #1
+
+declare void @_Z4bar2ii(i32 signext, i32 signext) #1
+
+declare void @_Z4bar3ii(i32 signext, i32 signext) #1
+