[PPC64] Support got relocations

[sfertile]

Summary

Adds support for the '@got' relocations.

[MaskRay]

test/ELF/ppc64-got-off.s

8

The file seems to mix tabs and spaces.

[sfertile]

test/ELF/ppc64-got-off.s

8

Do you mean the 8-spacing on the directives vs the 4 spacing on the instructions? Thats how I typically write in assembly. I don't mind cleaning that up to a consistent spacing for all though.

[ruiu]

LGTM

test/ELF/ppc64-got-off.s

8

I don't mind too much about coding style of test assembly files, so this is fine. If we want to enforce some formatting, we probably should reformat all the existing assembly files in this directory, but that's probably an unwanted churn.

[MaskRay]

Reminder for committing :)

[sfertile]

In D54859#1327298, @MaskRay wrote:

Reminder for committing :)

Sorry, I've been on vacation. Will commit this either today or tomorrow.

[sfertile]

Committed: https://reviews.llvm.org/rLLD349511

ELF/Arch/PPC64.cpp

default:
     llvm_unreachable("unknown relocation for IE to LE");
     break;
   }
 }
 
 RelExpr PPC64::getRelExpr(RelType Type, const Symbol &S,
                           const uint8_t *Loc) const {
   switch (Type) {
+  case R_PPC64_GOT16:
+  case R_PPC64_GOT16_DS:
+  case R_PPC64_GOT16_HA:
+  case R_PPC64_GOT16_HI:
+  case R_PPC64_GOT16_LO:
+  case R_PPC64_GOT16_LO_DS:
+    return R_GOT_OFF;
   case R_PPC64_TOC16:
   case R_PPC64_TOC16_DS:
   case R_PPC64_TOC16_HA:
   case R_PPC64_TOC16_HI:
   case R_PPC64_TOC16_LO:
   case R_PPC64_TOC16_LO_DS:
     return R_GOTREL;
   case R_PPC64_TOC:

 static std::pair<RelType, uint64_t> toAddr16Rel(RelType Type, uint64_t Val) {
   // Relocations relative to the toc-base need to be adjusted by the Toc offset.
   uint64_t TocBiasedVal = Val - PPC64TocOffset;
   // Relocations relative to dtv[dtpmod] need to be adjusted by the DTP offset.
   uint64_t DTPBiasedVal = Val - DynamicThreadPointerOffset;
 
   switch (Type) {
   // TOC biased relocation.
+  case R_PPC64_GOT16:
   case R_PPC64_GOT_TLSGD16:
   case R_PPC64_GOT_TLSLD16:
   case R_PPC64_TOC16:
     return {R_PPC64_ADDR16, TocBiasedVal};
+  case R_PPC64_GOT16_DS:
   case R_PPC64_TOC16_DS:
   case R_PPC64_GOT_TPREL16_DS:
   case R_PPC64_GOT_DTPREL16_DS:
     return {R_PPC64_ADDR16_DS, TocBiasedVal};
+  case R_PPC64_GOT16_HA:
   case R_PPC64_GOT_TLSGD16_HA:
   case R_PPC64_GOT_TLSLD16_HA:
   case R_PPC64_GOT_TPREL16_HA:
   case R_PPC64_GOT_DTPREL16_HA:
   case R_PPC64_TOC16_HA:
     return {R_PPC64_ADDR16_HA, TocBiasedVal};
+  case R_PPC64_GOT16_HI:
   case R_PPC64_GOT_TLSGD16_HI:
   case R_PPC64_GOT_TLSLD16_HI:
   case R_PPC64_GOT_TPREL16_HI:
   case R_PPC64_GOT_DTPREL16_HI:
   case R_PPC64_TOC16_HI:
     return {R_PPC64_ADDR16_HI, TocBiasedVal};
+  case R_PPC64_GOT16_LO:
   case R_PPC64_GOT_TLSGD16_LO:
   case R_PPC64_GOT_TLSLD16_LO:
   case R_PPC64_TOC16_LO:
     return {R_PPC64_ADDR16_LO, TocBiasedVal};
+  case R_PPC64_GOT16_LO_DS:
   case R_PPC64_TOC16_LO_DS:
   case R_PPC64_GOT_TPREL16_LO_DS:
   case R_PPC64_GOT_DTPREL16_LO_DS:
     return {R_PPC64_ADDR16_LO_DS, TocBiasedVal};
 
   // Dynamic Thread pointer biased relocation types.
   case R_PPC64_DTPREL16:
     return {R_PPC64_ADDR16, DTPBiasedVal};

 }
 
 static bool isTocRelType(RelType Type) {
   return Type == R_PPC64_TOC16_HA || Type == R_PPC64_TOC16_LO_DS ||
          Type == R_PPC64_TOC16_LO;
 }
 
 void PPC64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
-  // For a TOC-relative relocation, proceed in terms of the corresponding
-  // ADDR16 relocation type.
+  // We need to save the original relocation type to determine if we should
+  // toc-optimize the instructions being relocated.
   bool IsTocRelType = isTocRelType(Type);
+  // For TOC-relative and GOT-indirect relocations, proceed in terms of the
+  // corresponding ADDR16 relocation type.
   std::tie(Type, Val) = toAddr16Rel(Type, Val);
 
   switch (Type) {
   case R_PPC64_ADDR14: {
     checkAlignment(Loc, Val, 4, Type);
     // Preserve the AA/LK bits in the branch instruction
     uint8_t AALK = Loc[3];
     write16(Loc + 2, (AALK & 3) | (Val & 0xfffc));

test/ELF/ppc64-got-off.s

+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
+# RUN: ld.lld -shared --no-toc-optimize %t.o -o %t
+# RUN: llvm-objdump -d %t | FileCheck %s
+
+
+        .abiversion 2
+        .section ".text"
+
+        .p2align 2
+        .global func
+        .type func, @function
+func:
+.Lfunc_gep:
+    addis 2, 12, .TOC.-.Lfunc_gep@ha
+    addi 2, 2, .TOC.-.Lfunc_gep@l
+.Lfunc_lep:
+    .localentry func, .-func
+    addis 3, 2, a@got@ha
+    ld    3, a@got@l(3)
+    ld    4, a@got(2)
+    lis   5, a@got@h
+    ori   5, 5, a@got@l
+    li    6, 0
+    ori   6, 6, a@got
+    blr
+
+# CHECK-LABEL: func
+# CHECK:         addis 3, 2, 0
+# CHECK-NEXT:    ld 3, -32760(3)
+# CHECK-NEXT:    ld 4, -32760(2)
+# CHECK-NEXT:    lis 5, -1
+# CHECK-NEXT:    ori 5, 5, 32776
+# CHECK-NEXT:    li  6, 0
+# CHECK-NEXT:    ori 6, 6, 32776
+
+# Since the got entry for a is .got[1] and the TOC base points to
+# .got + 0x8000, the offset for a@got is -0x7FF8 --> -32760
+
+         .section ".data"
+        .global a
+        .type a, @object
+        .size a, 4
+        .p2align 2
+a:
+        .long 0x1000