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Differential D54362

[WebAssembly] Update bleeding-edge cpu features
ClosedPublic

Authored by tlively on Nov 9 2018, 4:04 PM.

Details

Reviewers
aheejin
dschuff
Commits
rG936734b7775d: [WebAssembly] Update bleeding-edge cpu features
rL346570: [WebAssembly] Update bleeding-edge cpu features

Diff Detail

Event Timeline

tlively created this revision.Nov 9 2018, 4:04 PM
Herald added subscribers: llvm-commits, jfb, sunfish and 2 others. · View Herald TranscriptNov 9 2018, 4:04 PM
Harbormaster completed remote builds in B24832: Diff 173464.Nov 9 2018, 4:05 PM
aheejin accepted this revision.Nov 9 2018, 4:09 PM

I wish I can also include FeatureExceptionHandling but I guess I can't yet ༼ ༎ຶ ෴ ༎ຶ༽

This revision is now accepted and ready to land.Nov 9 2018, 4:09 PM
Closed by commit rL346570: [WebAssembly] Update bleeding-edge cpu features (authored by tlively). · Explain WhyNov 9 2018, 4:13 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
WebAssembly/
3 lines

Diff 173464

lib/Target/WebAssembly/WebAssembly.td

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// Minimal Viable Product. // Minimal Viable Product.
def : ProcessorModel<"mvp", NoSchedModel, []>; def : ProcessorModel<"mvp", NoSchedModel, []>;
// Generic processor: latest stable version. // Generic processor: latest stable version.
def : ProcessorModel<"generic", NoSchedModel, []>; def : ProcessorModel<"generic", NoSchedModel, []>;
// Latest and greatest experimental version of WebAssembly. Bugs included! // Latest and greatest experimental version of WebAssembly. Bugs included!
def : ProcessorModel<"bleeding-edge", NoSchedModel, def : ProcessorModel<"bleeding-edge", NoSchedModel,
[FeatureSIMD128, FeatureAtomics]>; [FeatureSIMD128, FeatureAtomics,
FeatureNontrappingFPToInt, FeatureSignExt]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Target Declaration // Target Declaration
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def WebAssemblyAsmParser : AsmParser { def WebAssemblyAsmParser : AsmParser {
// The physical register names are not in the binary format or asm text // The physical register names are not in the binary format or asm text
let ShouldEmitMatchRegisterName = 0; let ShouldEmitMatchRegisterName = 0;
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