[WebAssembly] Add llvm.wasm.{min|max} intrinsic functions

[tlively]

Summary

These intrinsics are similar to llvm.minnum and llvm.maxnum except
that they follow WebAssembly's NaN propagating rules. Loosely, if
either argument is a NaN, the result is also a NaN. Depends on D52325.

[tlively]

The big question I have about this CL is whether these intrinsics should be target-independent instead of specific to the wasm. Their functionality is certainly not wasm-specific. @dschuff what do you think? I would just have to rename them and add documentation to the language reference. The downside is that I expect getting this merged as target independent intrinsics would be more difficult.

[tlively]

• Add tests for f32 and f64

[tlively]

As discussed today, I will make these intrinsics target-independent since they will be included in IEEE-754 2018.

[tlively]

Abandoned in favor of D52450.

include/llvm/IR/IntrinsicsWebAssembly.td

 def int_wasm_mem_grow : Intrinsic<[llvm_anyint_ty],
                                   [llvm_i32_ty, LLVMMatchType<0>],
                                   []>;
 
 // These are the old old names. They also lack the immediate field.
 def int_wasm_current_memory : Intrinsic<[llvm_anyint_ty], [], [IntrReadMem]>;
 def int_wasm_grow_memory : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], []>;
 
+// Returns min/max of two floats or lanewise min/max two of vectors of
+// floats using WebAssembly's NaN propagation rules. Specifically, if
+// either argument is NaN, return NaN. This is in contrast to the
+// llvm.minnum and llvm.maxnum instrinsics, which return the non-NaN
+// argument if it exists.
+def int_wasm_min : Intrinsic<[llvm_anyfloat_ty],
+  [LLVMMatchType<0>, LLVMMatchType<0>],
+  [IntrNoMem, IntrSpeculatable, Commutative]
+>;
+def int_wasm_max : Intrinsic<[llvm_anyfloat_ty],
+  [LLVMMatchType<0>, LLVMMatchType<0>],
+  [IntrNoMem, IntrSpeculatable, Commutative]
+>;
+
 //===----------------------------------------------------------------------===//
 // Exception handling intrinsics
 //===----------------------------------------------------------------------===//
 
 // throw / rethrow
 def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
                                [Throws, IntrNoReturn]>;
 def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;

lib/Analysis/ConstantFolding.cpp

bool llvm::canConstantFoldCallTo(ImmutableCallSite CS, const Function *F) {
   case Intrinsic::uadd_with_overflow:
   case Intrinsic::ssub_with_overflow:
   case Intrinsic::usub_with_overflow:
   case Intrinsic::smul_with_overflow:
   case Intrinsic::umul_with_overflow:
   case Intrinsic::convert_from_fp16:
   case Intrinsic::convert_to_fp16:
   case Intrinsic::bitreverse:
+  case Intrinsic::wasm_max:
+  case Intrinsic::wasm_min:
   case Intrinsic::x86_sse_cvtss2si:
   case Intrinsic::x86_sse_cvtss2si64:
   case Intrinsic::x86_sse_cvttss2si:
   case Intrinsic::x86_sse_cvttss2si64:
   case Intrinsic::x86_sse2_cvtsd2si:
   case Intrinsic::x86_sse2_cvtsd2si64:
   case Intrinsic::x86_sse2_cvttsd2si:
   case Intrinsic::x86_sse2_cvttsd2si64:
if (auto *Op1 = dyn_cast<ConstantFP>(Operands[0])) {
         }
 
         if (IntrinsicID == Intrinsic::maxnum) {
           const APFloat &C1 = Op1->getValueAPF();
           const APFloat &C2 = Op2->getValueAPF();
           return ConstantFP::get(Ty->getContext(), maxnum(C1, C2));
         }
 
+        if (IntrinsicID == Intrinsic::wasm_min) {
+          const APFloat &C1 = Op1->getValueAPF();
+          const APFloat &C2 = Op2->getValueAPF();
+          APFloat F = minnum(C1, C2);
+          if (C1.isNaN())
+            F = C1;
+          else if (C2.isNaN())
+            F = C2;
+          return ConstantFP::get(Ty->getContext(), F);
+        }
+
+        if (IntrinsicID == Intrinsic::wasm_max) {
+          const APFloat &C1 = Op1->getValueAPF();
+          const APFloat &C2 = Op2->getValueAPF();
+          APFloat F = maxnum(C1, C2);
+          if (C1.isNaN())
+            F = C1;
+          else if (C2.isNaN())
+            F = C2;
+          return ConstantFP::get(Ty->getContext(), F);
+        }
+
         if (!TLI)
           return nullptr;
         if ((Name == "pow" && TLI->has(LibFunc_pow)) ||
             (Name == "powf" && TLI->has(LibFunc_powf)) ||
             (Name == "__pow_finite" && TLI->has(LibFunc_pow_finite)) ||
             (Name == "__powf_finite" && TLI->has(LibFunc_powf_finite)))
           return ConstantFoldBinaryFP(pow, Op1V, Op2V, Ty);
         if ((Name == "fmod" && TLI->has(LibFunc_fmod)) ||

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

unsigned Opc =
         I.hasNoNaNs() && TLI.isOperationLegalOrCustom(ISD::FMAXNAN, VT)
             ? ISD::FMAXNAN
             : ISD::FMAXNUM;
     setValue(&I, DAG.getNode(Opc, sdl, VT,
                              getValue(I.getArgOperand(0)),
                              getValue(I.getArgOperand(1))));
     return nullptr;
   }
+  case Intrinsic::wasm_min:
+    setValue(&I, DAG.getNode(ISD::FMINNAN, sdl,
+                             getValue(I.getArgOperand(0)).getValueType(),
+                             getValue(I.getArgOperand(0)),
+                             getValue(I.getArgOperand(1))));
+    return nullptr;
+  case Intrinsic::wasm_max:
+    setValue(&I, DAG.getNode(ISD::FMAXNAN, sdl,
+                             getValue(I.getArgOperand(0)).getValueType(),
+                             getValue(I.getArgOperand(0)),
+                             getValue(I.getArgOperand(1))));
+    return nullptr;
   case Intrinsic::copysign:
     setValue(&I, DAG.getNode(ISD::FCOPYSIGN, sdl,
                              getValue(I.getArgOperand(0)).getValueType(),
                              getValue(I.getArgOperand(0)),
                              getValue(I.getArgOperand(1))));
     return nullptr;
   case Intrinsic::fma:
     setValue(&I, DAG.getNode(ISD::FMA, sdl,

test/Analysis/ConstantFolding/min-max.ll

+; RUN: opt -instcombine -S -o - %s | FileCheck %s
+; Tests that constant folding of min and max operations works as expected.
+
+declare float @llvm.wasm.min.f32(float, float)
+declare float @llvm.wasm.max.f32(float, float)
+declare <4 x float> @llvm.wasm.min.v4f32(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.wasm.max.v4f32(<4 x float>, <4 x float>)
+
+; CHECK: define float @wasm_min_float() {
+define float @wasm_min_float() {
+  ; CHECK-NEXT: ret float 5.000000e+00
+  %1 = call float @llvm.wasm.min.f32(float 5.0, float 42.0)
+  ret float %1
+}
+
+; CHECK: define <4 x float> @wasm_min_float_vec() {
+define <4 x float> @wasm_min_float_vec() {
+  ; CHECK-NEXT: ret <4 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000,
+  ; CHECK-SAME:                  float 0x7FF8000000000000, float 5.000000e+00>
+  %1 = call <4 x float> @llvm.wasm.min.v4f32(
+    <4 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000, float 42., float 42.>,
+    <4 x float> <float 0x7FF8000000000000, float 5., float 0x7FF8000000000000, float 5.>
+  )
+  ret <4 x float> %1
+}
+
+; CHECK: define float @wasm_max_float() {
+define float @wasm_max_float() {
+  ; CHECK-NEXT: ret float 4.200000e+01
+  %1 = call float @llvm.wasm.max.f32(float 5.0, float 42.0)
+  ret float %1
+}
+
+; CHECK: define <4 x float> @wasm_max_float_vec() {
+define <4 x float> @wasm_max_float_vec() {
+  ; CHECK-NEXT: ret <4 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000,
+  ; CHECK-SAME:                  float 0x7FF8000000000000, float 4.200000e+01>
+  %1 = call <4 x float> @llvm.wasm.max.v4f32(
+    <4 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000, float 42., float 42.>,
+    <4 x float> <float 0x7FF8000000000000, float 5., float 0x7FF8000000000000, float 5.>
+  )
+  ret <4 x float> %1
+}

test/CodeGen/WebAssembly/f32.ll

 ; CHECK: f32.max $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define float @fmax32(float %x) {
   %a = fcmp ugt float %x, 0.0
   %b = select i1 %a, float %x, float 0.0
   ret float %b
 }
 
+; CHECK-LABEL: fmin32_intrinsic:
+; CHECK: f32.min $push0=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; CHECK-NEXT: return $pop0{{$}}
+declare float @llvm.wasm.min.f32(float, float)
+define float @fmin32_intrinsic(float %x, float %y) {
+  %a = call float @llvm.wasm.min.f32(float %x, float %y)
+  ret float %a
+}
+
+; CHECK-LABEL: fmax32_intrinsic:
+; CHECK: f32.max $push0=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; CHECK-NEXT: return $pop0{{$}}
+declare float @llvm.wasm.max.f32(float, float)
+define float @fmax32_intrinsic(float %x, float %y) {
+  %a = call float @llvm.wasm.max.f32(float %x, float %y)
+  ret float %a
+}
+
 ; CHECK-LABEL: fma32:
 ; CHECK: {{^}} f32.call $push[[LR:[0-9]+]]=, fmaf@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
 ; CHECK-NEXT: return $pop[[LR]]{{$}}
 define float @fma32(float %a, float %b, float %c) {
   %d = call float @llvm.fma.f32(float %a, float %b, float %c)
   ret float %d
 }

test/CodeGen/WebAssembly/f64.ll

 ; CHECK: f64.max $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define double @fmax64(double %x) {
   %a = fcmp ugt double %x, 0.0
   %b = select i1 %a, double %x, double 0.0
   ret double %b
 }
 
+; CHECK-LABEL: fmin64_intrinsic:
+; CHECK: f64.min $push0=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; CHECK-NEXT: return $pop0{{$}}
+declare double @llvm.wasm.min.f64(double, double)
+define double @fmin64_intrinsic(double %x, double %y) {
+  %a = call double @llvm.wasm.min.f64(double %x, double %y)
+  ret double %a
+}
+
+; CHECK-LABEL: fmax64_intrinsic:
+; CHECK: f64.max $push0=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; CHECK-NEXT: return $pop0{{$}}
+declare double @llvm.wasm.max.f64(double, double)
+define double @fmax64_intrinsic(double %x, double %y) {
+  %a = call double @llvm.wasm.max.f64(double %x, double %y)
+  ret double %a
+}
+
 ; CHECK-LABEL: fma64:
 ; CHECK: {{^}} f64.call $push[[LR:[0-9]+]]=, fma@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
 ; CHECK-NEXT: return $pop[[LR]]{{$}}
 define double @fma64(double %a, double %b, double %c) {
   %d = call double @llvm.fma.f64(double %a, double %b, double %c)
   ret double %d
 }

test/CodeGen/WebAssembly/simd-arith.ll

 ; SIMD128-NEXT: f32x4.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x float> @max_v4f32(<4 x float> %x) {
   %cmps = fcmp ugt <4 x float> %x, zeroinitializer
   %a = select <4 x i1> %cmps, <4 x float> %x, <4 x float> zeroinitializer
   ret <4 x float> %a
 }
 
+; CHECK-LABEL: min_intrinsic_v4f32:
+; NO-SIMD128-NOT: f32x4
+; SIMD128-NEXT: .param v128, v128{{$}}
+; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: f32x4.min $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <4 x float> @llvm.wasm.min.v4f32(<4 x float>, <4 x float>)
+define <4 x float> @min_intrinsic_v4f32(<4 x float> %x, <4 x float> %y) {
+  %a = call <4 x float> @llvm.wasm.min.v4f32(<4 x float> %x, <4 x float> %y)
+  ret <4 x float> %a
+}
+
+; CHECK-LABEL: max_intrinsic_v4f32:
+; NO-SIMD128-NOT: f32x4
+; SIMD128-NEXT: .param v128, v128{{$}}
+; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: f32x4.max $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <4 x float> @llvm.wasm.max.v4f32(<4 x float>, <4 x float>)
+define <4 x float> @max_intrinsic_v4f32(<4 x float> %x, <4 x float> %y) {
+  %a = call <4 x float> @llvm.wasm.max.v4f32(<4 x float> %x, <4 x float> %y)
+  ret <4 x float> %a
+}
+
 ; CHECK-LABEL: add_v4f32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .param v128, v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
 ; SIMD128-NEXT: f32x4.add $push[[R:[0-9]+]]=, $0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
   %a = fadd <4 x float> %x, %y

 ; SIMD128-NEXT: f64x2.max $push[[R:[0-9]+]]=, $0, $pop[[L1]]{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x double> @max_v2f64(<2 x double> %x) {
   %cmps = fcmp ugt <2 x double> %x, zeroinitializer
   %a = select <2 x i1> %cmps, <2 x double> %x,  <2 x double> zeroinitializer
   ret <2 x double> %a
 }
 
+; CHECK-LABEL: min_intrinsic_v2f64:
+; NO-SIMD128-NOT: f64x2
+; SIMD128-NEXT: .param v128, v128{{$}}
+; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: f64x2.min $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <2 x double> @llvm.wasm.min.v2f64(<2 x double>, <2 x double>)
+define <2 x double> @min_intrinsic_v2f64(<2 x double> %x, <2 x double> %y) {
+  %a = call <2 x double> @llvm.wasm.min.v2f64(<2 x double> %x, <2 x double> %y)
+  ret <2 x double> %a
+}
+
+; CHECK-LABEL: max_intrinsic_v2f64:
+; NO-SIMD128-NOT: f64x2
+; SIMD128-NEXT: .param v128, v128{{$}}
+; SIMD128-NEXT: .result v128{{$}}
+; SIMD128-NEXT: f64x2.max $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <2 x double> @llvm.wasm.max.v2f64(<2 x double>, <2 x double>)
+define <2 x double> @max_intrinsic_v2f64(<2 x double> %x, <2 x double> %y) {
+  %a = call <2 x double> @llvm.wasm.max.v2f64(<2 x double> %x, <2 x double> %y)
+  ret <2 x double> %a
+}
+
 ; CHECK-LABEL: add_v2f64:
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: f62x2
 ; SIMD128-NEXT: .param v128, v128{{$}}
 ; SIMD128-NEXT: .result v128{{$}}
 ; SIMD128-NEXT: f64x2.add $push[[R:[0-9]+]]=, $0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x double> @add_v2f64(<2 x double> %x, <2 x double> %y) {