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Differential D52110

[WebAssembly][NFC] Fix unconventional test names
ClosedPublic

Authored by tlively on Sep 14 2018, 11:25 AM.

Details

Reviewers
aheejin
dschuff
Commits
rGe1f67a8bf7f4: [WebAssembly][NFC] Fix unconventional test names
rL342273: [WebAssembly][NFC] Fix unconventional test names

Diff Detail

Repository
rL LLVM

Event Timeline

tlively created this revision.Sep 14 2018, 11:25 AM
Herald added subscribers: llvm-commits, sunfish, jgravelle-google, sbc100. · View Herald TranscriptSep 14 2018, 11:25 AM
Harbormaster completed remote builds in B22663: Diff 165547.Sep 14 2018, 11:25 AM
tlively mentioned this in D52007: [WebAssembly][NFC] Move SIMD encoding tests to dedicated file.Sep 14 2018, 11:25 AM
aheejin accepted this revision.Sep 14 2018, 12:03 PM
This revision is now accepted and ready to land.Sep 14 2018, 12:03 PM
Closed by commit rL342273: [WebAssembly][NFC] Fix unconventional test names (authored by tlively). · Explain WhySep 14 2018, 1:23 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
CodeGen/
WebAssembly/
204 lines
203 lines
101 lines
101 lines
204 lines
203 lines
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Diff 165580

llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; Test that basic 32-bit floating-point comparison operations assemble as
; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ord_f32(float %x, float %y) {
%a = fcmp ord float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uno_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uno_f32(float %x, float %y) {
%a = fcmp uno float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oeq_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oeq_f32(float %x, float %y) {
%a = fcmp oeq float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: une_f32:
; CHECK: f32.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @une_f32(float %x, float %y) {
%a = fcmp une float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: olt_f32:
; CHECK: f32.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @olt_f32(float %x, float %y) {
%a = fcmp olt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ole_f32:
; CHECK: f32.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ole_f32(float %x, float %y) {
%a = fcmp ole float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ogt_f32:
; CHECK: f32.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ogt_f32(float %x, float %y) {
%a = fcmp ogt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oge_f32:
; CHECK: f32.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oge_f32(float %x, float %y) {
%a = fcmp oge float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; Expanded comparisons, which also check for NaN.
; These simply rely on SDAG's Expand cond code action.
; CHECK-LABEL: ueq_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}}
define i32 @ueq_f32(float %x, float %y) {
%a = fcmp ueq float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: one_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]
define i32 @one_f32(float %x, float %y) {
%a = fcmp one float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ult_f32(float %x, float %y) {
%a = fcmp ult float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ule_f32(float %x, float %y) {
%a = fcmp ule float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ugt_f32(float %x, float %y) {
%a = fcmp ugt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uge_f32(float %x, float %y) {
%a = fcmp uge float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; Test that basic 64-bit floating-point comparison operations assemble as
; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ord_f64(double %x, double %y) {
%a = fcmp ord double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uno_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uno_f64(double %x, double %y) {
%a = fcmp uno double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oeq_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oeq_f64(double %x, double %y) {
%a = fcmp oeq double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: une_f64:
; CHECK: f64.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @une_f64(double %x, double %y) {
%a = fcmp une double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: olt_f64:
; CHECK: f64.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @olt_f64(double %x, double %y) {
%a = fcmp olt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ole_f64:
; CHECK: f64.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ole_f64(double %x, double %y) {
%a = fcmp ole double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ogt_f64:
; CHECK: f64.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ogt_f64(double %x, double %y) {
%a = fcmp ogt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oge_f64:
; CHECK: f64.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oge_f64(double %x, double %y) {
%a = fcmp oge double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}}
define i32 @ueq_f64(double %x, double %y) {
%a = fcmp ueq double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: one_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]
define i32 @one_f64(double %x, double %y) {
%a = fcmp one double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ult_f64(double %x, double %y) {
%a = fcmp ult double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ule_f64(double %x, double %y) {
%a = fcmp ule double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ugt_f64(double %x, double %y) {
%a = fcmp ugt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uge_f64(double %x, double %y) {
%a = fcmp uge double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 32-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32:
; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @eq_i32(i32 %x, i32 %y) {
%a = icmp eq i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ne_i32:
; CHECK: i32.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ne_i32(i32 %x, i32 %y) {
%a = icmp ne i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: slt_i32:
; CHECK: i32.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @slt_i32(i32 %x, i32 %y) {
%a = icmp slt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sle_i32:
; CHECK: i32.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sle_i32(i32 %x, i32 %y) {
%a = icmp sle i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_i32:
; CHECK: i32.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ult_i32(i32 %x, i32 %y) {
%a = icmp ult i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_i32:
; CHECK: i32.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ule_i32(i32 %x, i32 %y) {
%a = icmp ule i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sgt_i32:
; CHECK: i32.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sgt_i32(i32 %x, i32 %y) {
%a = icmp sgt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sge_i32:
; CHECK: i32.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sge_i32(i32 %x, i32 %y) {
%a = icmp sge i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_i32:
; CHECK: i32.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ugt_i32(i32 %x, i32 %y) {
%a = icmp ugt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_i32:
; CHECK: i32.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @uge_i32(i32 %x, i32 %y) {
%a = icmp uge i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 64-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64:
; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @eq_i64(i64 %x, i64 %y) {
%a = icmp eq i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ne_i64:
; CHECK: i64.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ne_i64(i64 %x, i64 %y) {
%a = icmp ne i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: slt_i64:
; CHECK: i64.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @slt_i64(i64 %x, i64 %y) {
%a = icmp slt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sle_i64:
; CHECK: i64.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sle_i64(i64 %x, i64 %y) {
%a = icmp sle i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_i64:
; CHECK: i64.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ult_i64(i64 %x, i64 %y) {
%a = icmp ult i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_i64:
; CHECK: i64.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ule_i64(i64 %x, i64 %y) {
%a = icmp ule i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sgt_i64:
; CHECK: i64.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sgt_i64(i64 %x, i64 %y) {
%a = icmp sgt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sge_i64:
; CHECK: i64.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sge_i64(i64 %x, i64 %y) {
%a = icmp sge i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_i64:
; CHECK: i64.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ugt_i64(i64 %x, i64 %y) {
%a = icmp ugt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_i64:
; CHECK: i64.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @uge_i64(i64 %x, i64 %y) {
%a = icmp uge i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons_f32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; Test that basic 32-bit floating-point comparison operations assemble as
; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ord_f32(float %x, float %y) {
%a = fcmp ord float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uno_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uno_f32(float %x, float %y) {
%a = fcmp uno float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oeq_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oeq_f32(float %x, float %y) {
%a = fcmp oeq float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: une_f32:
; CHECK: f32.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @une_f32(float %x, float %y) {
%a = fcmp une float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: olt_f32:
; CHECK: f32.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @olt_f32(float %x, float %y) {
%a = fcmp olt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ole_f32:
; CHECK: f32.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ole_f32(float %x, float %y) {
%a = fcmp ole float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ogt_f32:
; CHECK: f32.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ogt_f32(float %x, float %y) {
%a = fcmp ogt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oge_f32:
; CHECK: f32.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oge_f32(float %x, float %y) {
%a = fcmp oge float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; Expanded comparisons, which also check for NaN.
; These simply rely on SDAG's Expand cond code action.
; CHECK-LABEL: ueq_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}}
define i32 @ueq_f32(float %x, float %y) {
%a = fcmp ueq float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: one_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]
define i32 @one_f32(float %x, float %y) {
%a = fcmp one float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ult_f32(float %x, float %y) {
%a = fcmp ult float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ule_f32(float %x, float %y) {
%a = fcmp ule float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ugt_f32(float %x, float %y) {
%a = fcmp ugt float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_f32:
; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uge_f32(float %x, float %y) {
%a = fcmp uge float %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons_f64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; Test that basic 64-bit floating-point comparison operations assemble as
; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ord_f64(double %x, double %y) {
%a = fcmp ord double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uno_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uno_f64(double %x, double %y) {
%a = fcmp uno double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oeq_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oeq_f64(double %x, double %y) {
%a = fcmp oeq double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: une_f64:
; CHECK: f64.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @une_f64(double %x, double %y) {
%a = fcmp une double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: olt_f64:
; CHECK: f64.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @olt_f64(double %x, double %y) {
%a = fcmp olt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ole_f64:
; CHECK: f64.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ole_f64(double %x, double %y) {
%a = fcmp ole double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ogt_f64:
; CHECK: f64.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ogt_f64(double %x, double %y) {
%a = fcmp ogt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: oge_f64:
; CHECK: f64.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @oge_f64(double %x, double %y) {
%a = fcmp oge double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}}
define i32 @ueq_f64(double %x, double %y) {
%a = fcmp ueq double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: one_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
; CHECK-NEXT: return $pop[[NUM4]]
define i32 @one_f64(double %x, double %y) {
%a = fcmp one double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ult_f64(double %x, double %y) {
%a = fcmp ult double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ule_f64(double %x, double %y) {
%a = fcmp ule double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @ugt_f64(double %x, double %y) {
%a = fcmp ugt double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_f64:
; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
define i32 @uge_f64(double %x, double %y) {
%a = fcmp uge double %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 32-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32:
; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @eq_i32(i32 %x, i32 %y) {
%a = icmp eq i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ne_i32:
; CHECK: i32.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ne_i32(i32 %x, i32 %y) {
%a = icmp ne i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: slt_i32:
; CHECK: i32.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @slt_i32(i32 %x, i32 %y) {
%a = icmp slt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sle_i32:
; CHECK: i32.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sle_i32(i32 %x, i32 %y) {
%a = icmp sle i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_i32:
; CHECK: i32.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ult_i32(i32 %x, i32 %y) {
%a = icmp ult i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_i32:
; CHECK: i32.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ule_i32(i32 %x, i32 %y) {
%a = icmp ule i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sgt_i32:
; CHECK: i32.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sgt_i32(i32 %x, i32 %y) {
%a = icmp sgt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sge_i32:
; CHECK: i32.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sge_i32(i32 %x, i32 %y) {
%a = icmp sge i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_i32:
; CHECK: i32.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ugt_i32(i32 %x, i32 %y) {
%a = icmp ugt i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_i32:
; CHECK: i32.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @uge_i32(i32 %x, i32 %y) {
%a = icmp uge i32 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/comparisons_i64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 64-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64:
; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @eq_i64(i64 %x, i64 %y) {
%a = icmp eq i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ne_i64:
; CHECK: i64.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ne_i64(i64 %x, i64 %y) {
%a = icmp ne i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: slt_i64:
; CHECK: i64.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @slt_i64(i64 %x, i64 %y) {
%a = icmp slt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sle_i64:
; CHECK: i64.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sle_i64(i64 %x, i64 %y) {
%a = icmp sle i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ult_i64:
; CHECK: i64.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ult_i64(i64 %x, i64 %y) {
%a = icmp ult i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ule_i64:
; CHECK: i64.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ule_i64(i64 %x, i64 %y) {
%a = icmp ule i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sgt_i64:
; CHECK: i64.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sgt_i64(i64 %x, i64 %y) {
%a = icmp sgt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: sge_i64:
; CHECK: i64.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @sge_i64(i64 %x, i64 %y) {
%a = icmp sge i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: ugt_i64:
; CHECK: i64.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @ugt_i64(i64 %x, i64 %y) {
%a = icmp ugt i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}
; CHECK-LABEL: uge_i64:
; CHECK: i64.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
define i32 @uge_i64(i64 %x, i64 %y) {
%a = icmp uge i64 %x, %y
%b = zext i1 %a to i32
ret i32 %b
}

llvm/trunk/test/CodeGen/WebAssembly/offset-simd.ll

; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; Test SIMD loads and stores
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
; 16 x i8
; ==============================================================================
; CHECK-LABEL: load_v16i8:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8(<16 x i8>* %p) {
%v = load <16 x i8>, <16 x i8>* %p
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8_with_folded_gep_offset(<16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_gep_negative_offset(<16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_offset(<16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_gep_offset(<16 x i8>* %p) {
%s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <16 x i8> @load_v16i8_from_numeric_address() {
%s = inttoptr i32 32 to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v16i8($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v16i8 = global <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
define <16 x i8> @load_v16i8_from_global_address() {
%v = load <16 x i8>, <16 x i8>* @gv_v16i8
ret <16 x i8> %v
}
; CHECK-LABEL: store_v16i8:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8(<16 x i8> %v, <16 x i8>* %p) {
store <16 x i8> %v , <16 x i8>* %p
ret void
}
; CHECK-LABEL: store_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v16i8_with_folded_offset(<16 x i8> %v, <16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v16i8_with_folded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_gep_negative_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v16i8_to_numeric_address(<16 x i8> %v) {
%s = inttoptr i32 32 to <16 x i8>*
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v16i8($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v16i8_to_global_address(<16 x i8> %v) {
store <16 x i8> %v , <16 x i8>* @gv_v16i8
ret void
}
; ==============================================================================
; 8 x i16
; ==============================================================================
; CHECK-LABEL: load_v8i16:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16(<8 x i16>* %p) {
%v = load <8 x i16>, <8 x i16>* %p
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16_with_folded_offset(<8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16_with_folded_gep_offset(<8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_gep_negative_offset(<8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_offset(<8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_gep_offset(<8 x i16>* %p) {
%s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <8 x i16> @load_v8i16_from_numeric_address() {
%s = inttoptr i32 32 to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v8i16($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v8i16 = global <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
define <8 x i16> @load_v8i16_from_global_address() {
%v = load <8 x i16>, <8 x i16>* @gv_v8i16
ret <8 x i16> %v
}
; CHECK-LABEL: store_v8i16:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16(<8 x i16> %v, <8 x i16>* %p) {
store <8 x i16> %v , <8 x i16>* %p
ret void
}
; CHECK-LABEL: store_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v8i16_with_folded_offset(<8 x i16> %v, <8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v8i16_with_folded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_gep_negative_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v8i16_to_numeric_address(<8 x i16> %v) {
%s = inttoptr i32 32 to <8 x i16>*
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v8i16($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v8i16_to_global_address(<8 x i16> %v) {
store <8 x i16> %v , <8 x i16>* @gv_v8i16
ret void
}
; ==============================================================================
; 4 x i32
; ==============================================================================
; CHECK-LABEL: load_v4i32:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32(<4 x i32>* %p) {
%v = load <4 x i32>, <4 x i32>* %p
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32_with_folded_offset(<4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32_with_folded_gep_offset(<4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_gep_negative_offset(<4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_offset(<4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_gep_offset(<4 x i32>* %p) {
%s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <4 x i32> @load_v4i32_from_numeric_address() {
%s = inttoptr i32 32 to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v4i32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v4i32 = global <4 x i32> <i32 42, i32 42, i32 42, i32 42>
define <4 x i32> @load_v4i32_from_global_address() {
%v = load <4 x i32>, <4 x i32>* @gv_v4i32
ret <4 x i32> %v
}
; CHECK-LABEL: store_v4i32:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32(<4 x i32> %v, <4 x i32>* %p) {
store <4 x i32> %v , <4 x i32>* %p
ret void
}
; CHECK-LABEL: store_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4i32_with_folded_offset(<4 x i32> %v, <4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4i32_with_folded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_gep_negative_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v4i32_to_numeric_address(<4 x i32> %v) {
%s = inttoptr i32 32 to <4 x i32>*
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v4i32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v4i32_to_global_address(<4 x i32> %v) {
store <4 x i32> %v , <4 x i32>* @gv_v4i32
ret void
}
; ==============================================================================
; 2 x i64
; ==============================================================================
; CHECK-LABEL: load_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64(<2 x i64>* %p) {
%v = load <2 x i64>, <2 x i64>* %p
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64_with_folded_offset(<2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64_with_folded_gep_offset(<2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_gep_negative_offset(<2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_offset(<2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_gep_offset(<2 x i64>* %p) {
%s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <2 x i64> @load_v2i64_from_numeric_address() {
%s = inttoptr i32 32 to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v2i64($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v2i64 = global <2 x i64> <i64 42, i64 42>
define <2 x i64> @load_v2i64_from_global_address() {
%v = load <2 x i64>, <2 x i64>* @gv_v2i64
ret <2 x i64> %v
}
; CHECK-LABEL: store_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64(<2 x i64> %v, <2 x i64>* %p) {
store <2 x i64> %v , <2 x i64>* %p
ret void
}
; CHECK-LABEL: store_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2i64_with_folded_offset(<2 x i64> %v, <2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2i64_with_folded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_gep_negative_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v2i64_to_numeric_address(<2 x i64> %v) {
%s = inttoptr i32 32 to <2 x i64>*
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v2i64($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v2i64_to_global_address(<2 x i64> %v) {
store <2 x i64> %v , <2 x i64>* @gv_v2i64
ret void
}
; ==============================================================================
; 4 x float
; ==============================================================================
; CHECK-LABEL: load_v4f32:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32(<4 x float>* %p) {
%v = load <4 x float>, <4 x float>* %p
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32_with_folded_gep_offset(<4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_gep_negative_offset(<4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_offset(<4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_gep_offset(<4 x float>* %p) {
%s = getelementptr <4 x float>, <4 x float>* %p, i32 1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <4 x float> @load_v4f32_from_numeric_address() {
%s = inttoptr i32 32 to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v4f32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v4f32 = global <4 x float> <float 42., float 42., float 42., float 42.>
define <4 x float> @load_v4f32_from_global_address() {
%v = load <4 x float>, <4 x float>* @gv_v4f32
ret <4 x float> %v
}
; CHECK-LABEL: store_v4f32:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32(<4 x float> %v, <4 x float>* %p) {
store <4 x float> %v , <4 x float>* %p
ret void
}
; CHECK-LABEL: store_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4f32_with_folded_offset(<4 x float> %v, <4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4f32_with_folded_gep_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_gep_negative_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_gep_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr <4 x float>, <4 x float>* %p, i32 1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v4f32_to_numeric_address(<4 x float> %v) {
%s = inttoptr i32 32 to <4 x float>*
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v4f32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v4f32_to_global_address(<4 x float> %v) {
store <4 x float> %v , <4 x float>* @gv_v4f32
ret void
}
; ==============================================================================
; 2 x double
; ==============================================================================
; CHECK-LABEL: load_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64(<2 x double>* %p) {
%v = load <2 x double>, <2 x double>* %p
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64_with_folded_gep_offset(<2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_gep_negative_offset(<2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_offset(<2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_gep_offset(<2 x double>* %p) {
%s = getelementptr <2 x double>, <2 x double>* %p, i32 1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <2 x double> @load_v2f64_from_numeric_address() {
%s = inttoptr i32 32 to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v2f64($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v2f64 = global <2 x double> <double 42., double 42.>
define <2 x double> @load_v2f64_from_global_address() {
%v = load <2 x double>, <2 x double>* @gv_v2f64
ret <2 x double> %v
}
; CHECK-LABEL: store_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64(<2 x double> %v, <2 x double>* %p) {
store <2 x double> %v , <2 x double>* %p
ret void
}
; CHECK-LABEL: store_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2f64_with_folded_offset(<2 x double> %v, <2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2f64_with_folded_gep_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_gep_negative_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_gep_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr <2 x double>, <2 x double>* %p, i32 1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v2f64_to_numeric_address(<2 x double> %v) {
%s = inttoptr i32 32 to <2 x double>*
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v2f64($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v2f64_to_global_address(<2 x double> %v) {
store <2 x double> %v , <2 x double>* @gv_v2f64
ret void
}

llvm/trunk/test/CodeGen/WebAssembly/simd-offset.ll

; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; Test SIMD loads and stores
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; ==============================================================================
; 16 x i8
; ==============================================================================
; CHECK-LABEL: load_v16i8:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8(<16 x i8>* %p) {
%v = load <16 x i8>, <16 x i8>* %p
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <16 x i8> @load_v16i8_with_folded_gep_offset(<16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_gep_negative_offset(<16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_offset(<16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <16 x i8> @load_v16i8_with_unfolded_gep_offset(<16 x i8>* %p) {
%s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <16 x i8> @load_v16i8_from_numeric_address() {
%s = inttoptr i32 32 to <16 x i8>*
%v = load <16 x i8>, <16 x i8>* %s
ret <16 x i8> %v
}
; CHECK-LABEL: load_v16i8_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v16i8($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v16i8 = global <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
define <16 x i8> @load_v16i8_from_global_address() {
%v = load <16 x i8>, <16 x i8>* @gv_v16i8
ret <16 x i8> %v
}
; CHECK-LABEL: store_v16i8:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8(<16 x i8> %v, <16 x i8>* %p) {
store <16 x i8> %v , <16 x i8>* %p
ret void
}
; CHECK-LABEL: store_v16i8_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v16i8_with_folded_offset(<16 x i8> %v, <16 x i8>* %p) {
%q = ptrtoint <16 x i8>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <16 x i8>*
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v16i8_with_folded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_gep_negative_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v16i8_with_unfolded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
%s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v16i8_to_numeric_address(<16 x i8> %v) {
%s = inttoptr i32 32 to <16 x i8>*
store <16 x i8> %v , <16 x i8>* %s
ret void
}
; CHECK-LABEL: store_v16i8_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v16i8($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v16i8_to_global_address(<16 x i8> %v) {
store <16 x i8> %v , <16 x i8>* @gv_v16i8
ret void
}
; ==============================================================================
; 8 x i16
; ==============================================================================
; CHECK-LABEL: load_v8i16:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16(<8 x i16>* %p) {
%v = load <8 x i16>, <8 x i16>* %p
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16_with_folded_offset(<8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <8 x i16> @load_v8i16_with_folded_gep_offset(<8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_gep_negative_offset(<8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_offset(<8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <8 x i16> @load_v8i16_with_unfolded_gep_offset(<8 x i16>* %p) {
%s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <8 x i16> @load_v8i16_from_numeric_address() {
%s = inttoptr i32 32 to <8 x i16>*
%v = load <8 x i16>, <8 x i16>* %s
ret <8 x i16> %v
}
; CHECK-LABEL: load_v8i16_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v8i16($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v8i16 = global <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
define <8 x i16> @load_v8i16_from_global_address() {
%v = load <8 x i16>, <8 x i16>* @gv_v8i16
ret <8 x i16> %v
}
; CHECK-LABEL: store_v8i16:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16(<8 x i16> %v, <8 x i16>* %p) {
store <8 x i16> %v , <8 x i16>* %p
ret void
}
; CHECK-LABEL: store_v8i16_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v8i16_with_folded_offset(<8 x i16> %v, <8 x i16>* %p) {
%q = ptrtoint <8 x i16>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <8 x i16>*
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v8i16_with_folded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_gep_negative_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v8i16_with_unfolded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
%s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v8i16_to_numeric_address(<8 x i16> %v) {
%s = inttoptr i32 32 to <8 x i16>*
store <8 x i16> %v , <8 x i16>* %s
ret void
}
; CHECK-LABEL: store_v8i16_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v8i16($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v8i16_to_global_address(<8 x i16> %v) {
store <8 x i16> %v , <8 x i16>* @gv_v8i16
ret void
}
; ==============================================================================
; 4 x i32
; ==============================================================================
; CHECK-LABEL: load_v4i32:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32(<4 x i32>* %p) {
%v = load <4 x i32>, <4 x i32>* %p
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32_with_folded_offset(<4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x i32> @load_v4i32_with_folded_gep_offset(<4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_gep_negative_offset(<4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_offset(<4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x i32> @load_v4i32_with_unfolded_gep_offset(<4 x i32>* %p) {
%s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <4 x i32> @load_v4i32_from_numeric_address() {
%s = inttoptr i32 32 to <4 x i32>*
%v = load <4 x i32>, <4 x i32>* %s
ret <4 x i32> %v
}
; CHECK-LABEL: load_v4i32_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v4i32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v4i32 = global <4 x i32> <i32 42, i32 42, i32 42, i32 42>
define <4 x i32> @load_v4i32_from_global_address() {
%v = load <4 x i32>, <4 x i32>* @gv_v4i32
ret <4 x i32> %v
}
; CHECK-LABEL: store_v4i32:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32(<4 x i32> %v, <4 x i32>* %p) {
store <4 x i32> %v , <4 x i32>* %p
ret void
}
; CHECK-LABEL: store_v4i32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4i32_with_folded_offset(<4 x i32> %v, <4 x i32>* %p) {
%q = ptrtoint <4 x i32>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x i32>*
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4i32_with_folded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_gep_negative_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4i32_with_unfolded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
%s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v4i32_to_numeric_address(<4 x i32> %v) {
%s = inttoptr i32 32 to <4 x i32>*
store <4 x i32> %v , <4 x i32>* %s
ret void
}
; CHECK-LABEL: store_v4i32_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v4i32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v4i32_to_global_address(<4 x i32> %v) {
store <4 x i32> %v , <4 x i32>* @gv_v4i32
ret void
}
; ==============================================================================
; 2 x i64
; ==============================================================================
; CHECK-LABEL: load_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64(<2 x i64>* %p) {
%v = load <2 x i64>, <2 x i64>* %p
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64_with_folded_offset(<2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x i64> @load_v2i64_with_folded_gep_offset(<2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_gep_negative_offset(<2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_offset(<2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x i64> @load_v2i64_with_unfolded_gep_offset(<2 x i64>* %p) {
%s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <2 x i64> @load_v2i64_from_numeric_address() {
%s = inttoptr i32 32 to <2 x i64>*
%v = load <2 x i64>, <2 x i64>* %s
ret <2 x i64> %v
}
; CHECK-LABEL: load_v2i64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v2i64($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v2i64 = global <2 x i64> <i64 42, i64 42>
define <2 x i64> @load_v2i64_from_global_address() {
%v = load <2 x i64>, <2 x i64>* @gv_v2i64
ret <2 x i64> %v
}
; CHECK-LABEL: store_v2i64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64(<2 x i64> %v, <2 x i64>* %p) {
store <2 x i64> %v , <2 x i64>* %p
ret void
}
; CHECK-LABEL: store_v2i64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2i64_with_folded_offset(<2 x i64> %v, <2 x i64>* %p) {
%q = ptrtoint <2 x i64>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x i64>*
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2i64_with_folded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_gep_negative_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2i64_with_unfolded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
%s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v2i64_to_numeric_address(<2 x i64> %v) {
%s = inttoptr i32 32 to <2 x i64>*
store <2 x i64> %v , <2 x i64>* %s
ret void
}
; CHECK-LABEL: store_v2i64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v2i64($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v2i64_to_global_address(<2 x i64> %v) {
store <2 x i64> %v , <2 x i64>* @gv_v2i64
ret void
}
; ==============================================================================
; 4 x float
; ==============================================================================
; CHECK-LABEL: load_v4f32:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32(<4 x float>* %p) {
%v = load <4 x float>, <4 x float>* %p
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <4 x float> @load_v4f32_with_folded_gep_offset(<4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_gep_negative_offset(<4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_offset(<4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <4 x float> @load_v4f32_with_unfolded_gep_offset(<4 x float>* %p) {
%s = getelementptr <4 x float>, <4 x float>* %p, i32 1
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <4 x float> @load_v4f32_from_numeric_address() {
%s = inttoptr i32 32 to <4 x float>*
%v = load <4 x float>, <4 x float>* %s
ret <4 x float> %v
}
; CHECK-LABEL: load_v4f32_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v4f32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v4f32 = global <4 x float> <float 42., float 42., float 42., float 42.>
define <4 x float> @load_v4f32_from_global_address() {
%v = load <4 x float>, <4 x float>* @gv_v4f32
ret <4 x float> %v
}
; CHECK-LABEL: store_v4f32:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32(<4 x float> %v, <4 x float>* %p) {
store <4 x float> %v , <4 x float>* %p
ret void
}
; CHECK-LABEL: store_v4f32_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4f32_with_folded_offset(<4 x float> %v, <4 x float>* %p) {
%q = ptrtoint <4 x float>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <4 x float>*
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v4f32_with_folded_gep_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_gep_negative_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v4f32_with_unfolded_gep_offset(<4 x float> %v, <4 x float>* %p) {
%s = getelementptr <4 x float>, <4 x float>* %p, i32 1
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v4f32_to_numeric_address(<4 x float> %v) {
%s = inttoptr i32 32 to <4 x float>*
store <4 x float> %v , <4 x float>* %s
ret void
}
; CHECK-LABEL: store_v4f32_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v4f32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v4f32_to_global_address(<4 x float> %v) {
store <4 x float> %v , <4 x float>* @gv_v4f32
ret void
}
; ==============================================================================
; 2 x double
; ==============================================================================
; CHECK-LABEL: load_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 0($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64(<2 x double>* %p) {
%v = load <2 x double>, <2 x double>* %p
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: v128.load $push0=, 16($0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
; SIMD128: return $pop0 #
define <2 x double> @load_v2f64_with_folded_gep_offset(<2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_gep_negative_offset(<2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_offset(<2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nsw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param i32{{$}}
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $0, $pop0 #
; SIMD128: v128.load $push2=, 0($pop1):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
; SIMD128: return $pop2 #
define <2 x double> @load_v2f64_with_unfolded_gep_offset(<2 x double>* %p) {
%s = getelementptr <2 x double>, <2 x double>* %p, i32 1
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_from_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, 32($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
; SIMD128: return $pop1 #
define <2 x double> @load_v2f64_from_numeric_address() {
%s = inttoptr i32 32 to <2 x double>*
%v = load <2 x double>, <2 x double>* %s
ret <2 x double> %v
}
; CHECK-LABEL: load_v2f64_from_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .result v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.load $push1=, gv_v2f64($pop0):p2align=0
; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
; SIMD128: return $pop1 #
@gv_v2f64 = global <2 x double> <double 42., double 42.>
define <2 x double> @load_v2f64_from_global_address() {
%v = load <2 x double>, <2 x double>* @gv_v2f64
ret <2 x double> %v
}
; CHECK-LABEL: store_v2f64:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 0($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64(<2 x double> %v, <2 x double>* %p) {
store <2 x double> %v , <2 x double>* %p
ret void
}
; CHECK-LABEL: store_v2f64_with_folded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2f64_with_folded_offset(<2 x double> %v, <2 x double>* %p) {
%q = ptrtoint <2 x double>* %p to i32
%r = add nuw i32 %q, 16
%s = inttoptr i32 %r to <2 x double>*
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_folded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: v128.store 16($1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
define void @store_v2f64_with_folded_gep_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_gep_negative_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_gep_negative_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, -16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_with_unfolded_gep_offset:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128, i32{{$}}
; SIMD128: i32.const $push0=, 16 #
; SIMD128: i32.add $push1=, $1, $pop0 #
; SIMD128: v128.store 0($pop1):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
define void @store_v2f64_with_unfolded_gep_offset(<2 x double> %v, <2 x double>* %p) {
%s = getelementptr <2 x double>, <2 x double>* %p, i32 1
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_to_numeric_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store 32($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
define void @store_v2f64_to_numeric_address(<2 x double> %v) {
%s = inttoptr i32 32 to <2 x double>*
store <2 x double> %v , <2 x double>* %s
ret void
}
; CHECK-LABEL: store_v2f64_to_global_address:
; NO-SIMD128-NOT: v128
; SIMD128-VM-NOT: v128
; SIMD128: .param v128{{$}}
; SIMD128: i32.const $push0=, 0 #
; SIMD128: v128.store gv_v2f64($pop0):p2align=0, $0
; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
define void @store_v2f64_to_global_address(<2 x double> %v) {
store <2 x double> %v , <2 x double>* @gv_v2f64
ret void
}
llvm/trunk/test/CodeGen/WebAssembly/comparisons_i32.ll