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[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions
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Authored by jkolek on Sep 5 2014, 3:28 AM.

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jkolek updated this revision to Diff 13304.Sep 5 2014, 3:28 AM
jkolek retitled this revision from to [mips][microMIPS] Implement CACHE and PREF instructions.
jkolek updated this object.
jkolek edited the test plan for this revision. (Show Details)
jkolek added reviewers: dsanders, vmedic.
jkolek added a subscriber: zoran.jovanovic.
jkolek updated this revision to Diff 13319.Sep 5 2014, 6:16 AM
jkolek updated this revision to Diff 14378.Oct 3 2014, 7:19 AM
jkolek retitled this revision from [mips][microMIPS] Implement CACHE and PREF instructions to [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions.
jkolek updated this object.
jkolek added a reviewer: sstankovic.
sstankovic added inline comments.Oct 17 2014, 4:37 AM
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
1236 ↗(On Diff #14378)

You need isUIntN here rather than isIntN because isIntN reports the error for values [16, ..., 31] which are allowed for this two instructions.

lib/Target/Mips/MicroMipsInstrInfo.td
568 ↗(On Diff #14378)

The value for ehb is 3 rather than 2.

jkolek added a subscriber: Unknown Object (MLST).Nov 18 2014, 5:43 AM
jkolek updated this revision to Diff 17551.Dec 22 2014, 5:09 AM
jkolek added a subscriber: petarj.
sstankovic edited edge metadata.Dec 23 2014, 3:56 AM

Please include disassembler tests in the patch.

jkolek updated this revision to Diff 17597.Dec 23 2014, 7:22 AM
jkolek edited edge metadata.

Added disassembler tests for CACHE, PREF, SSNOP, EHB and PAUSE instructions.

sstankovic accepted this revision.Dec 23 2014, 9:35 AM
sstankovic edited edge metadata.
This revision is now accepted and ready to land.Dec 23 2014, 9:35 AM
This revision was automatically updated to reflect the committed changes.