[WebAssembly] SIMD loads and stores

[tlively]

Summary

Reuse the patterns from WebAssemblyInstrMemory.td.

[tlively]

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

298

I'm not actually sure these are in the right place. It looks like this switch returns the log of the default alignment for each type? The spec proposal says, "the memory access size is 16 bytes which is also the natural alignment." Am I reading that correctly to mean that these cases should return 4, not 3?

[dschuff]

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

298

Yes, that's correct; I'm pretty sure the intention is that the alignment is 16 (4 here). This is a requirement/optimization for some (sub)architectures such as SSE2 (and maybe ARM? not sure), as well as some native C ABIs.

[tlively]

• Fix natural alignment of SIMD memory ops

[aheejin]

lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

264

Do we have tests for these load/store offset patterns? Tests for scalars are here, and I think we need similar variation of tests for SIMDs too. We probably wouldn't need all of offset variation tests for all existing vector types though. Maybe offset tests for one SIMD type would be sufficient.

[tlively]

• Test all patterns from offset.ll

[tlively]

lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

264

I implemented the tests for all types for now, since the marginal cost to do so was small. If we value having a smaller test file more than having all the types covered, I can remove some of the tests.

[aheejin]

lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

264

Yeah it looks like you wrote it once and auto-generated for all other types so, more tests wouldn't hurt. :)

test/CodeGen/WebAssembly/simd-memory.ll

1

How about changing filename to offset-simd.ll or something, because it looks like other offset-testing tests follow the same convention.

[tlively]

• Rename test file

[aheejin]

test/CodeGen/WebAssembly/offset-simd.td

1 ↗

(On Diff #163403)

Oh not .td but .ll

[tlively]

• Fix file name

[tlively]

test/CodeGen/WebAssembly/offset-simd.td

1 ↗

(On Diff #163403)

Oops, fixed.

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

inline unsigned GetDefaultP2Align(unsigned Opcode) {
   case WebAssembly::ATOMIC_STORE_I64_S:
   case WebAssembly::ATOMIC_RMW_ADD_I64:
   case WebAssembly::ATOMIC_RMW_ADD_I64_S:
   case WebAssembly::ATOMIC_RMW_SUB_I64:
   case WebAssembly::ATOMIC_RMW_SUB_I64_S:
   case WebAssembly::ATOMIC_RMW_AND_I64:
   case WebAssembly::ATOMIC_RMW_AND_I64_S:
   case WebAssembly::ATOMIC_RMW_OR_I64:
   case WebAssembly::ATOMIC_RMW_OR_I64_S:
   case WebAssembly::ATOMIC_RMW_XOR_I64:
   case WebAssembly::ATOMIC_RMW_XOR_I64_S:
   case WebAssembly::ATOMIC_RMW_XCHG_I64:
   case WebAssembly::ATOMIC_RMW_XCHG_I64_S:
   case WebAssembly::ATOMIC_RMW_CMPXCHG_I64:
   case WebAssembly::ATOMIC_RMW_CMPXCHG_I64_S:
   case WebAssembly::ATOMIC_WAIT_I64:
   case WebAssembly::ATOMIC_WAIT_I64_S:
     return 3;
+  case WebAssembly::LOAD_v16i8:
+  case WebAssembly::LOAD_v16i8_S:
+  case WebAssembly::LOAD_v8i16:
+  case WebAssembly::LOAD_v8i16_S:
+  case WebAssembly::LOAD_v4i32:
+  case WebAssembly::LOAD_v4i32_S:
+  case WebAssembly::LOAD_v2i64:
+  case WebAssembly::LOAD_v2i64_S:
+  case WebAssembly::LOAD_v4f32:
+  case WebAssembly::LOAD_v4f32_S:
+  case WebAssembly::LOAD_v2f64:
+  case WebAssembly::LOAD_v2f64_S:
+  case WebAssembly::STORE_v16i8:
+  case WebAssembly::STORE_v16i8_S:
+  case WebAssembly::STORE_v8i16:
+  case WebAssembly::STORE_v8i16_S:
+  case WebAssembly::STORE_v4i32:
+  case WebAssembly::STORE_v4i32_S:
+  case WebAssembly::STORE_v2i64:
+  case WebAssembly::STORE_v2i64_S:
+  case WebAssembly::STORE_v4f32:
+  case WebAssembly::STORE_v4f32_S:
+  case WebAssembly::STORE_v2f64:
+  case WebAssembly::STORE_v2f64_S:
+    return 4;
   default:
     llvm_unreachable("Only loads and stores have p2align values");
   }
 }
 
 /// The operand number of the load or store address in load/store instructions.
 static const unsigned LoadAddressOperandNo = 3;
 static const unsigned StoreAddressOperandNo = 2;

lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

 //===----------------------------------------------------------------------===//
 
 // constrained immediate argument types
 foreach SIZE = [8, 16] in
 def ImmI#SIZE : ImmLeaf<i32, "return (Imm & ((1UL << "#SIZE#") - 1)) == Imm;">;
 foreach SIZE = [2, 4, 8, 16, 32] in
 def LaneIdx#SIZE : ImmLeaf<i32, "return 0 <= Imm && Imm < "#SIZE#";">;
 
-// const vectors
 multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
   defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops,
                                   [(set V128:$dst, (vec_t pat))],
                                   "v128.const\t$dst, "#args,
                                   "v128.const\t"#args, 0>;
 }
+multiclass SIMDLoad<ValueType vec_t> {
+  let mayLoad = 1 in
+  defm LOAD_#vec_t :
+    SIMD_I<(outs V128:$dst), (ins P2Align:$align, offset32_op:$off, I32:$addr),
+           (outs), (ins P2Align:$align, offset32_op:$off), [],
+           "v128.load\t$dst, ${off}(${addr})$align",
+           "v128.load\t$off$align", 1>;
+}
+multiclass SIMDStore<ValueType vec_t> {
+  let mayStore = 1 in
+  defm STORE_#vec_t :
+    SIMD_I<(outs), (ins P2Align:$align, offset32_op:$off, I32:$addr, V128:$vec),
+           (outs), (ins P2Align:$align, offset32_op:$off), [],
+           "v128.store\t${off}(${addr})$align, $vec",
+           "v128.store\t$off$align", 2>;
+}
 multiclass ExtractLane<ValueType vec_t, string vec, ImmLeaf imm_t,
                        WebAssemblyRegClass reg_t, bits<32> simdop,
                        string suffix = "", SDNode extract = vector_extract> {
   defm EXTRACT_LANE_#vec_t#suffix :
       SIMD_I<(outs reg_t:$dst), (ins V128:$vec, i32imm_op:$idx),
              (outs), (ins i32imm_op:$idx),
              [(set reg_t:$dst, (extract (vec_t V128:$vec), (i32 imm_t:$idx)))],
              vec#".extract_lane"#suffix#"\t$dst, $vec, $idx",
defm "" : ConstVec<v4f32,
                    (build_vector (f32 fpimm:$i0), (f32 fpimm:$i1),
                                  (f32 fpimm:$i2), (f32 fpimm:$i3)),
                    "$i0, $i1, $i2, $i3">;
 defm "" : ConstVec<v2f64,
                   (ins f64imm_op:$i0, f64imm_op:$i1),
                   (build_vector (f64 fpimm:$i0), (f64 fpimm:$i1)),
                   "$i0, $i1">;
 
+foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
+defm "" : SIMDLoad<vec_t>;
+defm "" : SIMDStore<vec_t>;
+}
+
 defm "" : ExtractLaneExtended<"_s", 9>;
 defm "" : ExtractLaneExtended<"_u", 10>;
 defm "" : ExtractLane<v4i32, "i32x4", LaneIdx4, I32, 13>;
 defm "" : ExtractLane<v2i64, "i64x2", LaneIdx2, I64, 14>;
 defm "" : ExtractLane<v4f32, "f32x4", LaneIdx4, F32, 15>;
 defm "" : ExtractLane<v2f64, "f64x2", LaneIdx2, F64, 16>;
 
 defm "" : ReplaceLane<v16i8, "i8x16", LaneIdx16, I32, i32, 17>;

 
 defm "" : SIMDNot<v16i8, splat16, i32>;
 defm "" : SIMDNot<v8i16, splat8, i32>;
 defm "" : SIMDNot<v4i32, splat4, i32>;
 defm "" : SIMDNot<v2i64, splat2, i64>;
 
 } // Defs = [ARGUMENTS]
 
+// Def load and store patterns from WebAssemblyInstrMemory.td for vector types
+foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
+
+def : LoadPatNoOffset<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatImmOff<vec_t, load, regPlusImm, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatImmOff<vec_t, load, or_is_add, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatGlobalAddr<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatExternalSym<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatOffsetOnly<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatGlobalAddrOffOnly<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+def : LoadPatExternSymOffOnly<vec_t, load, !cast<NI>("LOAD_"#vec_t)>;
+
+def : StorePatNoOffset<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatImmOff<vec_t, store, regPlusImm, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatImmOff<vec_t, store, or_is_add, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatGlobalAddr<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatExternalSym<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatOffsetOnly<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatGlobalAddrOffOnly<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+def : StorePatExternSymOffOnly<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
+
+}
+
 // follow convention of making implicit expansions unsigned
 def : Pat<(i32 (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx))),
           (EXTRACT_LANE_v16i8_u V128:$vec, (i32 LaneIdx16:$idx))>;
 def : Pat<(i32 (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx))),
           (EXTRACT_LANE_v8i16_u V128:$vec, (i32 LaneIdx8:$idx))>;
 
 // arbitrary other BUILD_VECTOR patterns
 def : Pat<(v16i8 (build_vector

test/CodeGen/WebAssembly/simd-memory.ll

+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
+
+; Test SIMD loads and stores
+
+target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+; ==============================================================================
+; 16 x i8
+; ==============================================================================
+; CHECK-LABEL: load_v16i8:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <16 x i8> @load_v16i8(<16 x i8>* %p) {
+  %v = load <16 x i8>, <16 x i8>* %p
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) {
+  %q = ptrtoint <16 x i8>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <16 x i8>*
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <16 x i8> @load_v16i8_with_folded_gep_offset(<16 x i8>* %p) {
+  %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <16 x i8> @load_v16i8_with_unfolded_gep_negative_offset(<16 x i8>* %p) {
+  %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <16 x i8> @load_v16i8_with_unfolded_offset(<16 x i8>* %p) {
+  %q = ptrtoint <16 x i8>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <16 x i8>*
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <16 x i8> @load_v16i8_with_unfolded_gep_offset(<16 x i8>* %p) {
+  %s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <16 x i8> @load_v16i8_from_numeric_address() {
+  %s = inttoptr i32 32 to <16 x i8>*
+  %v = load <16 x i8>, <16 x i8>* %s
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: load_v16i8_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v16i8($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v16i8 = global <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
+define <16 x i8> @load_v16i8_from_global_address() {
+  %v = load <16 x i8>, <16 x i8>* @gv_v16i8
+  ret <16 x i8> %v
+}
+
+; CHECK-LABEL: store_v16i8:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v16i8(<16 x i8> %v, <16 x i8>* %p) {
+  store <16 x i8> %v , <16 x i8>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v16i8_with_folded_offset(<16 x i8> %v, <16 x i8>* %p) {
+  %q = ptrtoint <16 x i8>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <16 x i8>*
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v16i8_with_folded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
+  %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 1
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v16i8_with_unfolded_gep_negative_offset(<16 x i8> %v, <16 x i8>* %p) {
+  %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v16i8_with_unfolded_offset(<16 x i8> %v, <16 x i8>* %p) {
+  %s = getelementptr inbounds <16 x i8>, <16 x i8>* %p, i32 -1
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v16i8_with_unfolded_gep_offset(<16 x i8> %v, <16 x i8>* %p) {
+  %s = getelementptr <16 x i8>, <16 x i8>* %p, i32 1
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v16i8_to_numeric_address(<16 x i8> %v) {
+  %s = inttoptr i32 32 to <16 x i8>*
+  store <16 x i8> %v , <16 x i8>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v16i8_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v16i8($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v16i8_to_global_address(<16 x i8> %v) {
+  store <16 x i8> %v , <16 x i8>* @gv_v16i8
+  ret void
+}
+
+; ==============================================================================
+; 8 x i16
+; ==============================================================================
+; CHECK-LABEL: load_v8i16:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <8 x i16> @load_v8i16(<8 x i16>* %p) {
+  %v = load <8 x i16>, <8 x i16>* %p
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <8 x i16> @load_v8i16_with_folded_offset(<8 x i16>* %p) {
+  %q = ptrtoint <8 x i16>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <8 x i16>*
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <8 x i16> @load_v8i16_with_folded_gep_offset(<8 x i16>* %p) {
+  %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <8 x i16> @load_v8i16_with_unfolded_gep_negative_offset(<8 x i16>* %p) {
+  %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <8 x i16> @load_v8i16_with_unfolded_offset(<8 x i16>* %p) {
+  %q = ptrtoint <8 x i16>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <8 x i16>*
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <8 x i16> @load_v8i16_with_unfolded_gep_offset(<8 x i16>* %p) {
+  %s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <8 x i16> @load_v8i16_from_numeric_address() {
+  %s = inttoptr i32 32 to <8 x i16>*
+  %v = load <8 x i16>, <8 x i16>* %s
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: load_v8i16_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v8i16($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v8i16 = global <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
+define <8 x i16> @load_v8i16_from_global_address() {
+  %v = load <8 x i16>, <8 x i16>* @gv_v8i16
+  ret <8 x i16> %v
+}
+
+; CHECK-LABEL: store_v8i16:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v8i16(<8 x i16> %v, <8 x i16>* %p) {
+  store <8 x i16> %v , <8 x i16>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v8i16_with_folded_offset(<8 x i16> %v, <8 x i16>* %p) {
+  %q = ptrtoint <8 x i16>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <8 x i16>*
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v8i16_with_folded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
+  %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 1
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v8i16_with_unfolded_gep_negative_offset(<8 x i16> %v, <8 x i16>* %p) {
+  %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v8i16_with_unfolded_offset(<8 x i16> %v, <8 x i16>* %p) {
+  %s = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i32 -1
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v8i16_with_unfolded_gep_offset(<8 x i16> %v, <8 x i16>* %p) {
+  %s = getelementptr <8 x i16>, <8 x i16>* %p, i32 1
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v8i16_to_numeric_address(<8 x i16> %v) {
+  %s = inttoptr i32 32 to <8 x i16>*
+  store <8 x i16> %v , <8 x i16>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v8i16_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v8i16($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v8i16_to_global_address(<8 x i16> %v) {
+  store <8 x i16> %v , <8 x i16>* @gv_v8i16
+  ret void
+}
+
+; ==============================================================================
+; 4 x i32
+; ==============================================================================
+; CHECK-LABEL: load_v4i32:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <4 x i32> @load_v4i32(<4 x i32>* %p) {
+  %v = load <4 x i32>, <4 x i32>* %p
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <4 x i32> @load_v4i32_with_folded_offset(<4 x i32>* %p) {
+  %q = ptrtoint <4 x i32>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x i32>*
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <4 x i32> @load_v4i32_with_folded_gep_offset(<4 x i32>* %p) {
+  %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x i32> @load_v4i32_with_unfolded_gep_negative_offset(<4 x i32>* %p) {
+  %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x i32> @load_v4i32_with_unfolded_offset(<4 x i32>* %p) {
+  %q = ptrtoint <4 x i32>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x i32>*
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x i32> @load_v4i32_with_unfolded_gep_offset(<4 x i32>* %p) {
+  %s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <4 x i32> @load_v4i32_from_numeric_address() {
+  %s = inttoptr i32 32 to <4 x i32>*
+  %v = load <4 x i32>, <4 x i32>* %s
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: load_v4i32_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v4i32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v4i32 = global <4 x i32> <i32 42, i32 42, i32 42, i32 42>
+define <4 x i32> @load_v4i32_from_global_address() {
+  %v = load <4 x i32>, <4 x i32>* @gv_v4i32
+  ret <4 x i32> %v
+}
+
+; CHECK-LABEL: store_v4i32:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4i32(<4 x i32> %v, <4 x i32>* %p) {
+  store <4 x i32> %v , <4 x i32>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v4i32_with_folded_offset(<4 x i32> %v, <4 x i32>* %p) {
+  %q = ptrtoint <4 x i32>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x i32>*
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v4i32_with_folded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
+  %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 1
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4i32_with_unfolded_gep_negative_offset(<4 x i32> %v, <4 x i32>* %p) {
+  %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4i32_with_unfolded_offset(<4 x i32> %v, <4 x i32>* %p) {
+  %s = getelementptr inbounds <4 x i32>, <4 x i32>* %p, i32 -1
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4i32_with_unfolded_gep_offset(<4 x i32> %v, <4 x i32>* %p) {
+  %s = getelementptr <4 x i32>, <4 x i32>* %p, i32 1
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v4i32_to_numeric_address(<4 x i32> %v) {
+  %s = inttoptr i32 32 to <4 x i32>*
+  store <4 x i32> %v , <4 x i32>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4i32_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v4i32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v4i32_to_global_address(<4 x i32> %v) {
+  store <4 x i32> %v , <4 x i32>* @gv_v4i32
+  ret void
+}
+
+; ==============================================================================
+; 2 x i64
+; ==============================================================================
+; CHECK-LABEL: load_v2i64:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <2 x i64> @load_v2i64(<2 x i64>* %p) {
+  %v = load <2 x i64>, <2 x i64>* %p
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <2 x i64> @load_v2i64_with_folded_offset(<2 x i64>* %p) {
+  %q = ptrtoint <2 x i64>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x i64>*
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <2 x i64> @load_v2i64_with_folded_gep_offset(<2 x i64>* %p) {
+  %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x i64> @load_v2i64_with_unfolded_gep_negative_offset(<2 x i64>* %p) {
+  %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x i64> @load_v2i64_with_unfolded_offset(<2 x i64>* %p) {
+  %q = ptrtoint <2 x i64>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x i64>*
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x i64> @load_v2i64_with_unfolded_gep_offset(<2 x i64>* %p) {
+  %s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <2 x i64> @load_v2i64_from_numeric_address() {
+  %s = inttoptr i32 32 to <2 x i64>*
+  %v = load <2 x i64>, <2 x i64>* %s
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: load_v2i64_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v2i64($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v2i64 = global <2 x i64> <i64 42, i64 42>
+define <2 x i64> @load_v2i64_from_global_address() {
+  %v = load <2 x i64>, <2 x i64>* @gv_v2i64
+  ret <2 x i64> %v
+}
+
+; CHECK-LABEL: store_v2i64:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2i64(<2 x i64> %v, <2 x i64>* %p) {
+  store <2 x i64> %v , <2 x i64>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v2i64_with_folded_offset(<2 x i64> %v, <2 x i64>* %p) {
+  %q = ptrtoint <2 x i64>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x i64>*
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v2i64_with_folded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
+  %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 1
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2i64_with_unfolded_gep_negative_offset(<2 x i64> %v, <2 x i64>* %p) {
+  %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2i64_with_unfolded_offset(<2 x i64> %v, <2 x i64>* %p) {
+  %s = getelementptr inbounds <2 x i64>, <2 x i64>* %p, i32 -1
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2i64_with_unfolded_gep_offset(<2 x i64> %v, <2 x i64>* %p) {
+  %s = getelementptr <2 x i64>, <2 x i64>* %p, i32 1
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v2i64_to_numeric_address(<2 x i64> %v) {
+  %s = inttoptr i32 32 to <2 x i64>*
+  store <2 x i64> %v , <2 x i64>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2i64_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v2i64($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v2i64_to_global_address(<2 x i64> %v) {
+  store <2 x i64> %v , <2 x i64>* @gv_v2i64
+  ret void
+}
+
+; ==============================================================================
+; 4 x float
+; ==============================================================================
+; CHECK-LABEL: load_v4f32:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <4 x float> @load_v4f32(<4 x float>* %p) {
+  %v = load <4 x float>, <4 x float>* %p
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) {
+  %q = ptrtoint <4 x float>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x float>*
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <4 x float> @load_v4f32_with_folded_gep_offset(<4 x float>* %p) {
+  %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x float> @load_v4f32_with_unfolded_gep_negative_offset(<4 x float>* %p) {
+  %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x float> @load_v4f32_with_unfolded_offset(<4 x float>* %p) {
+  %q = ptrtoint <4 x float>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x float>*
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <4 x float> @load_v4f32_with_unfolded_gep_offset(<4 x float>* %p) {
+  %s = getelementptr <4 x float>, <4 x float>* %p, i32 1
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <4 x float> @load_v4f32_from_numeric_address() {
+  %s = inttoptr i32 32 to <4 x float>*
+  %v = load <4 x float>, <4 x float>* %s
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: load_v4f32_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v4f32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v4f32 = global <4 x float> <float 42., float 42., float 42., float 42.>
+define <4 x float> @load_v4f32_from_global_address() {
+  %v = load <4 x float>, <4 x float>* @gv_v4f32
+  ret <4 x float> %v
+}
+
+; CHECK-LABEL: store_v4f32:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4f32(<4 x float> %v, <4 x float>* %p) {
+  store <4 x float> %v , <4 x float>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v4f32_with_folded_offset(<4 x float> %v, <4 x float>* %p) {
+  %q = ptrtoint <4 x float>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <4 x float>*
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v4f32_with_folded_gep_offset(<4 x float> %v, <4 x float>* %p) {
+  %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 1
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4f32_with_unfolded_gep_negative_offset(<4 x float> %v, <4 x float>* %p) {
+  %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4f32_with_unfolded_offset(<4 x float> %v, <4 x float>* %p) {
+  %s = getelementptr inbounds <4 x float>, <4 x float>* %p, i32 -1
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v4f32_with_unfolded_gep_offset(<4 x float> %v, <4 x float>* %p) {
+  %s = getelementptr <4 x float>, <4 x float>* %p, i32 1
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v4f32_to_numeric_address(<4 x float> %v) {
+  %s = inttoptr i32 32 to <4 x float>*
+  store <4 x float> %v , <4 x float>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v4f32_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v4f32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v4f32_to_global_address(<4 x float> %v) {
+  store <4 x float> %v , <4 x float>* @gv_v4f32
+  ret void
+}
+
+; ==============================================================================
+; 2 x double
+; ==============================================================================
+; CHECK-LABEL: load_v2f64:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 0($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop0 #
+define <2 x double> @load_v2f64(<2 x double>* %p) {
+  %v = load <2 x double>, <2 x double>* %p
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) {
+  %q = ptrtoint <2 x double>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x double>*
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: v128.load $push0=, 16($0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x10]{{$}}
+; SIMD128: return $pop0 #
+define <2 x double> @load_v2f64_with_folded_gep_offset(<2 x double>* %p) {
+  %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x double> @load_v2f64_with_unfolded_gep_negative_offset(<2 x double>* %p) {
+  %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x double> @load_v2f64_with_unfolded_offset(<2 x double>* %p) {
+  %q = ptrtoint <2 x double>* %p to i32
+  %r = add nsw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x double>*
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param i32{{$}}
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $0, $pop0 #
+; SIMD128: v128.load $push2=, 0($pop1):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x00]{{$}}
+; SIMD128: return $pop2 #
+define <2 x double> @load_v2f64_with_unfolded_gep_offset(<2 x double>* %p) {
+  %s = getelementptr <2 x double>, <2 x double>* %p, i32 1
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_from_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, 32($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,0x20]{{$}}
+; SIMD128: return $pop1 #
+define <2 x double> @load_v2f64_from_numeric_address() {
+  %s = inttoptr i32 32 to <2 x double>*
+  %v = load <2 x double>, <2 x double>* %s
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: load_v2f64_from_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .result v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.load $push1=, gv_v2f64($pop0):p2align=0
+; SIMD128-SAME: # encoding: [0xfd,0x01,0x00,
+; SIMD128: return $pop1 #
+@gv_v2f64 = global <2 x double> <double 42., double 42.>
+define <2 x double> @load_v2f64_from_global_address() {
+  %v = load <2 x double>, <2 x double>* @gv_v2f64
+  ret <2 x double> %v
+}
+
+; CHECK-LABEL: store_v2f64:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 0($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2f64(<2 x double> %v, <2 x double>* %p) {
+  store <2 x double> %v , <2 x double>* %p
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_with_folded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v2f64_with_folded_offset(<2 x double> %v, <2 x double>* %p) {
+  %q = ptrtoint <2 x double>* %p to i32
+  %r = add nuw i32 %q, 16
+  %s = inttoptr i32 %r to <2 x double>*
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_with_folded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: v128.store 16($1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x10]{{$}}
+define void @store_v2f64_with_folded_gep_offset(<2 x double> %v, <2 x double>* %p) {
+  %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 1
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_with_unfolded_gep_negative_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2f64_with_unfolded_gep_negative_offset(<2 x double> %v, <2 x double>* %p) {
+  %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_with_unfolded_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, -16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2f64_with_unfolded_offset(<2 x double> %v, <2 x double>* %p) {
+  %s = getelementptr inbounds <2 x double>, <2 x double>* %p, i32 -1
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_with_unfolded_gep_offset:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128, i32{{$}}
+; SIMD128: i32.const $push0=, 16 #
+; SIMD128: i32.add $push1=, $1, $pop0 #
+; SIMD128: v128.store 0($pop1):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x00]{{$}}
+define void @store_v2f64_with_unfolded_gep_offset(<2 x double> %v, <2 x double>* %p) {
+  %s = getelementptr <2 x double>, <2 x double>* %p, i32 1
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_to_numeric_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store 32($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,0x20]{{$}}
+define void @store_v2f64_to_numeric_address(<2 x double> %v) {
+  %s = inttoptr i32 32 to <2 x double>*
+  store <2 x double> %v , <2 x double>* %s
+  ret void
+}
+
+; CHECK-LABEL: store_v2f64_to_global_address:
+; NO-SIMD128-NOT: v128
+; SIMD128-VM-NOT: v128
+; SIMD128: .param v128{{$}}
+; SIMD128: i32.const $push0=, 0 #
+; SIMD128: v128.store gv_v2f64($pop0):p2align=0, $0
+; SIMD128-SAME: # encoding: [0xfd,0x02,0x00,
+define void @store_v2f64_to_global_address(<2 x double> %v) {
+  store <2 x double> %v , <2 x double>* @gv_v2f64
+  ret void
+}