This patch contains changes that are necessary to handle new patterns that will appear when the main patch for divergence driven ISel will be applied. We need this change before to avoid breaking tests.
Testing: lit tests Codegen/AMDGPU passed.
Differential D51316
[AMDGPU] Preliminary patch for divergence driven instruction selection. Operands Folding 1. alex-t on Aug 27 2018, 11:33 AM. Authored by
Details
This patch contains changes that are necessary to handle new patterns that will appear when the main patch for divergence driven ISel will be applied. We need this change before to avoid breaking tests. Testing: lit tests Codegen/AMDGPU passed.
Diff Detail Event TimelineComment Actions Needs tests and comments. I think I know what cases you are trying to solve, and there's usually a better way. Do you have a specific example?
Comment Actions These are 3 different changes. You can also write mir tests for these even if it does not appear in current codegen. Comment Actions This is NFC. It does nothing until the TD files are not changed. My change in the TD files contain re-worked isVGPRImm predicate function. The aim of the change is to workaround the COPY inserted by the generic ISel code. Comment Actions It is not really an NFC. It changes codegen even if you cannot forge such an IR right now. You cannot write a test for an NFC. NFC is something like changing comment or formatting, or changing a vector with list. Also NFC does not usually need a review. Please change subject. Also fix formatting.
Comment Actions Formatting. Test corrected.
Comment Actions comitted: r341068 |
80 chars per line please.