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[WebAssembly] Fix encoding of non-SIMD vector-typed instructions
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Authored by tlively on Aug 13 2018, 5:50 PM.

Details

Summary

Previously SIMD_I was the same as a normal instruction except for the
addition of a HasSIM128 predicate. However, rL339186 changed the
encoding of SIMD_I instructions to automatically contain the SIMD
prefix byte. This broke the encoding of non-SIMD vector-typed
instructions, which had instantiated SIMD_I. This CL corrects this
error.

Diff Detail

Repository
rL LLVM

Event Timeline

tlively created this revision.Aug 13 2018, 5:50 PM
aheejin accepted this revision.Aug 13 2018, 6:24 PM
This revision is now accepted and ready to land.Aug 13 2018, 6:24 PM

Oh, do we have any test for this?

Oh, do we have any test for this?

None of the current tests trigger this error, but an upcoming CL implementing splat does trigger it. I will include tests for this in the tests for that CL.

This revision was automatically updated to reflect the committed changes.