[WebAssembly] Add isEHScopeReturn instruction property

[aheejin]

Summary

So far, isReturn property is used to mean both a return instruction
from a functon and the end of an EH scope, a scope that starts with a EH
scope entry BB and ends with a catchret or a cleanupret instruction.
Because WinEH uses funclets, all EH-scope-ending instructions are also
real return instruction from a function. But for wasm, they only serve
as the end marker of an EH scope but not a return instruction that
exits a function. This mismatch caused incorrect prolog and epilog
generation in wasm EH scopes. This patch fixes this.

This patch is in the same vein with rL333045, which splits
MachineBasicBlock::isEHFuncletEntry into isEHFuncletEntry and
isEHScopeEntry.

[dschuff]

Was the problem just that the PEI was inserting an epilog for every instruction that isReturn?

[aheejin]

Yes.

[aheejin]

test fix

[dschuff]

This looks OK to me; I can't think of any good alternative to adding a new predicate. Fixing PEI directly would require having it check for particular instructions (wasm catchret), which we can't really do.

llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h

#endif
   }
 
   /// Convenience function that returns true if the block ends in a return
   /// instruction.
   bool isReturnBlock() const {
     return !empty() && back().isReturn();
   }
 
+  /// Convenience function that returns true if the bock ends in a EH scope
+  /// return instruction.
+  bool isEHScopeReturnBlock() const {
+    return !empty() && back().isEHScopeReturn();
+  }
+
   /// Split the critical edge from this block to the given successor block, and
   /// return the newly created block, or null if splitting is not possible.
   ///
   /// This function updates LiveVariables, MachineDominatorTree, and
   /// MachineLoopInfo, as applicable.
   MachineBasicBlock *SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P);
 
   /// Check if the edge between this block and the given successor \p

llvm/trunk/include/llvm/CodeGen/MachineInstr.h

public:
   bool isPseudo(QueryType Type = IgnoreBundle) const {
     return hasProperty(MCID::Pseudo, Type);
   }
 
   bool isReturn(QueryType Type = AnyInBundle) const {
     return hasProperty(MCID::Return, Type);
   }
 
+  /// Return true if this is an instruction that marks the end of an EH scope,
+  /// i.e., a catchpad or a cleanuppad instruction.
+  bool isEHScopeReturn(QueryType Type = AnyInBundle) const {
+    return hasProperty(MCID::EHScopeReturn, Type);
+  }
+
   bool isCall(QueryType Type = AnyInBundle) const {
     return hasProperty(MCID::Call, Type);
   }
 
   /// Returns true if the specified instruction stops control flow
   /// from executing the instruction immediately following it.  Examples include
   /// unconditional branches and return instructions.
   bool isBarrier(QueryType Type = AnyInBundle) const {

llvm/trunk/include/llvm/MC/MCInstrDesc.h

 /// MCInstrDesc class.  Clients should use the predicate methods on MCInstrDesc,
 /// not use these directly.  These all correspond to bitfields in the
 /// MCInstrDesc::Flags field.
 enum Flag {
   Variadic = 0,
   HasOptionalDef,
   Pseudo,
   Return,
+  EHScopeReturn,
   Call,
   Barrier,
   Terminator,
   Branch,
   IndirectBranch,
   Compare,
   MoveImm,
   MoveReg,

llvm/trunk/include/llvm/Target/Target.td

class Instruction {
 
   // Added complexity passed onto matching pattern.
   int AddedComplexity  = 0;
 
   // These bits capture information about the high-level semantics of the
   // instruction.
   bit isReturn     = 0;     // Is this instruction a return instruction?
   bit isBranch     = 0;     // Is this instruction a branch instruction?
+  bit isEHScopeReturn = 0;  // Does this instruction end an EH scope?
   bit isIndirectBranch = 0; // Is this instruction an indirect branch?
   bit isCompare    = 0;     // Is this instruction a comparison instruction?
   bit isMoveImm    = 0;     // Is this instruction a move immediate instruction?
   bit isMoveReg    = 0;     // Is this instruction a move register instruction?
   bit isBitcast    = 0;     // Is this instruction a bitcast instruction?
   bit isSelect     = 0;     // Is this instruction a select instruction?
   bit isBarrier    = 0;     // Can control flow fall through this instruction?
   bit isCall       = 0;     // Is this instruction a call instruction?

llvm/trunk/lib/CodeGen/Analysis.cpp

while (!Worklist.empty()) {
     // Don't revisit blocks.
     if (!P.second) {
       assert(P.first->second == EHScope && "MBB is part of two scopes!");
       continue;
     }
 
     // Returns are boundaries where scope transfer can occur, don't follow
     // successors.
-    if (Visiting->isReturnBlock())
+    if (Visiting->isEHScopeReturnBlock())
       continue;
 
     for (const MachineBasicBlock *Succ : Visiting->successors())
       Worklist.push_back(Succ);
   }
 }
 
 DenseMap<const MachineBasicBlock *, int>

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td

 defm CATCH_I64 : I<(outs I64:$dst), (ins i32imm:$tag),
                    (outs), (ins i32imm:$tag),
                    [(set I64:$dst, (int_wasm_catch imm:$tag))],
                    "i64.catch   \t$dst, $tag", "i64.catch   \t$tag", 0x07>;
 defm CATCH_ALL : NRI<(outs), (ins), [], "catch_all", 0x05>;
 }
 
 // Pseudo instructions: cleanupret / catchret
-// They are not return instructions in wasm, but setting 'isReturn' to true as
-// in X86 is necessary for computing EH scope membership.
 let isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
-    isCodeGenOnly = 1, isReturn = 1 in {
+    isCodeGenOnly = 1, isEHScopeReturn = 1 in {
   defm CLEANUPRET : NRI<(outs), (ins), [(cleanupret)], "", 0>;
   defm CATCHRET : NRI<(outs), (ins bb_op:$dst, bb_op:$from),
                    [(catchret bb:$dst, bb:$from)], "", 0>;
 }
 }
 
 } // Defs = [ARGUMENTS]

llvm/trunk/lib/Target/X86/X86InstrCompiler.td

let isTerminator = 1, isReturn = 1, isBarrier = 1,
     hasCtrlDep = 1, isCodeGenOnly = 1 in {
 def EH_RETURN64   : I<0xC3, RawFrm, (outs), (ins GR64:$addr),
                      "ret\t#eh_return, addr: $addr",
                      [(X86ehret GR64:$addr)]>, Sched<[WriteJumpLd]>;
 
 }
 
 let isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
-    isCodeGenOnly = 1, isReturn = 1 in {
+    isCodeGenOnly = 1, isReturn = 1, isEHScopeReturn = 1 in {
   def CLEANUPRET : I<0, Pseudo, (outs), (ins), "# CLEANUPRET", [(cleanupret)]>;
 
   // CATCHRET needs a custom inserter for SEH.
   let usesCustomInserter = 1 in
     def CATCHRET : I<0, Pseudo, (outs), (ins brtarget32:$dst, brtarget32:$from),
                      "# CATCHRET",
                      [(catchret bb:$dst, bb:$from)]>;
 }

llvm/trunk/test/CodeGen/WebAssembly/exception.ll

 
 terminate10:                                      ; preds = %ehcleanup7
   %9 = cleanuppad within %6 []
   %10 = call i8* @llvm.wasm.get.exception(token %9)
   call void @__clang_call_terminate(i8* %10) [ "funclet"(token %9) ]
   unreachable
 }
 
+; Tests prologues and epilogues are not generated within EH scopes.
+; They should not be treated as funclets; BBs starting with a catch instruction
+; should not have a prologue, and BBs ending with a catchret/cleanupret should
+; not have an epilogue. This is separate from __stack_pointer restoring
+; instructions after a catch instruction.
+
+; CHECK-LABEL: test_no_prolog_epilog_in_ehpad
+; CHECK:  try
+; CHECK:  call      foo@FUNCTION
+; CHECK:  i32.catch
+; CHECK-NOT:  get_global  $push{{.+}}=, __stack_pointer@GLOBAL
+; CHECK:  try
+; CHECK:  call      foo@FUNCTION
+; CHECK:  catch_all
+; TODO This should be removed too in a later patch
+; CHECK-NO T:  get_global  $push{{.+}}=, __stack_pointer@GLOBAL
+; CHECK:  call      __cxa_end_catch@FUNCTION
+; CHECK-NOT:  set_global  __stack_pointer@GLOBAL, $pop{{.+}}
+; CHECK:  end_try
+; CHECK-NOT:  set_global  __stack_pointer@GLOBAL, $pop{{.+}}
+; CHECK:  end_try
+define void @test_no_prolog_epilog_in_ehpad() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
+entry:
+  %stack_var = alloca i32, align 4
+  call void @bar(i32* %stack_var)
+  invoke void @foo()
+          to label %try.cont unwind label %catch.dispatch
+
+catch.dispatch:                                   ; preds = %entry
+  %0 = catchswitch within none [label %catch.start] unwind to caller
+
+catch.start:                                      ; preds = %catch.dispatch
+  %1 = catchpad within %0 [i8* bitcast (i8** @_ZTIi to i8*)]
+  %2 = call i8* @llvm.wasm.get.exception(token %1)
+  %3 = call i32 @llvm.wasm.get.ehselector(token %1)
+  %4 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
+  %matches = icmp eq i32 %3, %4
+  br i1 %matches, label %catch, label %rethrow
+
+catch:                                            ; preds = %catch.start
+  %5 = call i8* @__cxa_begin_catch(i8* %2) [ "funclet"(token %1) ]
+  %6 = bitcast i8* %5 to float*
+  %7 = load float, float* %6, align 4
+  invoke void @foo() [ "funclet"(token %1) ]
+          to label %invoke.cont1 unwind label %ehcleanup
+
+invoke.cont1:                                     ; preds = %catch
+  call void @__cxa_end_catch() [ "funclet"(token %1) ]
+  catchret from %1 to label %try.cont
+
+rethrow:                                          ; preds = %catch.start
+  call void @__cxa_rethrow() [ "funclet"(token %1) ]
+  unreachable
+
+try.cont:                                         ; preds = %entry, %invoke.cont1
+  ret void
+
+ehcleanup:                                        ; preds = %catch
+  %8 = cleanuppad within %1 []
+  call void @__cxa_end_catch() [ "funclet"(token %8) ]
+  cleanupret from %8 unwind to caller
+}
+
 declare void @foo()
+declare void @bar(i32*)
 declare i32 @__gxx_wasm_personality_v0(...)
 declare i8* @llvm.wasm.get.exception(token)
 declare i32 @llvm.wasm.get.ehselector(token)
 declare i32 @llvm.eh.typeid.for(i8*)
 declare i8* @__cxa_begin_catch(i8*)
 declare void @__cxa_end_catch()
 declare void @__cxa_rethrow()
 declare void @__clang_call_terminate(i8*)
 declare void @_ZSt9terminatev()
 declare %struct.Cleanup* @_ZN7CleanupD1Ev(%struct.Cleanup* returned)

llvm/trunk/utils/TableGen/CodeGenInstruction.h

public:
     CGIOperandList Operands;
 
     /// ImplicitDefs/ImplicitUses - These are lists of registers that are
     /// implicitly defined and used by the instruction.
     std::vector<Record*> ImplicitDefs, ImplicitUses;
 
     // Various boolean values we track for the instruction.
     bool isReturn : 1;
+    bool isEHScopeReturn : 1;
     bool isBranch : 1;
     bool isIndirectBranch : 1;
     bool isCompare : 1;
     bool isMoveImm : 1;
     bool isMoveReg : 1;
     bool isBitcast : 1;
     bool isSelect : 1;
     bool isBarrier : 1;

llvm/trunk/utils/TableGen/CodeGenInstruction.cpp

 //===----------------------------------------------------------------------===//
 
 CodeGenInstruction::CodeGenInstruction(Record *R)
   : TheDef(R), Operands(R), InferredFrom(nullptr) {
   Namespace = R->getValueAsString("Namespace");
   AsmString = R->getValueAsString("AsmString");
 
   isReturn     = R->getValueAsBit("isReturn");
+  isEHScopeReturn = R->getValueAsBit("isEHScopeReturn");
   isBranch     = R->getValueAsBit("isBranch");
   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
   isCompare    = R->getValueAsBit("isCompare");
   isMoveImm    = R->getValueAsBit("isMoveImm");
   isMoveReg    = R->getValueAsBit("isMoveReg");
   isBitcast    = R->getValueAsBit("isBitcast");
   isSelect     = R->getValueAsBit("isSelect");
   isBarrier    = R->getValueAsBit("isBarrier");

llvm/trunk/utils/TableGen/InstrDocsEmitter.cpp

for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) {
     }
 
     // Boolean flags.
     std::vector<const char *> FlagStrings;
 #define xstr(s) str(s)
 #define str(s) #s
 #define FLAG(f) if (II->f) { FlagStrings.push_back(str(f)); }
     FLAG(isReturn)
+    FLAG(isEHScopeReturn)
     FLAG(isBranch)
     FLAG(isIndirectBranch)
     FLAG(isCompare)
     FLAG(isMoveImm)
     FLAG(isBitcast)
     FLAG(isSelect)
     FLAG(isBarrier)
     FLAG(isCall)

llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp

OS << Num << ",\t" << MinOperands << ",\t"
      << Inst.TheDef->getValueAsInt("Size") << ",\t"
      << SchedModels.getSchedClassIdx(Inst) << ",\t0";
 
   CodeGenTarget &Target = CDP.getTargetInfo();
 
   // Emit all of the target independent flags...
   if (Inst.isPseudo)           OS << "|(1ULL<<MCID::Pseudo)";
   if (Inst.isReturn)           OS << "|(1ULL<<MCID::Return)";
+  if (Inst.isEHScopeReturn)    OS << "|(1ULL<<MCID::EHScopeReturn)";
   if (Inst.isBranch)           OS << "|(1ULL<<MCID::Branch)";
   if (Inst.isIndirectBranch)   OS << "|(1ULL<<MCID::IndirectBranch)";
   if (Inst.isCompare)          OS << "|(1ULL<<MCID::Compare)";
   if (Inst.isMoveImm)          OS << "|(1ULL<<MCID::MoveImm)";
   if (Inst.isMoveReg)          OS << "|(1ULL<<MCID::MoveReg)";
   if (Inst.isBitcast)          OS << "|(1ULL<<MCID::Bitcast)";
   if (Inst.isAdd)              OS << "|(1ULL<<MCID::Add)";
   if (Inst.isTrap)             OS << "|(1ULL<<MCID::Trap)";