[WebAssembly] Replace SIMD expression types with V128

[tlively]

Summary

The spec only defines a SIMD expression type of V128 and
leaves interpretation of different vector types to the instructions.

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp

void WebAssemblyInstPrinter::printWebAssemblySignatureOperand(
     const MCInst *MI, unsigned OpNo, raw_ostream &O) {
   int64_t Imm = MI->getOperand(OpNo).getImm();
   switch (WebAssembly::ExprType(Imm)) {
   case WebAssembly::ExprType::Void: break;
   case WebAssembly::ExprType::I32: O << "i32"; break;
   case WebAssembly::ExprType::I64: O << "i64"; break;
   case WebAssembly::ExprType::F32: O << "f32"; break;
   case WebAssembly::ExprType::F64: O << "f64"; break;
-  case WebAssembly::ExprType::I8x16: O << "i8x16"; break;
-  case WebAssembly::ExprType::I16x8: O << "i16x8"; break;
-  case WebAssembly::ExprType::I32x4: O << "i32x4"; break;
-  case WebAssembly::ExprType::F32x4: O << "f32x4"; break;
-  case WebAssembly::ExprType::B8x16: O << "b8x16"; break;
-  case WebAssembly::ExprType::B16x8: O << "b16x8"; break;
-  case WebAssembly::ExprType::B32x4: O << "b32x4"; break;
+  case WebAssembly::ExprType::V128: O << "v128"; break;
   case WebAssembly::ExprType::ExceptRef: O << "except_ref"; break;
   }
 }
 
 const char *llvm::WebAssembly::TypeToString(MVT Ty) {
   switch (Ty.SimpleTy) {
   case MVT::i32:
     return "i32";

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

 static const unsigned StoreAddressOperandNo = 2;
 
 /// The operand number of the load or store p2align in load/store instructions.
 static const unsigned LoadP2AlignOperandNo = 1;
 static const unsigned StoreP2AlignOperandNo = 0;
 
 /// This is used to indicate block signatures.
 enum class ExprType : unsigned {
-  Void      = 0x40,
-  I32       = 0x7F,
-  I64       = 0x7E,
-  F32       = 0x7D,
-  F64       = 0x7C,
-  I8x16     = 0x7B,
-  I16x8     = 0x7A,
-  I32x4     = 0x79,
-  F32x4     = 0x78,
-  B8x16     = 0x77,
-  B16x8     = 0x76,
-  B32x4     = 0x75,
+  Void = 0x40,
+  I32 = 0x7F,
+  I64 = 0x7E,
+  F32 = 0x7D,
+  F64 = 0x7C,
+  V128 = 0x7B,
   ExceptRef = 0x68
 };
 
 /// Instruction opcodes emitted via means other than CodeGen.
 static const unsigned Nop = 0x01;
 static const unsigned End = 0x0b;
 
 wasm::ValType toValType(const MVT &Ty);
 
 } // end namespace WebAssembly
 } // end namespace llvm
 
 #endif

lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp

if (MFI.getResults().empty())
     return;
 
   WebAssembly::ExprType retType;
   switch (MFI.getResults().front().SimpleTy) {
   case MVT::i32: retType = WebAssembly::ExprType::I32; break;
   case MVT::i64: retType = WebAssembly::ExprType::I64; break;
   case MVT::f32: retType = WebAssembly::ExprType::F32; break;
   case MVT::f64: retType = WebAssembly::ExprType::F64; break;
-  case MVT::v16i8: retType = WebAssembly::ExprType::I8x16; break;
-  case MVT::v8i16: retType = WebAssembly::ExprType::I16x8; break;
-  case MVT::v4i32: retType = WebAssembly::ExprType::I32x4; break;
-  case MVT::v4f32: retType = WebAssembly::ExprType::F32x4; break;
+  case MVT::v16i8:
+  case MVT::v8i16:
+  case MVT::v4i32:
+  case MVT::v4f32:
+    retType = WebAssembly::ExprType::V128;
+    break;
   case MVT::ExceptRef: retType = WebAssembly::ExprType::ExceptRef; break;
   default: llvm_unreachable("unexpected return type");
   }
 
   for (MachineBasicBlock &MBB : reverse(MF)) {
     for (MachineInstr &MI : reverse(MBB)) {
       if (MI.isPosition() || MI.isDebugInstr())
         continue;