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Differential D49469

[mips] Fix predicate for the MipsTruncIntFP pattern
ClosedPublic

Authored by atanasyan on Jul 18 2018, 3:27 AM.

Details

Reviewers
smaksimovic
abeserminji
mstojanovic
Commits
rGe9d7b3198a3d: [mips] Fix predicate for the MipsTruncIntFP pattern
rL337392: [mips] Fix predicate for the MipsTruncIntFP pattern
Summary

This is a follow-up to the rL337171. This patch fixes regression introduced by the r337171 and enables MipsTruncIntFP pattern.

Diff Detail

Repository
rL LLVM

Event Timeline

atanasyan created this revision.Jul 18 2018, 3:27 AM
Herald added subscribers: jrtc27, arichardson, sdardis. · View Herald TranscriptJul 18 2018, 3:27 AM
mstojanovic added a comment.Jul 18 2018, 6:42 AM

The patch fixes the previously failing tests. LGTM

mstojanovic accepted this revision.Jul 18 2018, 6:44 AM
This revision is now accepted and ready to land.Jul 18 2018, 6:44 AM
Closed by commit rL337392: [mips] Fix predicate for the MipsTruncIntFP pattern (authored by atanasyan). · Explain WhyJul 18 2018, 7:16 AM
This revision was automatically updated to reflect the committed changes.
atanasyan added a comment.Jul 18 2018, 7:17 AM

Thanks for review.

Revision Contents

PathSize
lib/
Target/
Mips/
2 lines
test/
CodeGen/
Mips/
3 lines

Diff 156028

lib/Target/Mips/MipsInstrFPU.td

Show First 20 Lines • Show All 888 Lines • ▼ Show 20 Lines
def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)), def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)),
(PseudoCVT_D64_W GPR32Opnd:$src)>, FGR_64; (PseudoCVT_D64_W GPR32Opnd:$src)>, FGR_64;
def : MipsPat<(f32 (sint_to_fp GPR64Opnd:$src)), def : MipsPat<(f32 (sint_to_fp GPR64Opnd:$src)),
(EXTRACT_SUBREG (PseudoCVT_S_L GPR64Opnd:$src), sub_lo)>, FGR_64; (EXTRACT_SUBREG (PseudoCVT_S_L GPR64Opnd:$src), sub_lo)>, FGR_64;
def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)), def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)),
(PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64; (PseudoCVT_D64_L GPR64Opnd:$src)>, FGR_64;
def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),
(TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS3, FGR_64; (TRUNC_W_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64;
def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src), def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src),
(TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64; (TRUNC_L_S FGR32Opnd:$src)>, ISA_MIPS2, FGR_64;
def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src),
(TRUNC_L_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64; (TRUNC_L_D64 FGR64Opnd:$src)>, ISA_MIPS2, FGR_64;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsPat<(f32 (fpround FGR64Opnd:$src)), def : MipsPat<(f32 (fpround FGR64Opnd:$src)),
(CVT_S_D64 FGR64Opnd:$src)>, ISA_MIPS1, FGR_64; (CVT_S_D64 FGR64Opnd:$src)>, ISA_MIPS1, FGR_64;
Show All 31 Lines

test/CodeGen/Mips/double2int.ll

; RUN: llc -march=mips < %s | FileCheck %s ; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s
define i32 @f1(double %d) nounwind readnone { define i32 @f1(double %d) nounwind readnone {
entry: entry:
; CHECK: trunc.w.d $f{{[0-9]+}}, $f12 ; CHECK: trunc.w.d $f{{[0-9]+}}, $f12
%conv = fptosi double %d to i32 %conv = fptosi double %d to i32
ret i32 %conv ret i32 %conv
} }