[InstCombine] add more SPFofSPF folding

[shchenz]

Summary

This is from D48754.

Make matchSelectPattern() can recognize more abs pattern now. foldSPFofSPF() can also fold more SPF of SPF(abs/nabs) patterns.

Testcases are added at rL336902.

[shchenz]

Some explanation for this patch:
1, for TODO in InstCombineSelect.cpp: because matchSelectPattern() can recognize more abs pattern, including abs(-x), then the assert in canonicalizeAbsNabs() will be hit. But we decide to canonicalize pattern abs(-x) in a separated patch, I just keep canonicalizeAbsNabs() recognize the patterns which trunk recognizes. When canonicalization patch is committed, we should solve TODO.

2, Reply the comment in D48754 in file ValueTracking.cpp at line 4671. I think matchselectpattern can only return a SelectPatternResult struct. RHS stores negated operand, LHS stores the other operand. ABS(-X) and NABS(-x) is just for good understanding?

3, testcase abs_abs_x17/abs_nabs_x17/nabs_abs_x17/nabs_nabs_x17 already be folded in trunk is because (%sub = sub nsw i32 0, %x
, %cmp = icmp sgt i32 %sub, -1) can be folded to (%sub = sub nsw i32 0, %x, %cmp = icmp slt i32 %x, 0) by visiticmp(). After this folding, the left IRs is a standard abs pattern(abx(x)), so it can be recognized. But after this patch, abs(-x) is also recognized, so visiticmp() can not fold %cmp = icmp sgt i32 %sub, -1 any more. So we get different result with trunk. But after canonicalize patch, I assume, we should also get abs(x)

[RKSimon]

llvm/lib/Analysis/ValueTracking.cpp

4658

Is this better?

  if (match(TrueVal, MaybeSExtLHS)) {
      LHS = TrueVal;
      RHS = FalseVal;
  } else {
      LHS = FalseVal;
      RHS = TrueVal;
  }
if (CmpUsesNegatedOp)
  std::swap(LHS, RHS);

[shchenz]

fix Simon's comments.

[shchenz]

@RKSimon Hi Simon, thanks very much for your comment. I have updated accordingly.

[spatel]

llvm/lib/Analysis/ValueTracking.cpp

4640–4641

What happens if the cmp uses a negated and sign-extended op? I'm not sure if this is possible because of other transforms. Do we have test(s) that include that possibility?

llvm/test/Transforms/InstCombine/abs_abs.ll

333–336

Do you know why the scalar version above folded, but the vector version did not? Something is falsely excluding vector types.

[shchenz]

llvm/lib/Analysis/ValueTracking.cpp

4640–4641

new patch can recognize:
1:
%ext = sext i16 %tmp to i32
%b = sub i32 0, %ext
%cond = icmp sgt i32 %b, -1
%ret = select i1 %cond %b, %ext

%ext can be any operator's result including sext. So I

2:
%ext = sext i16 %tmp to i32
%b = sub i32 0, %ext
%cond = icmp sgt i32 %ext, -1
%ret = select i1 %cond %b, %ext

in this case, it is the same logic with trunk, so I think there should be already test for it. (abs_canonical_5/nabs_canonical_5 in abs-1.ll)

3:
%b = sub i16 0, %tmp
%ext = sext i16 %b to i32
%cond = icmp sgt i32 %ext, -1
%ret = select i1 %cond %tmp, %X

for this case:
if %X is %b, in trunk and new patch, this is not a abs pattern.
if %X is %ext, in trunk and new patch, this is also not a abs pattern.

@spatel Sanjay, Do you have any other pattern I have not considered about?

But there should be some thing we can do for sign-extended to enlarge abs pattern scope. for example We should recognize (%tmp, %ext) as negation pair in isKnownNegation(). Maybe I will do this after I finish current work for abs.

llvm/test/Transforms/InstCombine/abs_abs.ll

333–336

Yes, it is also confuse me. I will look into it. Maybe there is a bug in trunk.

[spatel]

llvm/lib/Analysis/ValueTracking.cpp

4640–4641

The sext pattern is my only concern with this patch.

Also, I think we might be able to simplify the logic a bit more. I'll send an idea.

[shchenz]

@spatel, much appriciate for your help, Sanjay. Anything wrong, please let me know. And for icmp not folded for vector type issue, I created new patch D49283 to fix it. Thanks.

[spatel]

I think the logic is correct, but it would be easier to read if we re-organized it like this:

Index: lib/Analysis/ValueTracking.cpp
===================================================================
--- lib/Analysis/ValueTracking.cpp	(revision 336964)
+++ lib/Analysis/ValueTracking.cpp	(working copy)
@@ -4627,34 +4627,49 @@
     }
   }
 
-  // Sign-extending LHS does not change its sign, so TrueVal/FalseVal can
-  // match against either LHS or sext(LHS).
-  auto MaybeSExtLHS = m_CombineOr(m_Specific(CmpLHS),
-                                  m_SExt(m_Specific(CmpLHS)));
-  if ((match(TrueVal, MaybeSExtLHS) &&
-       match(FalseVal, m_Neg(m_Specific(TrueVal)))) ||
-      (match(FalseVal, MaybeSExtLHS) &&
-       match(TrueVal, m_Neg(m_Specific(FalseVal))))) {
-    // Set LHS and RHS so that RHS is the negated operand of the select
-    if (match(TrueVal, MaybeSExtLHS)) {
+  if (isKnownNegation(TrueVal, FalseVal)) {
+    // Sign-extending LHS does not change its sign, so TrueVal/FalseVal can
+    // match against either LHS or sext(LHS).
+    auto MaybeSExtCmpLHS = m_CombineOr(m_Specific(CmpLHS),
+                                       m_SExt(m_Specific(CmpLHS)));
+    auto ZeroOrAllOnes = m_CombineOr(m_ZeroInt(), m_AllOnes());
+    auto ZeroOrOne = m_CombineOr(m_ZeroInt(), m_One());
+    if (match(TrueVal, MaybeSExtCmpLHS)) {
+      // Set the return values. If the compare uses the negated value (-X >s 0),
+      // swap the return values because the negated value is always 'RHS'.
       LHS = TrueVal;
       RHS = FalseVal;
-    } else {
+      if (match(CmpLHS, m_Neg(m_Specific(FalseVal))))
+        std::swap(LHS, RHS);
+
+      // (X >s 0) ? X : -X or (X >s -1) ? X : -X --> ABS(X)
+      // (-X >s 0) ? -X : X or (-X >s -1) ? -X : X --> ABS(X)
+      if (Pred == ICmpInst::ICMP_SGT && match(CmpRHS, ZeroOrAllOnes))
+        return {SPF_ABS, SPNB_NA, false};
+
+      // (X <s 0) ? X : -X or (X <s 1) ? X : -X --> NABS(X)
+      // (-X <s 0) ? -X : X or (-X <s 1) ? -X : X --> NABS(X)
+      if (Pred == ICmpInst::ICMP_SLT && match(CmpRHS, ZeroOrOne))
+        return {SPF_NABS, SPNB_NA, false};
+    }
+    if (match(FalseVal, MaybeSExtCmpLHS)) {
+      // Set the return values. If the compare uses the negated value (-X >s 0),
+      // swap the return values because the negated value is always 'RHS'.
       LHS = FalseVal;
       RHS = TrueVal;
-    }
+      if (match(CmpLHS, m_Neg(m_Specific(TrueVal))))
+        std::swap(LHS, RHS);
 
-    // (X >s 0) ? X : -X or (X >s -1) ? X : -X --> ABS(X)
-    // (X >s 0) ? -X : X or (X >s -1) ? -X : X --> NABS(X)
-    if (Pred == ICmpInst::ICMP_SGT &&
-        match(CmpRHS, m_CombineOr(m_ZeroInt(), m_AllOnes())))
-      return {(LHS == TrueVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
+      // (X >s 0) ? -X : X or (X >s -1) ? -X : X --> NABS(X)
+      // (-X >s 0) ? X : -X or (-X >s -1) ? X : -X --> NABS(X)
+      if (Pred == ICmpInst::ICMP_SGT && match(CmpRHS, ZeroOrAllOnes))
+        return {SPF_NABS, SPNB_NA, false};
 
-    // (X <s 0) ? -X : X or (X <s 1) ? -X : X --> ABS(X)
-    // (X <s 0) ? X : -X or (X <s 1) ? X : -X --> NABS(X)
-    if (Pred == ICmpInst::ICMP_SLT &&
-        match(CmpRHS, m_CombineOr(m_ZeroInt(), m_One())))
-      return {(LHS == FalseVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
+      // (X <s 0) ? -X : X or (X <s 1) ? -X : X --> ABS(X)
+      // (-X <s 0) ? X : -X or (-X <s 1) ? X : -X --> ABS(X)
+      if (Pred == ICmpInst::ICMP_SLT && match(CmpRHS, ZeroOrOne))
+        return {SPF_ABS, SPNB_NA, false};
+    }
   }
 
   if (CmpInst::isIntPredicate(Pred))

[shchenz]

fix Sanjay comments.

[shchenz]

@spatel Hi Sanjay, thanks for your such detailed comments. I have updated accordingly.

[spatel]

LGTM

llvm/lib/Analysis/ValueTracking.cpp

if (TrueVal == CmpLHS && FalseVal == CmpRHS) {
     case FCmpInst::FCMP_OLE: return {SPF_FMINNUM, NaNBehavior, Ordered};
     }
   }
 
   // Sign-extending LHS does not change its sign, so TrueVal/FalseVal can
   // match against either LHS or sext(LHS).
   auto MaybeSExtLHS = m_CombineOr(m_Specific(CmpLHS),
                                   m_SExt(m_Specific(CmpLHS)));
-  if ((match(TrueVal, MaybeSExtLHS) &&
-       match(FalseVal, m_Neg(m_Specific(TrueVal)))) ||
-      (match(FalseVal, MaybeSExtLHS) &&
-       match(TrueVal, m_Neg(m_Specific(FalseVal))))) {
+  if ((match(TrueVal, MaybeSExtLHS) || match(FalseVal, MaybeSExtLHS)) &&
+      isKnownNegation(TrueVal, FalseVal)) {
     // Set LHS and RHS so that RHS is the negated operand of the select
+    bool CmpUsesNegatedOp = match(CmpLHS, m_Neg(m_Specific(TrueVal))) ||
+                        match(CmpLHS, m_Neg(m_Specific(FalseVal)));
     if (match(TrueVal, MaybeSExtLHS)) {
+      if (!CmpUsesNegatedOp) {
         LHS = TrueVal;
         RHS = FalseVal;
       } else {
         LHS = FalseVal;
         RHS = TrueVal;
       }
+    } else {
+      if (!CmpUsesNegatedOp) {
+        LHS = FalseVal;
+        RHS = TrueVal;
+      } else {
+        LHS = TrueVal;
+        RHS = FalseVal;
+      }
+    }
 
     // (X >s 0) ? X : -X or (X >s -1) ? X : -X --> ABS(X)
     // (X >s 0) ? -X : X or (X >s -1) ? -X : X --> NABS(X)
-    if (Pred == ICmpInst::ICMP_SGT &&
+    if (!CmpUsesNegatedOp && Pred == ICmpInst::ICMP_SGT &&
         match(CmpRHS, m_CombineOr(m_ZeroInt(), m_AllOnes())))
       return {(LHS == TrueVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
 
     // (X <s 0) ? -X : X or (X <s 1) ? -X : X --> ABS(X)
     // (X <s 0) ? X : -X or (X <s 1) ? X : -X --> NABS(X)
-    if (Pred == ICmpInst::ICMP_SLT &&
+    if (!CmpUsesNegatedOp && Pred == ICmpInst::ICMP_SLT &&
         match(CmpRHS, m_CombineOr(m_ZeroInt(), m_One())))
       return {(LHS == FalseVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
+
+    // (-X >s 0) ? -X : X and (-X >s -1) ? -X : X --> ABS(-X)
+    // (-X >s 0) ? X : -X and (-X >s -1) ? X : -X --> NABS(-X)
+    if (CmpUsesNegatedOp && Pred == ICmpInst::ICMP_SGT &&
+        match(CmpRHS, m_CombineOr(m_ZeroInt(), m_AllOnes())))
+      return {(LHS == FalseVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
+
+    // (-X <s 0) ? X : -X and (X <s 1) ? X : -X --> ABS(-X)
+    // (-X <s 0) ? -X : X and (-X <s 1) ? -X : X --> NABS(-X)
+    if (CmpUsesNegatedOp && Pred == ICmpInst::ICMP_SLT &&
+        match(CmpRHS, m_CombineOr(m_ZeroInt(), m_One())))
+      return {(LHS == TrueVal) ? SPF_ABS : SPF_NABS, SPNB_NA, false};
   }
 
   if (CmpInst::isIntPredicate(Pred))
     return matchMinMax(Pred, CmpLHS, CmpRHS, TrueVal, FalseVal, LHS, RHS, Depth);
 
   // According to (IEEE 754-2008 5.3.1), minNum(0.0, -0.0) and similar
   // may return either -0.0 or 0.0, so fcmp/select pair has stricter
   // semantics than minNum. Be conservative in such case.

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

static Instruction *canonicalizeAbsNabs(SelectInst &Sel, ICmpInst &Cmp,
   // Choose a sign-bit check for the compare (likely simpler for codegen).
   // ABS:  (X <s 0) ? -X : X
   // NABS: (X <s 0) ? X : -X
   Value *LHS, *RHS;
   SelectPatternFlavor SPF = matchSelectPattern(&Sel, LHS, RHS).Flavor;
   if (SPF != SelectPatternFlavor::SPF_ABS &&
       SPF != SelectPatternFlavor::SPF_NABS)
     return nullptr;
   
+  // TODO: later canonicalization change will move this condition check.
+  // Without this check, following assert will be hit.
+  if (match(Cmp.getOperand(0), m_Sub(m_Value(), m_Value())))
+    return nullptr;
+
   // Is this already canonical?
   if (match(Cmp.getOperand(1), m_ZeroInt()) &&
       Cmp.getPredicate() == ICmpInst::ICMP_SLT)
     return nullptr;
 
   // Create the canonical compare.
   Cmp.setPredicate(ICmpInst::ICMP_SLT);
   Cmp.setOperand(1, ConstantInt::getNullValue(Cmp.getOperand(0)->getType()));

llvm/test/Transforms/InstCombine/abs_abs.ll

;
   %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
   ret i32 %cond18
 }
 
 ; abs(abs(-x)) -> abs(-x)
 define i32 @abs_abs_x17(i32 %x) {
 ; CHECK-LABEL: @abs_abs_x17(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[SUB]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %sub = sub nsw i32 0, %x
   %cmp = icmp sgt i32 %sub, -1
   %cond = select i1 %cmp, i32 %sub, i32 %x
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; abs(abs(x - y)) -> abs(x - y)
 define i32 @abs_abs_x18(i32 %x, i32 %y) {
 ; CHECK-LABEL: @abs_abs_x18(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[COND]], 0 
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select i1 [[CMP1]], i32 [[SUB16]], i32 [[COND]]
-; CHECK-NEXT:    ret i32 [[COND18]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %a = sub nsw i32 %x, %y
   %b = sub nsw i32 %y, %x
   %cmp = icmp sgt i32 %a, -1
   %cond = select i1 %cmp, i32 %a, i32 %b
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; abs(abs(-x)) -> abs(-x)
 define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @abs_abs_x02_vec(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %sub = sub nsw <2 x i32> zeroinitializer, %x
   %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
   ret <2 x i32> %cond18
 }
 
 ; abs(abs(x - y)) -> abs(x - y)
 define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @abs_abs_x03_vec(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[B]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %a = sub nsw <2 x i32> %x, %y
   %b = sub nsw <2 x i32> %y, %x
   %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
;
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; nabs(nabs(-x)) -> nabs(-x)
 define i32 @nabs_nabs_x17(i32 %x) {
 ; CHECK-LABEL: @nabs_nabs_x17(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[SUB]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %sub = sub nsw i32 0, %x
   %cmp = icmp sgt i32 %sub, -1
   %cond = select i1 %cmp, i32 %x, i32 %sub
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
   ret i32 %cond18
 }
 
 ; nabs(nabs(x - y)) -> nabs(x - y)
 define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
 ; CHECK-LABEL: @nabs_nabs_x18(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[COND]], 0 
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select i1 [[CMP1]], i32 [[COND]], i32 [[SUB16]]
-; CHECK-NEXT:    ret i32 [[COND18]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %a = sub nsw i32 %x, %y
   %b = sub nsw i32 %y, %x
   %cmp = icmp sgt i32 %a, -1
   %cond = select i1 %cmp, i32 %b, i32 %a
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
   ret i32 %cond18
 }
 
 ; nabs(nabs(-x)) -> nabs(-x)
 define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @nabs_nabs_x01_vec(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
-;
-
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %sub = sub nsw <2 x i32> zeroinitializer, %x
   %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
   ret <2 x i32> %cond18
 }
 
 ; nabs(nabs(x - y)) -> nabs(x - y)
 define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @nabs_nabs_x02_vec(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[B]], <2 x i32> [[A]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %a = sub nsw <2 x i32> %x, %y
   %b = sub nsw <2 x i32> %y, %x
   %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
;
   %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
   ret i32 %cond18
 }
 
 ; abs(nabs(-x)) -> abs(-x)
 define i32 @abs_nabs_x17(i32 %x) {
 ; CHECK-LABEL: @abs_nabs_x17(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[SUB]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
-; CHECK-NEXT:    ret i32 [[COND1]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %sub = sub nsw i32 0, %x
   %cmp = icmp sgt i32 %sub, -1
   %cond = select i1 %cmp, i32 %x, i32 %sub
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; abs(nabs(x - y)) -> abs(x - y)
 define i32 @abs_nabs_x18(i32 %x, i32 %y) {
 ; CHECK-LABEL: @abs_nabs_x18(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A]], -1
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[COND]], 0 
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select i1 [[CMP1]], i32 [[SUB16]], i32 [[COND]]
-; CHECK-NEXT:    ret i32 [[COND18]]
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %a = sub nsw i32 %x, %y
   %b = sub nsw i32 %y, %x
   %cmp = icmp sgt i32 %a, -1
   %cond = select i1 %cmp, i32 %b, i32 %a
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; abs(nabs(-x)) -> abs(-x)
 define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @abs_nabs_x01_vec(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %sub = sub nsw <2 x i32> zeroinitializer, %x
   %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
   ret <2 x i32> %cond18
 }
 
 ; abs(nabs(x - y)) -> abs(x - y)
 define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @abs_nabs_x02_vec(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[B]], <2 x i32> [[A]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[SUB16]], <2 x i32> [[COND]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[B]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %a = sub nsw <2 x i32> %x, %y
   %b = sub nsw <2 x i32> %y, %x
   %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
;
   %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
   ret i32 %cond18
 }
 
 ; nabs(abs(-x)) -> nabs(-x)
 define i32 @nabs_abs_x17(i32 %x) {
 ; CHECK-LABEL: @nabs_abs_x17(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[SUB]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
-; CHECK-NEXT:    ret i32 [[COND1]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %sub = sub nsw i32 0, %x
   %cmp = icmp sgt i32 %sub, -1
   %cond = select i1 %cmp, i32 %sub, i32 %x
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
   ret i32 %cond18
 }
 
 ; nabs(abs(x - y)) -> nabs(x - y)
 define i32 @nabs_abs_x18(i32 %x, i32 %y) {
 ; CHECK-LABEL: @nabs_abs_x18(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw i32 [[Y]], [[X]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A]], -1
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[COND]], 0 
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select i1 [[CMP1]], i32 [[COND]], i32 [[SUB16]]
-; CHECK-NEXT:    ret i32 [[COND18]]
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %a = sub nsw i32 %x, %y
   %b = sub nsw i32 %y, %x
   %cmp = icmp sgt i32 %a, -1
   %cond = select i1 %cmp, i32 %a, i32 %b
   %cmp1 = icmp sgt i32 %cond, -1
   %sub16 = sub nsw i32 0, %cond
   %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
   ret i32 %cond18
 }
 
 ; nabs(abs(-x)) -> nabs(-x)
 define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @nabs_abs_x01_vec(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[SUB]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
-;
+; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %sub = sub nsw <2 x i32> zeroinitializer, %x
   %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
   ret <2 x i32> %cond18
 }
 
 ; nabs(abs(x - y)) -> nabs(x - y)
 define <2 x i32> @nabs_abs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @nabs_abs_x02_vec(
 ; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    [[B:%.*]] = sub nsw <2 x i32> [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> [[A]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[B]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt <2 x i32> [[COND]], zeroinitializer
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[B]], <2 x i32> [[A]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %a = sub nsw <2 x i32> %x, %y
   %b = sub nsw <2 x i32> %y, %x
   %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
   %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
   %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
   %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
   %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
   ret <2 x i32> %cond18
 }