This is an archive of the discontinued LLVM Phabricator instance.

Differential D48985

[WebAssembly] Converted to stack based instructions in MC.
AbandonedPublic

Authored by aardappel on Jul 5 2018, 11:48 AM.

Details

Reviewers
dschuff
sunfish
Summary

WIP FOR REVIEW ONLY, DO NOT MERGE

  • Moved Explicit Locals pass to last.
  • Made that pass obligatory.
  • Made it convert from register to stack based instructions, and removed the registers.
  • Many fixes to related code that was expecting register based instructions.
  • Reworked all the tests.

Diff Detail

Event Timeline

aardappel created this revision.Jul 5 2018, 11:48 AM
Herald added subscribers: llvm-commits, aheejin, eraman and 2 others. · View Herald TranscriptJul 5 2018, 11:48 AM
Harbormaster completed remote builds in B20066: Diff 154278.Jul 5 2018, 11:48 AM
aardappel edited the summary of this revision. (Show Details)Jul 5 2018, 12:01 PM
aheejin added a comment.Jul 5 2018, 1:15 PM

So after this patch, is the former register-based form of printing still supported, or the stack-baed form is the only printable form?

aardappel added a comment.Jul 5 2018, 1:18 PM
In D48985#1153633, @aheejin wrote:

So after this patch, is the former register-based form of printing still supported, or the stack-baed form is the only printable form?

After I land https://reviews.llvm.org/D48985 the register based form will be gone permanently from everything after the Explicit Locals pass yes, which includes all text output and parsing.

aheejin added a comment.Jul 5 2018, 8:00 PM

Why is this WIP and when do you plan to land this? I'm working on tests that may conflict with this, so I'm not sure which format I should target.

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
201

Can we infer this information from Operands? Looks like OperandVector is a vector of unique_ptr of MCParsedAsmOperand, which has isMem() member function.
Otherwise after we add other atomic read-modify-write instructions we are gonna need them here as well.

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
130

I added these in D48992 before seeing this. Thanks.

aardappel added a comment.Jul 6 2018, 8:38 AM

This is WiP because there's a lot of work still to do to make the tests pass, and I wanted to gather input on whether I am doing the right thing.
It may take weeks for me to land this.

If you're doing work that conflicts with this, you're likely best of targeting the old format, and then I will resolve/convert it. Unless of course you think it will take you even longer than me :)

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
201

I don't have Operands here, only tokens. The Operands/MCInst are generated by the asm matcher, which comes after this.

sunfish added a comment.Jul 17 2018, 3:43 PM

I'm not deeply familiar with MC's Asm parsing support, but this looks like a good direction to go.

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
319

With the explicit locals pass going away, we can remove the second sentence of this comment.

aardappel abandoned this revision.May 7 2020, 3:25 PM

Obsolete, fixed elsewhere since.

Herald added a project: Restricted Project. · View Herald TranscriptMay 7 2020, 3:25 PM
Herald added a subscriber: jfb. · View Herald Transcript

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Diff 154278

lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

Show All 28 Lines
#include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetRegistry.h"
using namespace llvm; using namespace llvm;
#define DEBUG_TYPE "wasm-asm-parser" #define DEBUG_TYPE "wasm-asm-parser"
namespace { namespace {
// We store register types as SimpleValueType to retain SIMD layout
// information, but must also be able to supply them as the (unnamed)
// register enum from WebAssemblyRegisterInfo.td/.inc.
static unsigned MVTToWasmReg(MVT::SimpleValueType Type) {
switch(Type) {
case MVT::i32: return WebAssembly::I32_0;
case MVT::i64: return WebAssembly::I64_0;
case MVT::f32: return WebAssembly::F32_0;
case MVT::f64: return WebAssembly::F64_0;
case MVT::v16i8: return WebAssembly::V128_0;
case MVT::v8i16: return WebAssembly::V128_0;
case MVT::v4i32: return WebAssembly::V128_0;
case MVT::v4f32: return WebAssembly::V128_0;
default: return MVT::INVALID_SIMPLE_VALUE_TYPE;
}
}
/// WebAssemblyOperand - Instances of this class represent the operands in a /// WebAssemblyOperand - Instances of this class represent the operands in a
/// parsed WASM machine instruction. /// parsed WASM machine instruction.
struct WebAssemblyOperand : public MCParsedAsmOperand { struct WebAssemblyOperand : public MCParsedAsmOperand {
enum KindTy { Token, Local, Stack, Integer, Float, Symbol } Kind; enum KindTy { Token, Integer, Float, Symbol } Kind;
SMLoc StartLoc, EndLoc; SMLoc StartLoc, EndLoc;
struct TokOp { struct TokOp {
StringRef Tok; StringRef Tok;
}; };
struct RegOp {
// This is a (virtual) local or stack register represented as 0..
unsigned RegNo;
// In most targets, the register number also encodes the type, but for
// wasm we have to track that seperately since we have an unbounded
// number of registers.
// This has the unfortunate side effect that we supply a different value
// to the table-gen matcher at different times in the process (when it
// calls getReg() or addRegOperands().
// TODO: While this works, it feels brittle. and would be nice to clean up.
MVT::SimpleValueType Type;
};
struct IntOp { struct IntOp {
int64_t Val; int64_t Val;
}; };
struct FltOp { struct FltOp {
double Val; double Val;
}; };
struct SymOp { struct SymOp {
const MCExpr *Exp; const MCExpr *Exp;
}; };
union { union {
struct TokOp Tok; struct TokOp Tok;
struct RegOp Reg;
struct IntOp Int; struct IntOp Int;
struct FltOp Flt; struct FltOp Flt;
struct SymOp Sym; struct SymOp Sym;
}; };
WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, TokOp T) WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, TokOp T)
: Kind(K), StartLoc(Start), EndLoc(End), Tok(T) {} : Kind(K), StartLoc(Start), EndLoc(End), Tok(T) {}
WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, RegOp R)
: Kind(K), StartLoc(Start), EndLoc(End), Reg(R) {}
WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, IntOp I) WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, IntOp I)
: Kind(K), StartLoc(Start), EndLoc(End), Int(I) {} : Kind(K), StartLoc(Start), EndLoc(End), Int(I) {}
WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, FltOp F) WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, FltOp F)
: Kind(K), StartLoc(Start), EndLoc(End), Flt(F) {} : Kind(K), StartLoc(Start), EndLoc(End), Flt(F) {}
WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, SymOp S) WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, SymOp S)
: Kind(K), StartLoc(Start), EndLoc(End), Sym(S) {} : Kind(K), StartLoc(Start), EndLoc(End), Sym(S) {}
bool isToken() const override { return Kind == Token; } bool isToken() const override { return Kind == Token; }
bool isImm() const override { return Kind == Integer || bool isImm() const override { return Kind == Integer ||
Kind == Float || Kind == Float ||
Kind == Symbol; } Kind == Symbol; }
bool isReg() const override { return Kind == Local || Kind == Stack; }
bool isMem() const override { return false; } bool isMem() const override { return false; }
bool isReg() const override { return false; }
unsigned getReg() const override { unsigned getReg() const override {
assert(isReg()); llvm_unreachable("Assembly inspects a register operand");
// This is called from the tablegen matcher (MatchInstructionImpl) return 0;
// where it expects to match the type of register, see RegOp above.
return MVTToWasmReg(Reg.Type);
} }
StringRef getToken() const { StringRef getToken() const {
assert(isToken()); assert(isToken());
return Tok.Tok; return Tok.Tok;
} }
SMLoc getStartLoc() const override { return StartLoc; } SMLoc getStartLoc() const override { return StartLoc; }
SMLoc getEndLoc() const override { return EndLoc; } SMLoc getEndLoc() const override { return EndLoc; }
void addRegOperands(MCInst &Inst, unsigned N) const { void addRegOperands(MCInst &, unsigned) const {
assert(N == 1 && "Invalid number of operands!"); // Required by the assembly matcher.
assert(isReg() && "Not a register operand!"); llvm_unreachable("Assembly matcher creates register operands");
// This is called from the tablegen matcher (MatchInstructionImpl)
// where it expects to output the actual register index, see RegOp above.
unsigned R = Reg.RegNo;
if (Kind == Stack) {
// A stack register is represented as a large negative number.
// See WebAssemblyRegNumbering::runOnMachineFunction and
// getWARegStackId for why this | is needed.
R |= INT32_MIN;
}
Inst.addOperand(MCOperand::createReg(R));
} }
void addImmOperands(MCInst &Inst, unsigned N) const { void addImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!"); assert(N == 1 && "Invalid number of operands!");
if (Kind == Integer) if (Kind == Integer)
Inst.addOperand(MCOperand::createImm(Int.Val)); Inst.addOperand(MCOperand::createImm(Int.Val));
else if (Kind == Float) else if (Kind == Float)
Inst.addOperand(MCOperand::createFPImm(Flt.Val)); Inst.addOperand(MCOperand::createFPImm(Flt.Val));
else if (Kind == Symbol) else if (Kind == Symbol)
Inst.addOperand(MCOperand::createExpr(Sym.Exp)); Inst.addOperand(MCOperand::createExpr(Sym.Exp));
else else
llvm_unreachable("Should be immediate or symbol!"); llvm_unreachable("Should be immediate or symbol!");
} }
void print(raw_ostream &OS) const override { void print(raw_ostream &OS) const override {
switch (Kind) { switch (Kind) {
case Token: case Token:
OS << "Tok:" << Tok.Tok; OS << "Tok:" << Tok.Tok;
break; break;
case Local:
OS << "Loc:" << Reg.RegNo << ":" << static_cast<int>(Reg.Type);
break;
case Stack:
OS << "Stk:" << Reg.RegNo << ":" << static_cast<int>(Reg.Type);
break;
case Integer: case Integer:
OS << "Int:" << Int.Val; OS << "Int:" << Int.Val;
break; break;
case Float: case Float:
OS << "Flt:" << Flt.Val; OS << "Flt:" << Flt.Val;
break; break;
case Symbol: case Symbol:
OS << "Sym:" << Sym.Exp; OS << "Sym:" << Sym.Exp;
break; break;
} }
} }
}; };
class WebAssemblyAsmParser final : public MCTargetAsmParser { class WebAssemblyAsmParser final : public MCTargetAsmParser {
MCAsmParser &Parser; MCAsmParser &Parser;
MCAsmLexer &Lexer; MCAsmLexer &Lexer;
// These are for the current function being parsed:
// These are vectors since register assignments are so far non-sparse.
// Replace by map if necessary.
std::vector<MVT::SimpleValueType> LocalTypes;
std::vector<MVT::SimpleValueType> StackTypes;
MCSymbol *LastLabel; MCSymbol *LastLabel;
public: public:
WebAssemblyAsmParser(const MCSubtargetInfo &sti, MCAsmParser &Parser, WebAssemblyAsmParser(const MCSubtargetInfo &sti, MCAsmParser &Parser,
const MCInstrInfo &mii, const MCTargetOptions &Options) const MCInstrInfo &mii, const MCTargetOptions &Options)
: MCTargetAsmParser(Options, sti, mii), Parser(Parser), : MCTargetAsmParser(Options, sti, mii), Parser(Parser),
Lexer(Parser.getLexer()), LastLabel(nullptr) { Lexer(Parser.getLexer()), LastLabel(nullptr) {
} }
Show All 33 Lines return StringSwitch<MVT::SimpleValueType>(RegType)
.Case("f64", MVT::f64) .Case("f64", MVT::f64)
.Case("i8x16", MVT::v16i8) .Case("i8x16", MVT::v16i8)
.Case("i16x8", MVT::v8i16) .Case("i16x8", MVT::v8i16)
.Case("i32x4", MVT::v4i32) .Case("i32x4", MVT::v4i32)
.Case("f32x4", MVT::v4f32) .Case("f32x4", MVT::v4f32)
.Default(MVT::INVALID_SIMPLE_VALUE_TYPE); .Default(MVT::INVALID_SIMPLE_VALUE_TYPE);
} }
MVT::SimpleValueType &GetType(
std::vector<MVT::SimpleValueType> &Types, size_t i) {
Types.resize(std::max(i + 1, Types.size()), MVT::INVALID_SIMPLE_VALUE_TYPE);
return Types[i];
}
bool ParseReg(OperandVector &Operands, StringRef TypePrefix) {
if (Lexer.is(AsmToken::Integer)) {
auto &Local = Lexer.getTok();
// This is a reference to a local, turn it into a virtual register.
auto LocalNo = static_cast<unsigned>(Local.getIntVal());
Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Local, Local.getLoc(),
Local.getEndLoc(),
WebAssemblyOperand::RegOp{LocalNo,
GetType(LocalTypes, LocalNo)}));
Parser.Lex();
} else if (Lexer.is(AsmToken::Identifier)) {
auto &StackRegTok = Lexer.getTok();
// These are push/pop/drop pseudo stack registers, which we turn
// into virtual registers also. The stackify pass will later turn them
// back into implicit stack references if possible.
auto StackReg = StackRegTok.getString();
auto StackOp = StackReg.take_while([](char c) { return isalpha(c); });
auto Reg = StackReg.drop_front(StackOp.size());
unsigned long long ParsedRegNo = 0;
if (!Reg.empty() && getAsUnsignedInteger(Reg, 10, ParsedRegNo))
return Error("Cannot parse stack register index: ", StackRegTok);
unsigned RegNo = static_cast<unsigned>(ParsedRegNo);
if (StackOp == "push") {
// This defines a result, record register type.
auto RegType = ParseRegType(TypePrefix);
GetType(StackTypes, RegNo) = RegType;
Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Stack,
StackRegTok.getLoc(),
StackRegTok.getEndLoc(),
WebAssemblyOperand::RegOp{RegNo, RegType}));
} else if (StackOp == "pop") {
// This uses a previously defined stack value.
auto RegType = GetType(StackTypes, RegNo);
Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Stack,
StackRegTok.getLoc(),
StackRegTok.getEndLoc(),
WebAssemblyOperand::RegOp{RegNo, RegType}));
} else if (StackOp == "drop") {
// This operand will be dropped, since it is part of an instruction
// whose result is void.
} else {
return Error("Unknown stack register prefix: ", StackRegTok);
}
Parser.Lex();
} else {
return Error(
"Expected identifier/integer following $, instead got: ",
Lexer.getTok());
}
IsNext(AsmToken::Equal);
return false;
}
void ParseSingleInteger(bool IsNegative, OperandVector &Operands) { void ParseSingleInteger(bool IsNegative, OperandVector &Operands) {
auto &Int = Lexer.getTok(); auto &Int = Lexer.getTok();
int64_t Val = Int.getIntVal(); int64_t Val = Int.getIntVal();
if (IsNegative) Val = -Val; if (IsNegative) Val = -Val;
Operands.push_back(make_unique<WebAssemblyOperand>( Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Integer, Int.getLoc(), WebAssemblyOperand::Integer, Int.getLoc(),
Int.getEndLoc(), WebAssemblyOperand::IntOp{Val})); Int.getEndLoc(), WebAssemblyOperand::IntOp{Val}));
Parser.Lex(); Parser.Lex();
} }
bool ParseOperandStartingWithInteger(bool IsNegative, bool ParseOperandStartingWithInteger(bool IsNegative,
OperandVector &Operands, OperandVector &Operands,
StringRef InstType) { StringRef InstName) {
ParseSingleInteger(IsNegative, Operands); ParseSingleInteger(IsNegative, Operands);
if (Lexer.is(AsmToken::LParen)) { // FIXME: there is probably a cleaner way to do this.
// Parse load/store operands of the form: offset($reg)align auto IsLoadStore = InstName.startswith("load") ||
auto &LParen = Lexer.getTok(); InstName.startswith("store") ||
Operands.push_back( InstName.startswith("atomic_load") ||
make_unique<WebAssemblyOperand>(WebAssemblyOperand::Token, InstName.startswith("atomic_store");
aheejinUnsubmitted
Not Done
ReplyInline Actions

Can we infer this information from Operands? Looks like OperandVector is a vector of unique_ptr of MCParsedAsmOperand, which has isMem() member function.
Otherwise after we add other atomic read-modify-write instructions we are gonna need them here as well.

aheejin: Can we infer this information from `Operands`? Looks like `OperandVector` is a vector of…
aardappelAuthorUnsubmitted
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ReplyInline Actions

I don't have Operands here, only tokens. The Operands/MCInst are generated by the asm matcher, which comes after this.

aardappel: I don't have Operands here, only tokens. The Operands/MCInst are generated by the asm matcher…
LParen.getLoc(), if (IsLoadStore) {
LParen.getEndLoc(), // Parse load/store operands of the form: offset align
WebAssemblyOperand::TokOp{ auto &Offset = Lexer.getTok();
LParen.getString()})); if (Offset.is(AsmToken::Integer)) {
Parser.Lex();
if (Expect(AsmToken::Dollar, "register")) return true;
if (ParseReg(Operands, InstType)) return true;
auto &RParen = Lexer.getTok();
Operands.push_back(
make_unique<WebAssemblyOperand>(WebAssemblyOperand::Token,
RParen.getLoc(),
RParen.getEndLoc(),
WebAssemblyOperand::TokOp{
RParen.getString()}));
if (Expect(AsmToken::RParen, ")")) return true;
if (Lexer.is(AsmToken::Integer)) {
ParseSingleInteger(false, Operands); ParseSingleInteger(false, Operands);
} else { } else {
// Alignment not specified. // Alignment not specified.
// FIXME: correctly derive a default from the instruction. // FIXME: correctly derive a default from the instruction.
// We can't just call WebAssembly::GetDefaultP2Align since we don't have
// an opcode until after the assembly matcher.
Operands.push_back(make_unique<WebAssemblyOperand>( Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Integer, RParen.getLoc(), WebAssemblyOperand::Integer, Offset.getLoc(),
RParen.getEndLoc(), WebAssemblyOperand::IntOp{0})); Offset.getEndLoc(), WebAssemblyOperand::IntOp{0}));
} }
} }
return false; return false;
} }
bool ParseInstruction(ParseInstructionInfo &/*Info*/, StringRef Name, bool ParseInstruction(ParseInstructionInfo &/*Info*/, StringRef Name,
SMLoc NameLoc, OperandVector &Operands) override { SMLoc NameLoc, OperandVector &Operands) override {
Operands.push_back( Operands.push_back(
make_unique<WebAssemblyOperand>(WebAssemblyOperand::Token, NameLoc, make_unique<WebAssemblyOperand>(WebAssemblyOperand::Token, NameLoc,
SMLoc::getFromPointer( SMLoc::getFromPointer(
NameLoc.getPointer() + Name.size()), NameLoc.getPointer() + Name.size()),
WebAssemblyOperand::TokOp{ WebAssemblyOperand::TokOp{
StringRef(NameLoc.getPointer(), StringRef(NameLoc.getPointer(),
Name.size())})); Name.size())}));
auto NamePair = Name.split('.'); auto NamePair = Name.split('.');
// If no '.', there is no type prefix. // If no '.', there is no type prefix.
if (NamePair.second.empty()) std::swap(NamePair.first, NamePair.second); if (NamePair.second.empty()) std::swap(NamePair.first, NamePair.second);
while (Lexer.isNot(AsmToken::EndOfStatement)) { while (Lexer.isNot(AsmToken::EndOfStatement)) {
auto &Tok = Lexer.getTok(); auto &Tok = Lexer.getTok();
switch (Tok.getKind()) { switch (Tok.getKind()) {
case AsmToken::Dollar: {
Parser.Lex();
if (ParseReg(Operands, NamePair.first)) return true;
break;
}
case AsmToken::Identifier: { case AsmToken::Identifier: {
auto &Id = Lexer.getTok(); auto &Id = Lexer.getTok();
const MCExpr *Val; const MCExpr *Val;
SMLoc End; SMLoc End;
if (Parser.parsePrimaryExpr(Val, End)) if (Parser.parsePrimaryExpr(Val, End))
return Error("Cannot parse symbol: ", Lexer.getTok()); return Error("Cannot parse symbol: ", Lexer.getTok());
Operands.push_back(make_unique<WebAssemblyOperand>( Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Symbol, Id.getLoc(), WebAssemblyOperand::Symbol, Id.getLoc(),
Id.getEndLoc(), WebAssemblyOperand::SymOp{Val})); Id.getEndLoc(), WebAssemblyOperand::SymOp{Val}));
break; break;
} }
case AsmToken::Minus: case AsmToken::Minus:
Parser.Lex(); Parser.Lex();
if (Lexer.isNot(AsmToken::Integer)) if (Lexer.isNot(AsmToken::Integer))
return Error("Expected integer instead got: ", Lexer.getTok()); return Error("Expected integer instead got: ", Lexer.getTok());
if (ParseOperandStartingWithInteger(true, Operands, NamePair.first)) if (ParseOperandStartingWithInteger(true, Operands, NamePair.second))
return true; return true;
break; break;
case AsmToken::Integer: case AsmToken::Integer:
if (ParseOperandStartingWithInteger(false, Operands, NamePair.first)) if (ParseOperandStartingWithInteger(false, Operands, NamePair.second))
return true; return true;
break; break;
case AsmToken::Real: { case AsmToken::Real: {
double Val; double Val;
if (Tok.getString().getAsDouble(Val, false)) if (Tok.getString().getAsDouble(Val, false))
return Error("Cannot parse real: ", Tok); return Error("Cannot parse real: ", Tok);
Operands.push_back(make_unique<WebAssemblyOperand>( Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Float, Tok.getLoc(), WebAssemblyOperand::Float, Tok.getLoc(),
Tok.getEndLoc(), WebAssemblyOperand::FltOp{Val})); Tok.getEndLoc(), WebAssemblyOperand::FltOp{Val}));
Parser.Lex(); Parser.Lex();
break; break;
} }
default: default:
return Error("Unexpected token in operand: ", Tok); return Error("Unexpected token in operand: ", Tok);
} }
if (Lexer.isNot(AsmToken::EndOfStatement)) { if (Lexer.isNot(AsmToken::EndOfStatement)) {
if (Expect(AsmToken::Comma, ",")) return true; if (Expect(AsmToken::Comma, ",")) return true;
} }
} }
Parser.Lex(); Parser.Lex();
// Call instructions are vararg, but the tablegen matcher doesn't seem to
// support that, so for now we strip these extra operands.
// This is problematic if these arguments are not simple $pop stack
// registers, since e.g. a local register would get lost, so we check for
// this. This can be the case when using -disable-wasm-explicit-locals
// which currently s2wasm requires.
// TODO: Instead, we can move this code to MatchAndEmitInstruction below and
// actually generate get_local instructions on the fly.
// Or even better, improve the matcher to support vararg?
auto IsIndirect = NamePair.second == "call_indirect";
if (IsIndirect || NamePair.second == "call") {
// Figure out number of fixed operands from the instruction.
size_t CallOperands = 1; // The name token.
if (!IsIndirect) CallOperands++; // The function index.
if (!NamePair.first.empty()) CallOperands++; // The result register.
if (Operands.size() > CallOperands) {
// Ensure operands we drop are all $pop.
for (size_t I = CallOperands; I < Operands.size(); I++) {
auto Operand =
reinterpret_cast<WebAssemblyOperand *>(Operands[I].get());
if (Operand->Kind != WebAssemblyOperand::Stack)
Parser.Error(NameLoc,
"Call instruction has non-stack arguments, if this code was "
"generated with -disable-wasm-explicit-locals please remove it");
}
// Drop unneeded operands.
Operands.resize(CallOperands);
}
}
// Block instructions require a signature index, but these are missing in // Block instructions require a signature index, but these are missing in
// assembly, so we add a dummy one explicitly (since we have no control // assembly, so we add a dummy one explicitly (since we have no control
// over signature tables here, we assume these will be regenerated when // over signature tables here, we assume these will be regenerated when
// the wasm module is generated). // the wasm module is generated).
if (NamePair.second == "block" || NamePair.second == "loop") { if (NamePair.second == "block" || NamePair.second == "loop") {
Operands.push_back(make_unique<WebAssemblyOperand>( Operands.push_back(make_unique<WebAssemblyOperand>(
WebAssemblyOperand::Integer, NameLoc, WebAssemblyOperand::Integer, NameLoc,
NameLoc, WebAssemblyOperand::IntOp{-1})); NameLoc, WebAssemblyOperand::IntOp{-1}));
} }
// These don't specify the type, which has to derived from the local index.
if (NamePair.second == "get_local" || NamePair.second == "tee_local") {
if (Operands.size() >= 3 && Operands[1]->isReg() &&
Operands[2]->isImm()) {
auto Op1 = reinterpret_cast<WebAssemblyOperand *>(Operands[1].get());
auto Op2 = reinterpret_cast<WebAssemblyOperand *>(Operands[2].get());
auto Type = GetType(LocalTypes, static_cast<size_t>(Op2->Int.Val));
Op1->Reg.Type = Type;
GetType(StackTypes, Op1->Reg.RegNo) = Type;
}
}
return false; return false;
} }
void onLabelParsed(MCSymbol *Symbol) override { void onLabelParsed(MCSymbol *Symbol) override {
LastLabel = Symbol; LastLabel = Symbol;
} }
bool ParseDirective(AsmToken DirectiveID) override { bool ParseDirective(AsmToken DirectiveID) override {
assert(DirectiveID.getKind() == AsmToken::Identifier); assert(DirectiveID.getKind() == AsmToken::Identifier);
auto &Out = getStreamer(); auto &Out = getStreamer();
auto &TOut = reinterpret_cast<WebAssemblyTargetStreamer &>( auto &TOut = reinterpret_cast<WebAssemblyTargetStreamer &>(
*Out.getTargetStreamer()); *Out.getTargetStreamer());
// TODO: we're just parsing the subset of directives we're interested in, // TODO: we're just parsing the subset of directives we're interested in,
// and ignoring ones we don't recognise. We should ideally verify // and ignoring ones we don't recognise. We should ideally verify
// all directives here. // all directives here.
if (DirectiveID.getString() == ".type") { if (DirectiveID.getString() == ".type") {
// This could be the start of a function, check if followed by // This could be the start of a function, check if followed by
// "label,@function" // "label,@function"
if (!(IsNext(AsmToken::Identifier) && if (!(IsNext(AsmToken::Identifier) &&
IsNext(AsmToken::Comma) && IsNext(AsmToken::Comma) &&
IsNext(AsmToken::At) && IsNext(AsmToken::At) &&
Lexer.is(AsmToken::Identifier))) Lexer.is(AsmToken::Identifier)))
return Error("Expected label,@type declaration, got: ", Lexer.getTok()); return Error("Expected label,@type declaration, got: ", Lexer.getTok());
if (Lexer.getTok().getString() == "function") {
// Track locals from start of function.
LocalTypes.clear();
StackTypes.clear();
}
Parser.Lex(); Parser.Lex();
//Out.EmitSymbolAttribute(??, MCSA_ELF_TypeFunction); //Out.EmitSymbolAttribute(??, MCSA_ELF_TypeFunction);
} else if (DirectiveID.getString() == ".param" || } else if (DirectiveID.getString() == ".param" ||
DirectiveID.getString() == ".local") { DirectiveID.getString() == ".local") {
// Track the number of locals, needed for correct virtual register // Track the number of locals, needed for correct virtual register
// assignment elsewhere. // assignment elsewhere.
// Also output a directive to the streamer. // Also output a directive to the streamer.
std::vector<MVT> Params; std::vector<MVT> Params;
std::vector<MVT> Locals; std::vector<MVT> Locals;
while (Lexer.is(AsmToken::Identifier)) { while (Lexer.is(AsmToken::Identifier)) {
auto RegType = ParseRegType(Lexer.getTok().getString()); auto RegType = ParseRegType(Lexer.getTok().getString());
if (RegType == MVT::INVALID_SIMPLE_VALUE_TYPE) return true; if (RegType == MVT::INVALID_SIMPLE_VALUE_TYPE) return true;
LocalTypes.push_back(RegType);
if (DirectiveID.getString() == ".param") { if (DirectiveID.getString() == ".param") {
Params.push_back(RegType); Params.push_back(RegType);
} else { } else {
Locals.push_back(RegType); Locals.push_back(RegType);
} }
Parser.Lex(); Parser.Lex();
if (!IsNext(AsmToken::Comma)) break; if (!IsNext(AsmToken::Comma)) break;
} }
▲ Show 20 Lines • Show All 56 Lines • Show Last 20 Lines

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp

Show First 20 Lines • Show All 135 Lines • ▼ Show 20 Linesstatic std::string toString(const APFloat &FP) {
assert(Written < BufBytes); assert(Written < BufBytes);
return buf; return buf;
} }
void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) { raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo); const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) { if (Op.isReg()) {
assert((OpNo < MII.get(MI->getOpcode()).getNumOperands() || llvm_unreachable("WebAssembly MCInst can't have register operands");
MII.get(MI->getOpcode()).TSFlags == 0) &&
"WebAssembly variable_ops register ops don't use TSFlags");
unsigned WAReg = Op.getReg();
if (int(WAReg) >= 0)
printRegName(O, WAReg);
else if (OpNo >= MII.get(MI->getOpcode()).getNumDefs())
O << "$pop" << WebAssemblyFunctionInfo::getWARegStackId(WAReg);
else if (WAReg != WebAssemblyFunctionInfo::UnusedReg)
O << "$push" << WebAssemblyFunctionInfo::getWARegStackId(WAReg);
else
O << "$drop";
// Add a '=' suffix if this is a def.
if (OpNo < MII.get(MI->getOpcode()).getNumDefs())
O << '=';
} else if (Op.isImm()) { } else if (Op.isImm()) {
const MCInstrDesc &Desc = MII.get(MI->getOpcode()); const MCInstrDesc &Desc = MII.get(MI->getOpcode());
assert((OpNo < Desc.getNumOperands() || assert((OpNo < Desc.getNumOperands() ||
(Desc.TSFlags & WebAssemblyII::VariableOpIsImmediate)) && (Desc.TSFlags & WebAssemblyII::VariableOpIsImmediate)) &&
"WebAssemblyII::VariableOpIsImmediate should be set for " "WebAssemblyII::VariableOpIsImmediate should be set for "
"variable_ops immediate ops"); "variable_ops immediate ops");
(void)Desc; (void)Desc;
// TODO: (MII.get(MI->getOpcode()).TSFlags & // TODO: (MII.get(MI->getOpcode()).TSFlags &
▲ Show 20 Lines • Show All 95 Lines • Show Last 20 Lines

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

Show First 20 Lines • Show All 119 Lines • ▼ Show 20 Linesinline unsigned GetDefaultP2Align(unsigned Opcode) {
case WebAssembly::ATOMIC_LOAD8_U_I32_S: case WebAssembly::ATOMIC_LOAD8_U_I32_S:
case WebAssembly::ATOMIC_LOAD8_U_I64: case WebAssembly::ATOMIC_LOAD8_U_I64:
case WebAssembly::ATOMIC_LOAD8_U_I64_S: case WebAssembly::ATOMIC_LOAD8_U_I64_S:
case WebAssembly::STORE8_I32: case WebAssembly::STORE8_I32:
case WebAssembly::STORE8_I32_S: case WebAssembly::STORE8_I32_S:
case WebAssembly::STORE8_I64: case WebAssembly::STORE8_I64:
case WebAssembly::STORE8_I64_S: case WebAssembly::STORE8_I64_S:
case WebAssembly::ATOMIC_STORE8_I32: case WebAssembly::ATOMIC_STORE8_I32:
case WebAssembly::ATOMIC_STORE8_I32_S:
case WebAssembly::ATOMIC_STORE8_I64: case WebAssembly::ATOMIC_STORE8_I64:
case WebAssembly::ATOMIC_STORE8_I64_S:
aheejinUnsubmitted
Not Done
ReplyInline Actions

I added these in D48992 before seeing this. Thanks.

aheejin: I added these in D48992 before seeing this. Thanks.
return 0; return 0;
case WebAssembly::LOAD16_S_I32: case WebAssembly::LOAD16_S_I32:
case WebAssembly::LOAD16_S_I32_S: case WebAssembly::LOAD16_S_I32_S:
case WebAssembly::LOAD16_U_I32: case WebAssembly::LOAD16_U_I32:
case WebAssembly::LOAD16_U_I32_S: case WebAssembly::LOAD16_U_I32_S:
case WebAssembly::LOAD16_S_I64: case WebAssembly::LOAD16_S_I64:
case WebAssembly::LOAD16_S_I64_S: case WebAssembly::LOAD16_S_I64_S:
case WebAssembly::LOAD16_U_I64: case WebAssembly::LOAD16_U_I64:
case WebAssembly::LOAD16_U_I64_S: case WebAssembly::LOAD16_U_I64_S:
case WebAssembly::ATOMIC_LOAD16_U_I32: case WebAssembly::ATOMIC_LOAD16_U_I32:
case WebAssembly::ATOMIC_LOAD16_U_I32_S: case WebAssembly::ATOMIC_LOAD16_U_I32_S:
case WebAssembly::ATOMIC_LOAD16_U_I64: case WebAssembly::ATOMIC_LOAD16_U_I64:
case WebAssembly::ATOMIC_LOAD16_U_I64_S: case WebAssembly::ATOMIC_LOAD16_U_I64_S:
case WebAssembly::STORE16_I32: case WebAssembly::STORE16_I32:
case WebAssembly::STORE16_I32_S: case WebAssembly::STORE16_I32_S:
case WebAssembly::STORE16_I64: case WebAssembly::STORE16_I64:
case WebAssembly::STORE16_I64_S: case WebAssembly::STORE16_I64_S:
case WebAssembly::ATOMIC_STORE16_I32: case WebAssembly::ATOMIC_STORE16_I32:
case WebAssembly::ATOMIC_STORE16_I32_S:
case WebAssembly::ATOMIC_STORE16_I64: case WebAssembly::ATOMIC_STORE16_I64:
case WebAssembly::ATOMIC_STORE16_I64_S:
return 1; return 1;
case WebAssembly::LOAD_I32: case WebAssembly::LOAD_I32:
case WebAssembly::LOAD_I32_S: case WebAssembly::LOAD_I32_S:
case WebAssembly::LOAD_F32: case WebAssembly::LOAD_F32:
case WebAssembly::LOAD_F32_S: case WebAssembly::LOAD_F32_S:
case WebAssembly::STORE_I32: case WebAssembly::STORE_I32:
case WebAssembly::STORE_I32_S: case WebAssembly::STORE_I32_S:
case WebAssembly::STORE_F32: case WebAssembly::STORE_F32:
case WebAssembly::STORE_F32_S: case WebAssembly::STORE_F32_S:
case WebAssembly::LOAD32_S_I64: case WebAssembly::LOAD32_S_I64:
case WebAssembly::LOAD32_S_I64_S: case WebAssembly::LOAD32_S_I64_S:
case WebAssembly::LOAD32_U_I64: case WebAssembly::LOAD32_U_I64:
case WebAssembly::LOAD32_U_I64_S: case WebAssembly::LOAD32_U_I64_S:
case WebAssembly::STORE32_I64: case WebAssembly::STORE32_I64:
case WebAssembly::STORE32_I64_S: case WebAssembly::STORE32_I64_S:
case WebAssembly::ATOMIC_LOAD_I32: case WebAssembly::ATOMIC_LOAD_I32:
case WebAssembly::ATOMIC_LOAD_I32_S: case WebAssembly::ATOMIC_LOAD_I32_S:
case WebAssembly::ATOMIC_LOAD32_U_I64: case WebAssembly::ATOMIC_LOAD32_U_I64:
case WebAssembly::ATOMIC_LOAD32_U_I64_S: case WebAssembly::ATOMIC_LOAD32_U_I64_S:
case WebAssembly::ATOMIC_STORE_I32: case WebAssembly::ATOMIC_STORE_I32:
case WebAssembly::ATOMIC_STORE_I32_S:
case WebAssembly::ATOMIC_STORE32_I64: case WebAssembly::ATOMIC_STORE32_I64:
case WebAssembly::ATOMIC_STORE32_I64_S:
return 2; return 2;
case WebAssembly::LOAD_I64: case WebAssembly::LOAD_I64:
case WebAssembly::LOAD_I64_S: case WebAssembly::LOAD_I64_S:
case WebAssembly::LOAD_F64: case WebAssembly::LOAD_F64:
case WebAssembly::LOAD_F64_S: case WebAssembly::LOAD_F64_S:
case WebAssembly::STORE_I64: case WebAssembly::STORE_I64:
case WebAssembly::STORE_I64_S: case WebAssembly::STORE_I64_S:
case WebAssembly::STORE_F64: case WebAssembly::STORE_F64:
case WebAssembly::STORE_F64_S: case WebAssembly::STORE_F64_S:
case WebAssembly::ATOMIC_LOAD_I64: case WebAssembly::ATOMIC_LOAD_I64:
case WebAssembly::ATOMIC_LOAD_I64_S: case WebAssembly::ATOMIC_LOAD_I64_S:
case WebAssembly::ATOMIC_STORE_I64: case WebAssembly::ATOMIC_STORE_I64:
case WebAssembly::ATOMIC_STORE_I64_S:
return 3; return 3;
default: default:
llvm_unreachable("Only loads and stores have p2align values"); llvm_unreachable("Only loads and stores have p2align values");
} }
} }
/// The operand number of the load or store address in load/store instructions. /// The operand number of the load or store address in load/store instructions.
static const unsigned LoadAddressOperandNo = 3; static const unsigned LoadAddressOperandNo = 3;
Show All 33 Lines

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
} }
std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) { std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
unsigned RegNo = MO.getReg(); unsigned RegNo = MO.getReg();
assert(TargetRegisterInfo::isVirtualRegister(RegNo) && assert(TargetRegisterInfo::isVirtualRegister(RegNo) &&
"Unlowered physical register encountered during assembly printing"); "Unlowered physical register encountered during assembly printing");
assert(!MFI->isVRegStackified(RegNo)); assert(!MFI->isVRegStackified(RegNo));
unsigned WAReg = MFI->getWAReg(RegNo); unsigned WAReg = MFI->getWAReg(RegNo);
assert(WAReg != WebAssemblyFunctionInfo::UnusedReg); if (WAReg == WebAssemblyFunctionInfo::UnusedReg) return "$reg";
return '$' + utostr(WAReg); return '$' + utostr(WAReg);
} }
WebAssemblyTargetStreamer *WebAssemblyAsmPrinter::getTargetStreamer() { WebAssemblyTargetStreamer *WebAssemblyAsmPrinter::getTargetStreamer() {
MCTargetStreamer *TS = OutStreamer->getTargetStreamer(); MCTargetStreamer *TS = OutStreamer->getTargetStreamer();
return static_cast<WebAssemblyTargetStreamer *>(TS); return static_cast<WebAssemblyTargetStreamer *>(TS);
} }
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Linesvoid WebAssemblyAsmPrinter::EmitFunctionBodyEnd() {
if (TM.getTargetTriple().isOSBinFormatELF()) if (TM.getTargetTriple().isOSBinFormatELF())
getTargetStreamer()->emitEndFunc(); getTargetStreamer()->emitEndFunc();
} }
void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n'); LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
switch (MI->getOpcode()) { switch (MI->getOpcode()) {
case WebAssembly::ARGUMENT_I32: case WebAssembly::ARGUMENT_I32_S:
case WebAssembly::ARGUMENT_I64: case WebAssembly::ARGUMENT_I64_S:
case WebAssembly::ARGUMENT_F32: case WebAssembly::ARGUMENT_F32_S:
case WebAssembly::ARGUMENT_F64: case WebAssembly::ARGUMENT_F64_S:
case WebAssembly::ARGUMENT_v16i8: case WebAssembly::ARGUMENT_v16i8_S:
case WebAssembly::ARGUMENT_v8i16: case WebAssembly::ARGUMENT_v8i16_S:
case WebAssembly::ARGUMENT_v4i32: case WebAssembly::ARGUMENT_v4i32_S:
case WebAssembly::ARGUMENT_v4f32: case WebAssembly::ARGUMENT_v4f32_S:
// These represent values which are live into the function entry, so there's // These represent values which are live into the function entry, so there's
// no instruction to emit. // no instruction to emit.
break; break;
case WebAssembly::FALLTHROUGH_RETURN_I32: case WebAssembly::FALLTHROUGH_RETURN_I32_S:
case WebAssembly::FALLTHROUGH_RETURN_I64: case WebAssembly::FALLTHROUGH_RETURN_I64_S:
case WebAssembly::FALLTHROUGH_RETURN_F32: case WebAssembly::FALLTHROUGH_RETURN_F32_S:
case WebAssembly::FALLTHROUGH_RETURN_F64: case WebAssembly::FALLTHROUGH_RETURN_F64_S:
case WebAssembly::FALLTHROUGH_RETURN_v16i8: case WebAssembly::FALLTHROUGH_RETURN_v16i8_S:
case WebAssembly::FALLTHROUGH_RETURN_v8i16: case WebAssembly::FALLTHROUGH_RETURN_v8i16_S:
case WebAssembly::FALLTHROUGH_RETURN_v4i32: case WebAssembly::FALLTHROUGH_RETURN_v4i32_S:
case WebAssembly::FALLTHROUGH_RETURN_v4f32: { case WebAssembly::FALLTHROUGH_RETURN_v4f32_S: {
// These instructions represent the implicit return at the end of a // These instructions represent the implicit return at the end of a
// function body. The operand is always a pop. // function body. Always pops one value off the stack.
assert(MFI->isVRegStackified(MI->getOperand(0).getReg()));
if (isVerbose()) { if (isVerbose()) {
OutStreamer->AddComment("fallthrough-return: $pop" + OutStreamer->AddComment("fallthrough-return-value");
Twine(MFI->getWARegStackId(
MFI->getWAReg(MI->getOperand(0).getReg()))));
OutStreamer->AddBlankLine(); OutStreamer->AddBlankLine();
} }
break; break;
} }
case WebAssembly::FALLTHROUGH_RETURN_VOID: case WebAssembly::FALLTHROUGH_RETURN_VOID_S:
// This instruction represents the implicit return at the end of a // This instruction represents the implicit return at the end of a
// function body with no return value. // function body with no return value.
if (isVerbose()) { if (isVerbose()) {
OutStreamer->AddComment("fallthrough-return"); OutStreamer->AddComment("fallthrough-return-void");
OutStreamer->AddBlankLine(); OutStreamer->AddBlankLine();
} }
break; break;
default: { default: {
WebAssemblyMCInstLower MCInstLowering(OutContext, *this); WebAssemblyMCInstLower MCInstLowering(OutContext, *this);
MCInst TmpInst; MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst); MCInstLowering.Lower(MI, TmpInst);
EmitToStreamer(*OutStreamer, TmpInst); EmitToStreamer(*OutStreamer, TmpInst);
Show All 24 Linesbool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI,
if (!ExtraCode) { if (!ExtraCode) {
const MachineOperand &MO = MI->getOperand(OpNo); const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) { switch (MO.getType()) {
case MachineOperand::MO_Immediate: case MachineOperand::MO_Immediate:
OS << MO.getImm(); OS << MO.getImm();
return false; return false;
case MachineOperand::MO_Register: case MachineOperand::MO_Register:
// FIXME: only opcode that still contains registers, as required by
// MachineInstr::getDebugVariable(). Ca
assert(MI->getOpcode() == WebAssembly::INLINEASM);
OS << regToString(MO); OS << regToString(MO);
return false; return false;
case MachineOperand::MO_GlobalAddress: case MachineOperand::MO_GlobalAddress:
getSymbol(MO.getGlobal())->print(OS, MAI); getSymbol(MO.getGlobal())->print(OS, MAI);
printOffset(MO.getOffset(), OS); printOffset(MO.getOffset(), OS);
return false; return false;
case MachineOperand::MO_ExternalSymbol: case MachineOperand::MO_ExternalSymbol:
GetExternalSymbolSymbol(MO.getSymbolName())->print(OS, MAI); GetExternalSymbolSymbol(MO.getSymbolName())->print(OS, MAI);
Show All 35 Lines

lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

Show All 25 Lines
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h" #include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h" #include "llvm/Support/raw_ostream.h"
using namespace llvm; using namespace llvm;
#define DEBUG_TYPE "wasm-explicit-locals" #define DEBUG_TYPE "wasm-explicit-locals"
// A command-line option to disable this pass. Note that this produces output
// which is not valid WebAssembly, though it may be more convenient for writing
// LLVM unit tests with.
static cl::opt<bool> DisableWebAssemblyExplicitLocals(
"disable-wasm-explicit-locals", cl::ReallyHidden,
cl::desc("WebAssembly: Disable emission of get_local/set_local."),
cl::init(false));
namespace { namespace {
class WebAssemblyExplicitLocals final : public MachineFunctionPass { class WebAssemblyExplicitLocals final : public MachineFunctionPass {
StringRef getPassName() const override { StringRef getPassName() const override {
return "WebAssembly Explicit Locals"; return "WebAssembly Explicit Locals";
} }
void getAnalysisUsage(AnalysisUsage &AU) const override { void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG(); AU.setPreservesCFG();
AU.addPreserved<MachineBlockFrequencyInfo>(); AU.addPreserved<MachineBlockFrequencyInfo>();
MachineFunctionPass::getAnalysisUsage(AU); MachineFunctionPass::getAnalysisUsage(AU);
} }
bool runOnMachineFunction(MachineFunction &MF) override; bool runOnMachineFunction(MachineFunction &MF) override;
public: public:
static char ID; // Pass identification, replacement for typeid static char ID; // Pass identification, replacement for typeid
WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {} WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {}
}; };
} // end anonymous namespace } // end anonymous namespace
unsigned regInstructionToStackInstruction(unsigned OpCode);
char WebAssemblyExplicitLocals::ID = 0; char WebAssemblyExplicitLocals::ID = 0;
INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE, INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE,
"Convert registers to WebAssembly locals", false, false) "Convert registers to WebAssembly locals", false, false)
FunctionPass *llvm::createWebAssemblyExplicitLocals() { FunctionPass *llvm::createWebAssemblyExplicitLocals() {
return new WebAssemblyExplicitLocals(); return new WebAssemblyExplicitLocals();
} }
▲ Show 20 Lines • Show All 87 Lines • ▼ Show 20 Lines if (RC == &WebAssembly::F64RegClass)
return MVT::f64; return MVT::f64;
if (RC == &WebAssembly::EXCEPT_REFRegClass) if (RC == &WebAssembly::EXCEPT_REFRegClass)
return MVT::ExceptRef; return MVT::ExceptRef;
llvm_unreachable("unrecognized register class"); llvm_unreachable("unrecognized register class");
} }
/// Given a MachineOperand of a stackified vreg, return the instruction at the /// Given a MachineOperand of a stackified vreg, return the instruction at the
/// start of the expression tree. /// start of the expression tree.
static MachineInstr *FindStartOfTree(MachineOperand &MO, static MachineInstr *findStartOfTree(MachineOperand &MO,
MachineRegisterInfo &MRI, MachineRegisterInfo &MRI,
WebAssemblyFunctionInfo &MFI) { WebAssemblyFunctionInfo &MFI) {
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
assert(MFI.isVRegStackified(Reg)); assert(MFI.isVRegStackified(Reg));
MachineInstr *Def = MRI.getVRegDef(Reg); MachineInstr *Def = MRI.getVRegDef(Reg);
// Find the first stackified use and proceed from there. // Find the first stackified use and proceed from there.
for (MachineOperand &DefMO : Def->explicit_uses()) { for (MachineOperand &DefMO : Def->explicit_uses()) {
if (!DefMO.isReg()) if (!DefMO.isReg())
continue; continue;
return FindStartOfTree(DefMO, MRI, MFI); return findStartOfTree(DefMO, MRI, MFI);
} }
// If there were no stackified uses, we've reached the start. // If there were no stackified uses, we've reached the start.
return Def; return Def;
} }
bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) { bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n" LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n"
"********** Function: " "********** Function: "
<< MF.getName() << '\n'); << MF.getName() << '\n');
// Disable this pass if directed to do so.
if (DisableWebAssemblyExplicitLocals)
return false;
// Disable this pass if we aren't doing direct wasm object emission.
if (MF.getSubtarget<WebAssemblySubtarget>()
.getTargetTriple().isOSBinFormatELF())
return false;
bool Changed = false; bool Changed = false;
MachineRegisterInfo &MRI = MF.getRegInfo(); MachineRegisterInfo &MRI = MF.getRegInfo();
WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>(); WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo(); const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
// Map non-stackified virtual registers to their local ids. // Map non-stackified virtual registers to their local ids.
DenseMap<unsigned, unsigned> Reg2Local; DenseMap<unsigned, unsigned> Reg2Local;
// Handle ARGUMENTS first to ensure that they get the designated numbers. // Handle ARGUMENTS first to ensure that they get the designated numbers.
for (MachineBasicBlock::iterator I = MF.begin()->begin(), for (MachineBasicBlock::iterator I = MF.begin()->begin(),
E = MF.begin()->end(); E = MF.begin()->end();
I != E;) { I != E;) {
MachineInstr &MI = *I++; MachineInstr &MI = *I++;
if (!WebAssembly::isArgument(MI)) if (!WebAssembly::isArgument(MI))
break; break;
unsigned Reg = MI.getOperand(0).getReg(); unsigned Reg = MI.getOperand(0).getReg();
assert(!MFI.isVRegStackified(Reg)); assert(!MFI.isVRegStackified(Reg));
Reg2Local[Reg] = MI.getOperand(1).getImm(); Reg2Local[Reg] = static_cast<unsigned>(MI.getOperand(1).getImm());
MI.eraseFromParent(); MI.eraseFromParent();
Changed = true; Changed = true;
} }
// Start assigning local numbers after the last parameter. // Start assigning local numbers after the last parameter.
unsigned CurLocal = MFI.getParams().size(); unsigned CurLocal = static_cast<unsigned>(MFI.getParams().size());
// Precompute the set of registers that are unused, so that we can insert // Precompute the set of registers that are unused, so that we can insert
// drops to their defs. // drops to their defs.
BitVector UseEmpty(MRI.getNumVirtRegs()); BitVector UseEmpty(MRI.getNumVirtRegs());
for (unsigned i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I)
UseEmpty[i] = MRI.use_empty(TargetRegisterInfo::index2VirtReg(i)); UseEmpty[I] = MRI.use_empty(TargetRegisterInfo::index2VirtReg(I));
// Visit each instruction in the function. // Visit each instruction in the function.
for (MachineBasicBlock &MBB : MF) { for (MachineBasicBlock &MBB : MF) {
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) { for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
MachineInstr &MI = *I++; MachineInstr &MI = *I++;
assert(!WebAssembly::isArgument(MI)); assert(!WebAssembly::isArgument(MI));
if (MI.isDebugInstr() || MI.isLabel()) if (MI.isDebugInstr() || MI.isLabel() || MI.isInlineAsm())
continue; continue;
// Replace tee instructions with tee_local. The difference is that tee // Replace tee instructions with tee_local. The difference is that tee
// instructins have two defs, while tee_local instructions have one def // instructins have two defs, while tee_local instructions have one def
// and an index of a local to write to. // and an index of a local to write to.
if (WebAssembly::isTee(MI)) { if (WebAssembly::isTee(MI)) {
assert(MFI.isVRegStackified(MI.getOperand(0).getReg())); assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
assert(!MFI.isVRegStackified(MI.getOperand(1).getReg())); assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
▲ Show 20 Lines • Show All 79 Lines • ▼ Show 20 Lines for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
MRI.removeRegOperandFromUseList(&MO); MRI.removeRegOperandFromUseList(&MO);
MO = MachineOperand::CreateImm(LocalId); MO = MachineOperand::CreateImm(LocalId);
continue; continue;
} }
// If we see a stackified register, prepare to insert subsequent // If we see a stackified register, prepare to insert subsequent
// get_locals before the start of its tree. // get_locals before the start of its tree.
if (MFI.isVRegStackified(OldReg)) { if (MFI.isVRegStackified(OldReg)) {
InsertPt = FindStartOfTree(MO, MRI, MFI); InsertPt = findStartOfTree(MO, MRI, MFI);
continue; continue;
} }
// Our contract with inline asm register operands is to provide local // Our contract with inline asm register operands is to provide local
// indices as immediates. // indices as immediates.
if (MI.getOpcode() == TargetOpcode::INLINEASM) { if (MI.getOpcode() == TargetOpcode::INLINEASM) {
unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
MRI.removeRegOperandFromUseList(&MO); MRI.removeRegOperandFromUseList(&MO);
Show All 17 Lines for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
// Coalesce and eliminate COPY instructions. // Coalesce and eliminate COPY instructions.
if (WebAssembly::isCopy(MI)) { if (WebAssembly::isCopy(MI)) {
MRI.replaceRegWith(MI.getOperand(1).getReg(), MRI.replaceRegWith(MI.getOperand(1).getReg(),
MI.getOperand(0).getReg()); MI.getOperand(0).getReg());
MI.eraseFromParent(); MI.eraseFromParent();
Changed = true; Changed = true;
} }
} }
// Remove all uses of stackified registers to bring the instruction format
// into its final stack form, and transition opcodes to their _S variant.
// We do this in a seperate loop, since the previous loop adds/removes
// instructions.
// See comments in lib/Target/WebAssembly/WebAssemblyInstrFormats.td for
// details.
// TODO: the code above creates new registers which are then removed here.
// That code could be slightly simplified by not doing that, though maybe
// it is simpler conceptually to keep the code above in "register mode"
// until this transition point.
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
MachineInstr &MI = *I++;
// FIXME: we are not processing inline assembly, which contains register
// operands, because it is used by later target generic code.
if (MI.isDebugInstr() || MI.isLabel() || MI.isInlineAsm())
continue;
auto RegOpcode = MI.getOpcode();
auto StackOpcode = regInstructionToStackInstruction(RegOpcode);
MI.setDesc(TII->get(StackOpcode));
// Now remove all register operands.
for (auto I = MI.getNumOperands(); I; --I) {
auto &MO = MI.getOperand(I - 1);
if (MO.isReg()) {
MI.RemoveOperand(I - 1);
// TODO: we should also update the MFI here or below to reflect the
// removed registers? The MFI is about to be deleted anyway, so maybe
// that is not worth it?
}
}
}
} }
// Define the locals. // Define the locals.
// TODO: Sort the locals for better compression. // TODO: Sort the locals for better compression.
MFI.setNumLocals(CurLocal - MFI.getParams().size()); MFI.setNumLocals(CurLocal - MFI.getParams().size());
for (size_t i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) { for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i); unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
auto I = Reg2Local.find(Reg); auto RL = Reg2Local.find(Reg);
if (I == Reg2Local.end() || I->second < MFI.getParams().size()) if (RL == Reg2Local.end() || RL->second < MFI.getParams().size())
continue; continue;
MFI.setLocal(I->second - MFI.getParams().size(), MFI.setLocal(RL->second - MFI.getParams().size(),
typeForRegClass(MRI.getRegClass(Reg))); typeForRegClass(MRI.getRegClass(Reg)));
Changed = true; Changed = true;
} }
#ifndef NDEBUG return Changed;
// Assert that all registers have been stackified at this point.
for (const MachineBasicBlock &MBB : MF) {
for (const MachineInstr &MI : MBB) {
if (MI.isDebugInstr() || MI.isLabel())
continue;
for (const MachineOperand &MO : MI.explicit_operands()) {
assert(
(!MO.isReg() || MRI.use_empty(MO.getReg()) ||
MFI.isVRegStackified(MO.getReg())) &&
"WebAssemblyExplicitLocals failed to stackify a register operand");
}
}
} }
#endif
return Changed; unsigned regInstructionToStackInstruction(unsigned OpCode) {
switch (OpCode) {
default:
// You may hit this if you add new instructions, please add them below.
// For most of these opcodes, this function could have been implemented
// as "return OpCode + 1", but since table-gen alphabetically sorts them,
// this cannot be guaranteed (see e.g. BR and BR_IF).
// The approach below is the same as what the x87 backend does.
// TODO(wvo): to make this code cleaner, create a custom tablegen
// code generator that emits the table below automatically.
llvm_unreachable(
"unknown WebAssembly instruction in Explicit Locals pass");
case WebAssembly::ABS_F32: return WebAssembly::ABS_F32_S;
case WebAssembly::ABS_F64: return WebAssembly::ABS_F64_S;
case WebAssembly::ADD_F32: return WebAssembly::ADD_F32_S;
case WebAssembly::ADD_F32x4: return WebAssembly::ADD_F32x4_S;
case WebAssembly::ADD_F64: return WebAssembly::ADD_F64_S;
case WebAssembly::ADD_I16x8: return WebAssembly::ADD_I16x8_S;
case WebAssembly::ADD_I32: return WebAssembly::ADD_I32_S;
case WebAssembly::ADD_I32x4: return WebAssembly::ADD_I32x4_S;
case WebAssembly::ADD_I64: return WebAssembly::ADD_I64_S;
case WebAssembly::ADD_I8x16: return WebAssembly::ADD_I8x16_S;
case WebAssembly::ADJCALLSTACKDOWN: return WebAssembly::ADJCALLSTACKDOWN_S;
case WebAssembly::ADJCALLSTACKUP: return WebAssembly::ADJCALLSTACKUP_S;
case WebAssembly::AND_I32: return WebAssembly::AND_I32_S;
case WebAssembly::AND_I64: return WebAssembly::AND_I64_S;
case WebAssembly::ARGUMENT_EXCEPT_REF: return WebAssembly::ARGUMENT_EXCEPT_REF_S;
case WebAssembly::ARGUMENT_F32: return WebAssembly::ARGUMENT_F32_S;
case WebAssembly::ARGUMENT_F64: return WebAssembly::ARGUMENT_F64_S;
case WebAssembly::ARGUMENT_I32: return WebAssembly::ARGUMENT_I32_S;
case WebAssembly::ARGUMENT_I64: return WebAssembly::ARGUMENT_I64_S;
case WebAssembly::ARGUMENT_v16i8: return WebAssembly::ARGUMENT_v16i8_S;
case WebAssembly::ARGUMENT_v4f32: return WebAssembly::ARGUMENT_v4f32_S;
case WebAssembly::ARGUMENT_v4i32: return WebAssembly::ARGUMENT_v4i32_S;
case WebAssembly::ARGUMENT_v8i16: return WebAssembly::ARGUMENT_v8i16_S;
case WebAssembly::ATOMIC_LOAD16_U_I32: return WebAssembly::ATOMIC_LOAD16_U_I32_S;
case WebAssembly::ATOMIC_LOAD16_U_I64: return WebAssembly::ATOMIC_LOAD16_U_I64_S;
case WebAssembly::ATOMIC_LOAD32_U_I64: return WebAssembly::ATOMIC_LOAD32_U_I64_S;
case WebAssembly::ATOMIC_LOAD8_U_I32: return WebAssembly::ATOMIC_LOAD8_U_I32_S;
case WebAssembly::ATOMIC_LOAD8_U_I64: return WebAssembly::ATOMIC_LOAD8_U_I64_S;
case WebAssembly::ATOMIC_LOAD_I32: return WebAssembly::ATOMIC_LOAD_I32_S;
case WebAssembly::ATOMIC_LOAD_I64: return WebAssembly::ATOMIC_LOAD_I64_S;
case WebAssembly::ATOMIC_STORE16_I32: return WebAssembly::ATOMIC_STORE16_I32_S;
case WebAssembly::ATOMIC_STORE16_I64: return WebAssembly::ATOMIC_STORE16_I64_S;
case WebAssembly::ATOMIC_STORE32_I64: return WebAssembly::ATOMIC_STORE32_I64_S;
case WebAssembly::ATOMIC_STORE8_I32: return WebAssembly::ATOMIC_STORE8_I32_S;
case WebAssembly::ATOMIC_STORE8_I64: return WebAssembly::ATOMIC_STORE8_I64_S;
case WebAssembly::ATOMIC_STORE_I32: return WebAssembly::ATOMIC_STORE_I32_S;
case WebAssembly::ATOMIC_STORE_I64: return WebAssembly::ATOMIC_STORE_I64_S;
case WebAssembly::BLOCK: return WebAssembly::BLOCK_S;
case WebAssembly::BR: return WebAssembly::BR_S;
case WebAssembly::BR_IF: return WebAssembly::BR_IF_S;
case WebAssembly::BR_TABLE_I32: return WebAssembly::BR_TABLE_I32_S;
case WebAssembly::BR_TABLE_I64: return WebAssembly::BR_TABLE_I64_S;
case WebAssembly::BR_UNLESS: return WebAssembly::BR_UNLESS_S;
case WebAssembly::CALL_EXCEPT_REF: return WebAssembly::CALL_EXCEPT_REF_S;
case WebAssembly::CALL_F32: return WebAssembly::CALL_F32_S;
case WebAssembly::CALL_F64: return WebAssembly::CALL_F64_S;
case WebAssembly::CALL_I32: return WebAssembly::CALL_I32_S;
case WebAssembly::CALL_I64: return WebAssembly::CALL_I64_S;
case WebAssembly::CALL_INDIRECT_EXCEPT_REF: return WebAssembly::CALL_INDIRECT_EXCEPT_REF_S;
case WebAssembly::CALL_INDIRECT_F32: return WebAssembly::CALL_INDIRECT_F32_S;
case WebAssembly::CALL_INDIRECT_F64: return WebAssembly::CALL_INDIRECT_F64_S;
case WebAssembly::CALL_INDIRECT_I32: return WebAssembly::CALL_INDIRECT_I32_S;
case WebAssembly::CALL_INDIRECT_I64: return WebAssembly::CALL_INDIRECT_I64_S;
case WebAssembly::CALL_INDIRECT_VOID: return WebAssembly::CALL_INDIRECT_VOID_S;
case WebAssembly::CALL_INDIRECT_v16i8: return WebAssembly::CALL_INDIRECT_v16i8_S;
case WebAssembly::CALL_INDIRECT_v4f32: return WebAssembly::CALL_INDIRECT_v4f32_S;
case WebAssembly::CALL_INDIRECT_v4i32: return WebAssembly::CALL_INDIRECT_v4i32_S;
case WebAssembly::CALL_INDIRECT_v8i16: return WebAssembly::CALL_INDIRECT_v8i16_S;
case WebAssembly::CALL_VOID: return WebAssembly::CALL_VOID_S;
case WebAssembly::CALL_v16i8: return WebAssembly::CALL_v16i8_S;
case WebAssembly::CALL_v4f32: return WebAssembly::CALL_v4f32_S;
case WebAssembly::CALL_v4i32: return WebAssembly::CALL_v4i32_S;
case WebAssembly::CALL_v8i16: return WebAssembly::CALL_v8i16_S;
case WebAssembly::CATCHRET: return WebAssembly::CATCHRET_S;
case WebAssembly::CATCH_ALL: return WebAssembly::CATCH_ALL_S;
case WebAssembly::CATCH_I32: return WebAssembly::CATCH_I32_S;
case WebAssembly::CATCH_I64: return WebAssembly::CATCH_I64_S;
case WebAssembly::CEIL_F32: return WebAssembly::CEIL_F32_S;
case WebAssembly::CEIL_F64: return WebAssembly::CEIL_F64_S;
case WebAssembly::CLEANUPRET: return WebAssembly::CLEANUPRET_S;
case WebAssembly::CLZ_I32: return WebAssembly::CLZ_I32_S;
case WebAssembly::CLZ_I64: return WebAssembly::CLZ_I64_S;
case WebAssembly::CONST_F32: return WebAssembly::CONST_F32_S;
case WebAssembly::CONST_F64: return WebAssembly::CONST_F64_S;
case WebAssembly::CONST_I32: return WebAssembly::CONST_I32_S;
case WebAssembly::CONST_I64: return WebAssembly::CONST_I64_S;
case WebAssembly::COPYSIGN_F32: return WebAssembly::COPYSIGN_F32_S;
case WebAssembly::COPYSIGN_F64: return WebAssembly::COPYSIGN_F64_S;
case WebAssembly::COPY_EXCEPT_REF: return WebAssembly::COPY_EXCEPT_REF_S;
case WebAssembly::COPY_F32: return WebAssembly::COPY_F32_S;
case WebAssembly::COPY_F64: return WebAssembly::COPY_F64_S;
case WebAssembly::COPY_I32: return WebAssembly::COPY_I32_S;
case WebAssembly::COPY_I64: return WebAssembly::COPY_I64_S;
case WebAssembly::COPY_V128: return WebAssembly::COPY_V128_S;
case WebAssembly::CTZ_I32: return WebAssembly::CTZ_I32_S;
case WebAssembly::CTZ_I64: return WebAssembly::CTZ_I64_S;
case WebAssembly::CURRENT_MEMORY_I32: return WebAssembly::CURRENT_MEMORY_I32_S;
case WebAssembly::DIV_F32: return WebAssembly::DIV_F32_S;
case WebAssembly::DIV_F64: return WebAssembly::DIV_F64_S;
case WebAssembly::DIV_S_I32: return WebAssembly::DIV_S_I32_S;
case WebAssembly::DIV_S_I64: return WebAssembly::DIV_S_I64_S;
case WebAssembly::DIV_U_I32: return WebAssembly::DIV_U_I32_S;
case WebAssembly::DIV_U_I64: return WebAssembly::DIV_U_I64_S;
case WebAssembly::DROP_EXCEPT_REF: return WebAssembly::DROP_EXCEPT_REF_S;
case WebAssembly::DROP_F32: return WebAssembly::DROP_F32_S;
case WebAssembly::DROP_F64: return WebAssembly::DROP_F64_S;
case WebAssembly::DROP_I32: return WebAssembly::DROP_I32_S;
case WebAssembly::DROP_I64: return WebAssembly::DROP_I64_S;
case WebAssembly::DROP_V128: return WebAssembly::DROP_V128_S;
case WebAssembly::END_BLOCK: return WebAssembly::END_BLOCK_S;
case WebAssembly::END_FUNCTION: return WebAssembly::END_FUNCTION_S;
case WebAssembly::END_LOOP: return WebAssembly::END_LOOP_S;
case WebAssembly::END_TRY: return WebAssembly::END_TRY_S;
case WebAssembly::EQZ_I32: return WebAssembly::EQZ_I32_S;
case WebAssembly::EQZ_I64: return WebAssembly::EQZ_I64_S;
case WebAssembly::EQ_F32: return WebAssembly::EQ_F32_S;
case WebAssembly::EQ_F64: return WebAssembly::EQ_F64_S;
case WebAssembly::EQ_I32: return WebAssembly::EQ_I32_S;
case WebAssembly::EQ_I64: return WebAssembly::EQ_I64_S;
case WebAssembly::F32_CONVERT_S_I32: return WebAssembly::F32_CONVERT_S_I32_S;
case WebAssembly::F32_CONVERT_S_I64: return WebAssembly::F32_CONVERT_S_I64_S;
case WebAssembly::F32_CONVERT_U_I32: return WebAssembly::F32_CONVERT_U_I32_S;
case WebAssembly::F32_CONVERT_U_I64: return WebAssembly::F32_CONVERT_U_I64_S;
case WebAssembly::F32_DEMOTE_F64: return WebAssembly::F32_DEMOTE_F64_S;
case WebAssembly::F32_REINTERPRET_I32: return WebAssembly::F32_REINTERPRET_I32_S;
case WebAssembly::F64_CONVERT_S_I32: return WebAssembly::F64_CONVERT_S_I32_S;
case WebAssembly::F64_CONVERT_S_I64: return WebAssembly::F64_CONVERT_S_I64_S;
case WebAssembly::F64_CONVERT_U_I32: return WebAssembly::F64_CONVERT_U_I32_S;
case WebAssembly::F64_CONVERT_U_I64: return WebAssembly::F64_CONVERT_U_I64_S;
case WebAssembly::F64_PROMOTE_F32: return WebAssembly::F64_PROMOTE_F32_S;
case WebAssembly::F64_REINTERPRET_I64: return WebAssembly::F64_REINTERPRET_I64_S;
case WebAssembly::FALLTHROUGH_RETURN_EXCEPT_REF: return WebAssembly::FALLTHROUGH_RETURN_EXCEPT_REF_S;
case WebAssembly::FALLTHROUGH_RETURN_F32: return WebAssembly::FALLTHROUGH_RETURN_F32_S;
case WebAssembly::FALLTHROUGH_RETURN_F64: return WebAssembly::FALLTHROUGH_RETURN_F64_S;
case WebAssembly::FALLTHROUGH_RETURN_I32: return WebAssembly::FALLTHROUGH_RETURN_I32_S;
case WebAssembly::FALLTHROUGH_RETURN_I64: return WebAssembly::FALLTHROUGH_RETURN_I64_S;
case WebAssembly::FALLTHROUGH_RETURN_VOID: return WebAssembly::FALLTHROUGH_RETURN_VOID_S;
case WebAssembly::FALLTHROUGH_RETURN_v16i8: return WebAssembly::FALLTHROUGH_RETURN_v16i8_S;
case WebAssembly::FALLTHROUGH_RETURN_v4f32: return WebAssembly::FALLTHROUGH_RETURN_v4f32_S;
case WebAssembly::FALLTHROUGH_RETURN_v4i32: return WebAssembly::FALLTHROUGH_RETURN_v4i32_S;
case WebAssembly::FALLTHROUGH_RETURN_v8i16: return WebAssembly::FALLTHROUGH_RETURN_v8i16_S;
case WebAssembly::FLOOR_F32: return WebAssembly::FLOOR_F32_S;
case WebAssembly::FLOOR_F64: return WebAssembly::FLOOR_F64_S;
case WebAssembly::FP_TO_SINT_I32_F32: return WebAssembly::FP_TO_SINT_I32_F32_S;
case WebAssembly::FP_TO_SINT_I32_F64: return WebAssembly::FP_TO_SINT_I32_F64_S;
case WebAssembly::FP_TO_SINT_I64_F32: return WebAssembly::FP_TO_SINT_I64_F32_S;
case WebAssembly::FP_TO_SINT_I64_F64: return WebAssembly::FP_TO_SINT_I64_F64_S;
case WebAssembly::FP_TO_UINT_I32_F32: return WebAssembly::FP_TO_UINT_I32_F32_S;
case WebAssembly::FP_TO_UINT_I32_F64: return WebAssembly::FP_TO_UINT_I32_F64_S;
case WebAssembly::FP_TO_UINT_I64_F32: return WebAssembly::FP_TO_UINT_I64_F32_S;
case WebAssembly::FP_TO_UINT_I64_F64: return WebAssembly::FP_TO_UINT_I64_F64_S;
case WebAssembly::GET_GLOBAL_EXCEPT_REF: return WebAssembly::GET_GLOBAL_EXCEPT_REF_S;
case WebAssembly::GET_GLOBAL_F32: return WebAssembly::GET_GLOBAL_F32_S;
case WebAssembly::GET_GLOBAL_F64: return WebAssembly::GET_GLOBAL_F64_S;
case WebAssembly::GET_GLOBAL_I32: return WebAssembly::GET_GLOBAL_I32_S;
case WebAssembly::GET_GLOBAL_I64: return WebAssembly::GET_GLOBAL_I64_S;
case WebAssembly::GET_GLOBAL_V128: return WebAssembly::GET_GLOBAL_V128_S;
case WebAssembly::GET_LOCAL_EXCEPT_REF: return WebAssembly::GET_LOCAL_EXCEPT_REF_S;
case WebAssembly::GET_LOCAL_F32: return WebAssembly::GET_LOCAL_F32_S;
case WebAssembly::GET_LOCAL_F64: return WebAssembly::GET_LOCAL_F64_S;
case WebAssembly::GET_LOCAL_I32: return WebAssembly::GET_LOCAL_I32_S;
case WebAssembly::GET_LOCAL_I64: return WebAssembly::GET_LOCAL_I64_S;
case WebAssembly::GET_LOCAL_V128: return WebAssembly::GET_LOCAL_V128_S;
case WebAssembly::GE_F32: return WebAssembly::GE_F32_S;
case WebAssembly::GE_F64: return WebAssembly::GE_F64_S;
case WebAssembly::GE_S_I32: return WebAssembly::GE_S_I32_S;
case WebAssembly::GE_S_I64: return WebAssembly::GE_S_I64_S;
case WebAssembly::GE_U_I32: return WebAssembly::GE_U_I32_S;
case WebAssembly::GE_U_I64: return WebAssembly::GE_U_I64_S;
case WebAssembly::GROW_MEMORY_I32: return WebAssembly::GROW_MEMORY_I32_S;
case WebAssembly::GT_F32: return WebAssembly::GT_F32_S;
case WebAssembly::GT_F64: return WebAssembly::GT_F64_S;
case WebAssembly::GT_S_I32: return WebAssembly::GT_S_I32_S;
case WebAssembly::GT_S_I64: return WebAssembly::GT_S_I64_S;
case WebAssembly::GT_U_I32: return WebAssembly::GT_U_I32_S;
case WebAssembly::GT_U_I64: return WebAssembly::GT_U_I64_S;
case WebAssembly::I32_EXTEND16_S_I32: return WebAssembly::I32_EXTEND16_S_I32_S;
case WebAssembly::I32_EXTEND8_S_I32: return WebAssembly::I32_EXTEND8_S_I32_S;
case WebAssembly::I32_REINTERPRET_F32: return WebAssembly::I32_REINTERPRET_F32_S;
case WebAssembly::I32_TRUNC_S_F32: return WebAssembly::I32_TRUNC_S_F32_S;
case WebAssembly::I32_TRUNC_S_F64: return WebAssembly::I32_TRUNC_S_F64_S;
case WebAssembly::I32_TRUNC_S_SAT_F32: return WebAssembly::I32_TRUNC_S_SAT_F32_S;
case WebAssembly::I32_TRUNC_S_SAT_F64: return WebAssembly::I32_TRUNC_S_SAT_F64_S;
case WebAssembly::I32_TRUNC_U_F32: return WebAssembly::I32_TRUNC_U_F32_S;
case WebAssembly::I32_TRUNC_U_F64: return WebAssembly::I32_TRUNC_U_F64_S;
case WebAssembly::I32_TRUNC_U_SAT_F32: return WebAssembly::I32_TRUNC_U_SAT_F32_S;
case WebAssembly::I32_TRUNC_U_SAT_F64: return WebAssembly::I32_TRUNC_U_SAT_F64_S;
case WebAssembly::I32_WRAP_I64: return WebAssembly::I32_WRAP_I64_S;
case WebAssembly::I64_EXTEND16_S_I64: return WebAssembly::I64_EXTEND16_S_I64_S;
case WebAssembly::I64_EXTEND32_S_I64: return WebAssembly::I64_EXTEND32_S_I64_S;
case WebAssembly::I64_EXTEND8_S_I64: return WebAssembly::I64_EXTEND8_S_I64_S;
case WebAssembly::I64_EXTEND_S_I32: return WebAssembly::I64_EXTEND_S_I32_S;
case WebAssembly::I64_EXTEND_U_I32: return WebAssembly::I64_EXTEND_U_I32_S;
case WebAssembly::I64_REINTERPRET_F64: return WebAssembly::I64_REINTERPRET_F64_S;
case WebAssembly::I64_TRUNC_S_F32: return WebAssembly::I64_TRUNC_S_F32_S;
case WebAssembly::I64_TRUNC_S_F64: return WebAssembly::I64_TRUNC_S_F64_S;
case WebAssembly::I64_TRUNC_S_SAT_F32: return WebAssembly::I64_TRUNC_S_SAT_F32_S;
case WebAssembly::I64_TRUNC_S_SAT_F64: return WebAssembly::I64_TRUNC_S_SAT_F64_S;
case WebAssembly::I64_TRUNC_U_F32: return WebAssembly::I64_TRUNC_U_F32_S;
case WebAssembly::I64_TRUNC_U_F64: return WebAssembly::I64_TRUNC_U_F64_S;
case WebAssembly::I64_TRUNC_U_SAT_F32: return WebAssembly::I64_TRUNC_U_SAT_F32_S;
case WebAssembly::I64_TRUNC_U_SAT_F64: return WebAssembly::I64_TRUNC_U_SAT_F64_S;
case WebAssembly::LE_F32: return WebAssembly::LE_F32_S;
case WebAssembly::LE_F64: return WebAssembly::LE_F64_S;
case WebAssembly::LE_S_I32: return WebAssembly::LE_S_I32_S;
case WebAssembly::LE_S_I64: return WebAssembly::LE_S_I64_S;
case WebAssembly::LE_U_I32: return WebAssembly::LE_U_I32_S;
case WebAssembly::LE_U_I64: return WebAssembly::LE_U_I64_S;
case WebAssembly::LOAD16_S_I32: return WebAssembly::LOAD16_S_I32_S;
case WebAssembly::LOAD16_S_I64: return WebAssembly::LOAD16_S_I64_S;
case WebAssembly::LOAD16_U_I32: return WebAssembly::LOAD16_U_I32_S;
case WebAssembly::LOAD16_U_I64: return WebAssembly::LOAD16_U_I64_S;
case WebAssembly::LOAD32_S_I64: return WebAssembly::LOAD32_S_I64_S;
case WebAssembly::LOAD32_U_I64: return WebAssembly::LOAD32_U_I64_S;
case WebAssembly::LOAD8_S_I32: return WebAssembly::LOAD8_S_I32_S;
case WebAssembly::LOAD8_S_I64: return WebAssembly::LOAD8_S_I64_S;
case WebAssembly::LOAD8_U_I32: return WebAssembly::LOAD8_U_I32_S;
case WebAssembly::LOAD8_U_I64: return WebAssembly::LOAD8_U_I64_S;
case WebAssembly::LOAD_F32: return WebAssembly::LOAD_F32_S;
case WebAssembly::LOAD_F64: return WebAssembly::LOAD_F64_S;
case WebAssembly::LOAD_I32: return WebAssembly::LOAD_I32_S;
case WebAssembly::LOAD_I64: return WebAssembly::LOAD_I64_S;
case WebAssembly::LOOP: return WebAssembly::LOOP_S;
case WebAssembly::LT_F32: return WebAssembly::LT_F32_S;
case WebAssembly::LT_F64: return WebAssembly::LT_F64_S;
case WebAssembly::LT_S_I32: return WebAssembly::LT_S_I32_S;
case WebAssembly::LT_S_I64: return WebAssembly::LT_S_I64_S;
case WebAssembly::LT_U_I32: return WebAssembly::LT_U_I32_S;
case WebAssembly::LT_U_I64: return WebAssembly::LT_U_I64_S;
case WebAssembly::MAX_F32: return WebAssembly::MAX_F32_S;
case WebAssembly::MAX_F64: return WebAssembly::MAX_F64_S;
case WebAssembly::MEMORY_GROW_I32: return WebAssembly::MEMORY_GROW_I32_S;
case WebAssembly::MEMORY_SIZE_I32: return WebAssembly::MEMORY_SIZE_I32_S;
case WebAssembly::MEM_GROW_I32: return WebAssembly::MEM_GROW_I32_S;
case WebAssembly::MEM_SIZE_I32: return WebAssembly::MEM_SIZE_I32_S;
case WebAssembly::MIN_F32: return WebAssembly::MIN_F32_S;
case WebAssembly::MIN_F64: return WebAssembly::MIN_F64_S;
case WebAssembly::MUL_F32: return WebAssembly::MUL_F32_S;
case WebAssembly::MUL_F32x4: return WebAssembly::MUL_F32x4_S;
case WebAssembly::MUL_F64: return WebAssembly::MUL_F64_S;
case WebAssembly::MUL_I16x8: return WebAssembly::MUL_I16x8_S;
case WebAssembly::MUL_I32: return WebAssembly::MUL_I32_S;
case WebAssembly::MUL_I32x4: return WebAssembly::MUL_I32x4_S;
case WebAssembly::MUL_I64: return WebAssembly::MUL_I64_S;
case WebAssembly::MUL_I8x16: return WebAssembly::MUL_I8x16_S;
case WebAssembly::NEAREST_F32: return WebAssembly::NEAREST_F32_S;
case WebAssembly::NEAREST_F64: return WebAssembly::NEAREST_F64_S;
case WebAssembly::NEG_F32: return WebAssembly::NEG_F32_S;
case WebAssembly::NEG_F64: return WebAssembly::NEG_F64_S;
case WebAssembly::NE_F32: return WebAssembly::NE_F32_S;
case WebAssembly::NE_F64: return WebAssembly::NE_F64_S;
case WebAssembly::NE_I32: return WebAssembly::NE_I32_S;
case WebAssembly::NE_I64: return WebAssembly::NE_I64_S;
case WebAssembly::NOP: return WebAssembly::NOP_S;
case WebAssembly::OR_I32: return WebAssembly::OR_I32_S;
case WebAssembly::OR_I64: return WebAssembly::OR_I64_S;
case WebAssembly::PCALL_INDIRECT_EXCEPT_REF: return WebAssembly::PCALL_INDIRECT_EXCEPT_REF_S;
case WebAssembly::PCALL_INDIRECT_F32: return WebAssembly::PCALL_INDIRECT_F32_S;
case WebAssembly::PCALL_INDIRECT_F64: return WebAssembly::PCALL_INDIRECT_F64_S;
case WebAssembly::PCALL_INDIRECT_I32: return WebAssembly::PCALL_INDIRECT_I32_S;
case WebAssembly::PCALL_INDIRECT_I64: return WebAssembly::PCALL_INDIRECT_I64_S;
case WebAssembly::PCALL_INDIRECT_VOID: return WebAssembly::PCALL_INDIRECT_VOID_S;
case WebAssembly::PCALL_INDIRECT_v16i8: return WebAssembly::PCALL_INDIRECT_v16i8_S;
case WebAssembly::PCALL_INDIRECT_v4f32: return WebAssembly::PCALL_INDIRECT_v4f32_S;
case WebAssembly::PCALL_INDIRECT_v4i32: return WebAssembly::PCALL_INDIRECT_v4i32_S;
case WebAssembly::PCALL_INDIRECT_v8i16: return WebAssembly::PCALL_INDIRECT_v8i16_S;
case WebAssembly::POPCNT_I32: return WebAssembly::POPCNT_I32_S;
case WebAssembly::POPCNT_I64: return WebAssembly::POPCNT_I64_S;
case WebAssembly::REM_S_I32: return WebAssembly::REM_S_I32_S;
case WebAssembly::REM_S_I64: return WebAssembly::REM_S_I64_S;
case WebAssembly::REM_U_I32: return WebAssembly::REM_U_I32_S;
case WebAssembly::REM_U_I64: return WebAssembly::REM_U_I64_S;
case WebAssembly::RETHROW: return WebAssembly::RETHROW_S;
case WebAssembly::RETHROW_TO_CALLER: return WebAssembly::RETHROW_TO_CALLER_S;
case WebAssembly::RETURN_EXCEPT_REF: return WebAssembly::RETURN_EXCEPT_REF_S;
case WebAssembly::RETURN_F32: return WebAssembly::RETURN_F32_S;
case WebAssembly::RETURN_F64: return WebAssembly::RETURN_F64_S;
case WebAssembly::RETURN_I32: return WebAssembly::RETURN_I32_S;
case WebAssembly::RETURN_I64: return WebAssembly::RETURN_I64_S;
case WebAssembly::RETURN_VOID: return WebAssembly::RETURN_VOID_S;
case WebAssembly::RETURN_v16i8: return WebAssembly::RETURN_v16i8_S;
case WebAssembly::RETURN_v4f32: return WebAssembly::RETURN_v4f32_S;
case WebAssembly::RETURN_v4i32: return WebAssembly::RETURN_v4i32_S;
case WebAssembly::RETURN_v8i16: return WebAssembly::RETURN_v8i16_S;
case WebAssembly::ROTL_I32: return WebAssembly::ROTL_I32_S;
case WebAssembly::ROTL_I64: return WebAssembly::ROTL_I64_S;
case WebAssembly::ROTR_I32: return WebAssembly::ROTR_I32_S;
case WebAssembly::ROTR_I64: return WebAssembly::ROTR_I64_S;
case WebAssembly::SELECT_EXCEPT_REF: return WebAssembly::SELECT_EXCEPT_REF_S;
case WebAssembly::SELECT_F32: return WebAssembly::SELECT_F32_S;
case WebAssembly::SELECT_F64: return WebAssembly::SELECT_F64_S;
case WebAssembly::SELECT_I32: return WebAssembly::SELECT_I32_S;
case WebAssembly::SELECT_I64: return WebAssembly::SELECT_I64_S;
case WebAssembly::SET_GLOBAL_EXCEPT_REF: return WebAssembly::SET_GLOBAL_EXCEPT_REF_S;
case WebAssembly::SET_GLOBAL_F32: return WebAssembly::SET_GLOBAL_F32_S;
case WebAssembly::SET_GLOBAL_F64: return WebAssembly::SET_GLOBAL_F64_S;
case WebAssembly::SET_GLOBAL_I32: return WebAssembly::SET_GLOBAL_I32_S;
case WebAssembly::SET_GLOBAL_I64: return WebAssembly::SET_GLOBAL_I64_S;
case WebAssembly::SET_GLOBAL_V128: return WebAssembly::SET_GLOBAL_V128_S;
case WebAssembly::SET_LOCAL_EXCEPT_REF: return WebAssembly::SET_LOCAL_EXCEPT_REF_S;
case WebAssembly::SET_LOCAL_F32: return WebAssembly::SET_LOCAL_F32_S;
case WebAssembly::SET_LOCAL_F64: return WebAssembly::SET_LOCAL_F64_S;
case WebAssembly::SET_LOCAL_I32: return WebAssembly::SET_LOCAL_I32_S;
case WebAssembly::SET_LOCAL_I64: return WebAssembly::SET_LOCAL_I64_S;
case WebAssembly::SET_LOCAL_V128: return WebAssembly::SET_LOCAL_V128_S;
case WebAssembly::SHL_I32: return WebAssembly::SHL_I32_S;
case WebAssembly::SHL_I64: return WebAssembly::SHL_I64_S;
case WebAssembly::SHR_S_I32: return WebAssembly::SHR_S_I32_S;
case WebAssembly::SHR_S_I64: return WebAssembly::SHR_S_I64_S;
case WebAssembly::SHR_U_I32: return WebAssembly::SHR_U_I32_S;
case WebAssembly::SHR_U_I64: return WebAssembly::SHR_U_I64_S;
case WebAssembly::SQRT_F32: return WebAssembly::SQRT_F32_S;
case WebAssembly::SQRT_F64: return WebAssembly::SQRT_F64_S;
case WebAssembly::STORE16_I32: return WebAssembly::STORE16_I32_S;
case WebAssembly::STORE16_I64: return WebAssembly::STORE16_I64_S;
case WebAssembly::STORE32_I64: return WebAssembly::STORE32_I64_S;
case WebAssembly::STORE8_I32: return WebAssembly::STORE8_I32_S;
case WebAssembly::STORE8_I64: return WebAssembly::STORE8_I64_S;
case WebAssembly::STORE_F32: return WebAssembly::STORE_F32_S;
case WebAssembly::STORE_F64: return WebAssembly::STORE_F64_S;
case WebAssembly::STORE_I32: return WebAssembly::STORE_I32_S;
case WebAssembly::STORE_I64: return WebAssembly::STORE_I64_S;
case WebAssembly::SUB_F32: return WebAssembly::SUB_F32_S;
case WebAssembly::SUB_F32x4: return WebAssembly::SUB_F32x4_S;
case WebAssembly::SUB_F64: return WebAssembly::SUB_F64_S;
case WebAssembly::SUB_I16x8: return WebAssembly::SUB_I16x8_S;
case WebAssembly::SUB_I32: return WebAssembly::SUB_I32_S;
case WebAssembly::SUB_I32x4: return WebAssembly::SUB_I32x4_S;
case WebAssembly::SUB_I64: return WebAssembly::SUB_I64_S;
case WebAssembly::SUB_I8x16: return WebAssembly::SUB_I8x16_S;
case WebAssembly::TEE_EXCEPT_REF: return WebAssembly::TEE_EXCEPT_REF_S;
case WebAssembly::TEE_F32: return WebAssembly::TEE_F32_S;
case WebAssembly::TEE_F64: return WebAssembly::TEE_F64_S;
case WebAssembly::TEE_I32: return WebAssembly::TEE_I32_S;
case WebAssembly::TEE_I64: return WebAssembly::TEE_I64_S;
case WebAssembly::TEE_LOCAL_EXCEPT_REF: return WebAssembly::TEE_LOCAL_EXCEPT_REF_S;
case WebAssembly::TEE_LOCAL_F32: return WebAssembly::TEE_LOCAL_F32_S;
case WebAssembly::TEE_LOCAL_F64: return WebAssembly::TEE_LOCAL_F64_S;
case WebAssembly::TEE_LOCAL_I32: return WebAssembly::TEE_LOCAL_I32_S;
case WebAssembly::TEE_LOCAL_I64: return WebAssembly::TEE_LOCAL_I64_S;
case WebAssembly::TEE_LOCAL_V128: return WebAssembly::TEE_LOCAL_V128_S;
case WebAssembly::TEE_V128: return WebAssembly::TEE_V128_S;
case WebAssembly::THROW_I32: return WebAssembly::THROW_I32_S;
case WebAssembly::THROW_I64: return WebAssembly::THROW_I64_S;
case WebAssembly::TRUNC_F32: return WebAssembly::TRUNC_F32_S;
case WebAssembly::TRUNC_F64: return WebAssembly::TRUNC_F64_S;
case WebAssembly::TRY: return WebAssembly::TRY_S;
case WebAssembly::UNREACHABLE: return WebAssembly::UNREACHABLE_S;
case WebAssembly::XOR_I32: return WebAssembly::XOR_I32_S;
case WebAssembly::XOR_I64: return WebAssembly::XOR_I64_S;
}
} }

lib/Target/WebAssembly/WebAssemblyInstrMemory.td

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
// We don't need a regPlusES because external symbols never have constant // We don't need a regPlusES because external symbols never have constant
// offsets folded into them, so we can just use add. // offsets folded into them, so we can just use add.
let Defs = [ARGUMENTS] in { let Defs = [ARGUMENTS] in {
// Defines atomic and non-atomic loads, regular and extending. // Defines atomic and non-atomic loads, regular and extending.
multiclass WebAssemblyLoad<WebAssemblyRegClass rc, string Name, int Opcode> { multiclass WebAssemblyLoad<WebAssemblyRegClass rc, string Name, int Opcode> {
let mayLoad = 1 in
defm "": I<(outs rc:$dst), defm "": I<(outs rc:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
(outs), (ins P2Align:$p2align, offset32_op:$off), (outs), (ins P2Align:$p2align, offset32_op:$off),
[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"), [], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
!strconcat(Name, "\t${off}, ${p2align}"), Opcode>; !strconcat(Name, "\t${off}${p2align}"), Opcode>;
} }
// Basic load. // Basic load.
// FIXME: When we can break syntax compatibility, reorder the fields in the // FIXME: When we can break syntax compatibility, reorder the fields in the
// asmstrings to match the binary encoding. // asmstrings to match the binary encoding.
defm LOAD_I32 : WebAssemblyLoad<I32, "i32.load", 0x28>; defm LOAD_I32 : WebAssemblyLoad<I32, "i32.load", 0x28>;
defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29>; defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29>;
defm LOAD_F32 : WebAssemblyLoad<F32, "f32.load", 0x2a>; defm LOAD_F32 : WebAssemblyLoad<F32, "f32.load", 0x2a>;
▲ Show 20 Lines • Show All 230 Lines • ▼ Show 20 Lines
def : LoadPatExternSymOffOnly<i64, extloadi16, LOAD16_U_I64>; def : LoadPatExternSymOffOnly<i64, extloadi16, LOAD16_U_I64>;
def : LoadPatExternSymOffOnly<i64, extloadi32, LOAD32_U_I64>; def : LoadPatExternSymOffOnly<i64, extloadi32, LOAD32_U_I64>;
let Defs = [ARGUMENTS] in { let Defs = [ARGUMENTS] in {
// Defines atomic and non-atomic stores, regular and truncating // Defines atomic and non-atomic stores, regular and truncating
multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode> { multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode> {
let mayStore = 1 in
defm "" : I<(outs), defm "" : I<(outs),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val), (ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
(outs), (outs),
(ins P2Align:$p2align, offset32_op:$off), [], (ins P2Align:$p2align, offset32_op:$off), [],
!strconcat(Name, "\t${off}(${addr})${p2align}, $val"), !strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
!strconcat(Name, "\t${off}, ${p2align}"), Opcode>; !strconcat(Name, "\t${off}${p2align}"), Opcode>;
} }
// Basic store. // Basic store.
// Note: WebAssembly inverts SelectionDAG's usual operand order. // Note: WebAssembly inverts SelectionDAG's usual operand order.
defm STORE_I32 : WebAssemblyStore<I32, "i32.store", 0x36>; defm STORE_I32 : WebAssemblyStore<I32, "i32.store", 0x36>;
defm STORE_I64 : WebAssemblyStore<I64, "i64.store", 0x37>; defm STORE_I64 : WebAssemblyStore<I64, "i64.store", 0x37>;
defm STORE_F32 : WebAssemblyStore<F32, "f32.store", 0x38>; defm STORE_F32 : WebAssemblyStore<F32, "f32.store", 0x38>;
defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>; defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>;
▲ Show 20 Lines • Show All 143 Lines • ▼ Show 20 Linesdefm CURRENT_MEMORY_I32 : I<(outs I32:$dst), (ins i32imm:$flags),
(outs), (ins i32imm:$flags), (outs), (ins i32imm:$flags),
[], [],
"current_memory\t$dst", "current_memory\t$dst",
"current_memory\t$flags", 0x3f>, "current_memory\t$flags", 0x3f>,
Requires<[HasAddr32]>; Requires<[HasAddr32]>;
// Grow memory. // Grow memory.
defm MEMORY_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta), defm MEMORY_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta),
(outs), (ins i32imm:$flags, I32:$delta), (outs), (ins i32imm:$flags),
[(set I32:$dst, [(set I32:$dst,
(int_wasm_memory_grow (i32 imm:$flags), (int_wasm_memory_grow (i32 imm:$flags),
I32:$delta))], I32:$delta))],
"memory.grow\t$dst, $flags, $delta", "memory.grow\t$dst, $flags, $delta",
"memory.grow\t$flags, $delta", 0x3f>, "memory.grow\t$flags", 0x3f>,
Requires<[HasAddr32]>; Requires<[HasAddr32]>;
defm MEM_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta), defm MEM_GROW_I32 : I<(outs I32:$dst), (ins i32imm:$flags, I32:$delta),
(outs), (ins i32imm:$flags), (outs), (ins i32imm:$flags),
[(set I32:$dst, [(set I32:$dst,
(int_wasm_mem_grow (i32 imm:$flags), I32:$delta))], (int_wasm_mem_grow (i32 imm:$flags), I32:$delta))],
"mem.grow\t$dst, $flags, $delta", "mem.grow\t$flags", "mem.grow\t$dst, $flags, $delta", "mem.grow\t$flags",
0x3f>, 0x3f>,
Requires<[HasAddr32]>; Requires<[HasAddr32]>;
Show All 13 Lines

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

Show First 20 Lines • Show All 310 Lines • ▼ Show 20 Lines if (getOptLevel() != CodeGenOpt::None) {
// Run the register coloring pass to reduce the total number of registers. // Run the register coloring pass to reduce the total number of registers.
// This runs after stackification so that it doesn't consider registers // This runs after stackification so that it doesn't consider registers
// that become stackified. // that become stackified.
addPass(createWebAssemblyRegColoring()); addPass(createWebAssemblyRegColoring());
} }
// Eliminate multiple-entry loops. Do this before inserting explicit get_local // Eliminate multiple-entry loops. Do this before inserting explicit get_local
// and set_local operators because we create a new variable that we want // and set_local operators because we create a new variable that we want
// converted into a local. // converted into a local.
sunfishUnsubmitted
Not Done
ReplyInline Actions

With the explicit locals pass going away, we can remove the second sentence of this comment.

sunfish: With the explicit locals pass going away, we can remove the second sentence of this comment.
addPass(createWebAssemblyFixIrreducibleControlFlow()); addPass(createWebAssemblyFixIrreducibleControlFlow());
// Insert explicit get_local and set_local operators.
addPass(createWebAssemblyExplicitLocals());
// Do various transformations for exception handling // Do various transformations for exception handling
addPass(createWebAssemblyLateEHPrepare()); addPass(createWebAssemblyLateEHPrepare());
// Sort the blocks of the CFG into topological order, a prerequisite for // Sort the blocks of the CFG into topological order, a prerequisite for
// BLOCK and LOOP markers. // BLOCK and LOOP markers.
addPass(createWebAssemblyCFGSort()); addPass(createWebAssemblyCFGSort());
// Insert BLOCK and LOOP markers. // Insert BLOCK and LOOP markers.
addPass(createWebAssemblyCFGStackify()); addPass(createWebAssemblyCFGStackify());
// Lower br_unless into br_if. // Lower br_unless into br_if.
addPass(createWebAssemblyLowerBrUnless()); addPass(createWebAssemblyLowerBrUnless());
// Perform the very last peephole optimizations on the code. // Perform the very last peephole optimizations on the code.
if (getOptLevel() != CodeGenOpt::None) if (getOptLevel() != CodeGenOpt::None)
addPass(createWebAssemblyPeephole()); addPass(createWebAssemblyPeephole());
// Insert explicit get_local and set_local operators.
addPass(createWebAssemblyExplicitLocals());
// Create a mapping from LLVM CodeGen virtual registers to wasm registers. // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
addPass(createWebAssemblyRegNumbering()); addPass(createWebAssemblyRegNumbering());
} }

test/CodeGen/WebAssembly/address-offsets.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test folding constant offsets and symbols into load and store addresses under ; Test folding constant offsets and symbols into load and store addresses under
; a variety of circumstances. ; a variety of circumstances.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
@g = external global [0 x i32], align 4 @g = external global [0 x i32], align 4
; CHECK-LABEL: load_test0: ; CHECK-LABEL: load_test0:
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.load $push1=, g+40($pop0){{$}} ; CHECK-NEXT: i32.load g+40{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test0() { define i32 @load_test0() {
%t = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4 %t = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test0_noinbounds: ; CHECK-LABEL: load_test0_noinbounds:
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.load $push1=, g+40($pop0){{$}} ; CHECK-NEXT: i32.load g+40{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test0_noinbounds() { define i32 @load_test0_noinbounds() {
%t = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4 %t = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4
ret i32 %t ret i32 %t
} }
; TODO: load_test1 - load_test8 are disabled because folding GA+reg is disabled ; TODO: load_test1 - load_test8 are disabled because folding GA+reg is disabled
; (there are cases where the value in the reg can be negative). ; (there are cases where the value in the reg can be negative).
; Likewise for stores. ; Likewise for stores.
; CHECK-LABEL: load_test1: ; CHECK-LABEL: load_test1:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test1(i32 %n) { define i32 @load_test1(i32 %n) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test2: ; CHECK-LABEL: load_test2:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test2(i32 %n) { define i32 @load_test2(i32 %n) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test3: ; CHECK-LABEL: load_test3:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test3(i32 %n) { define i32 @load_test3(i32 %n) {
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test4: ; CHECK-LABEL: load_test4:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test4(i32 %n) { define i32 @load_test4(i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test5: ; CHECK-LABEL: load_test5:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test5(i32 %n) { define i32 @load_test5(i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test6: ; CHECK-LABEL: load_test6:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test6(i32 %n) { define i32 @load_test6(i32 %n) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test7: ; CHECK-LABEL: load_test7:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test7(i32 %n) { define i32 @load_test7(i32 %n) {
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test8: ; CHECK-LABEL: load_test8:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.shl
; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}} ; CHECK-NEX T: i32.load g+40{{$}}
; CHECK-NEX T: return $pop2{{$}} ; CHECK-NEX T: return {{$}}
define i32 @load_test8(i32 %n) { define i32 @load_test8(i32 %n) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test9: ; CHECK-LABEL: load_test9:
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.load $push1=, g-40($pop0){{$}} ; CHECK-NEXT: i32.load g-40{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test9() { define i32 @load_test9() {
%t = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 1073741814), align 4 %t = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 1073741814), align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test10: ; CHECK-LABEL: load_test10:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.const $push2=, g-40{{$}} ; CHECK-NEXT: i32.const g-40{{$}}
; CHECK-NEXT: i32.add $push3=, $pop1, $pop2{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push4=, 0($pop3){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop4{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test10(i32 %n) { define i32 @load_test10(i32 %n) {
%add = add nsw i32 %n, -10 %add = add nsw i32 %n, -10
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test11: ; CHECK-LABEL: load_test11:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.load $push0=, 40($0){{$}} ; CHECK-NEXT: i32.load 40{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test11(i32* %p) { define i32 @load_test11(i32* %p) {
%arrayidx = getelementptr inbounds i32, i32* %p, i32 10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 10
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test11_noinbounds: ; CHECK-LABEL: load_test11_noinbounds:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.load $push2=, 0($pop1){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop2{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test11_noinbounds(i32* %p) { define i32 @load_test11_noinbounds(i32* %p) {
%arrayidx = getelementptr i32, i32* %p, i32 10 %arrayidx = getelementptr i32, i32* %p, i32 10
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test12: ; CHECK-LABEL: load_test12:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test12(i32* %p, i32 %n) { define i32 @load_test12(i32* %p, i32 %n) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test13: ; CHECK-LABEL: load_test13:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test13(i32* %p, i32 %n) { define i32 @load_test13(i32* %p, i32 %n) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test14: ; CHECK-LABEL: load_test14:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.load $push3=, 40($pop2){{$}} ; CHECK-NEXT: i32.load 40{{$}}
; CHECK-NEXT: return $pop3{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test14(i32* %p, i32 %n) { define i32 @load_test14(i32* %p, i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test15: ; CHECK-LABEL: load_test15:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test15(i32* %p, i32 %n) { define i32 @load_test15(i32* %p, i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr = getelementptr inbounds i32, i32* %p, i32 10
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test16: ; CHECK-LABEL: load_test16:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test16(i32* %p, i32 %n) { define i32 @load_test16(i32* %p, i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr = getelementptr inbounds i32, i32* %p, i32 10
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test17: ; CHECK-LABEL: load_test17:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test17(i32* %p, i32 %n) { define i32 @load_test17(i32* %p, i32 %n) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %add %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test18: ; CHECK-LABEL: load_test18:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.load $push3=, 40($pop2){{$}} ; CHECK-NEXT: i32.load 40{{$}}
; CHECK-NEXT: return $pop3{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test18(i32* %p, i32 %n) { define i32 @load_test18(i32* %p, i32 %n) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
%t = load i32, i32* %add.ptr1, align 4 %t = load i32, i32* %add.ptr1, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test19: ; CHECK-LABEL: load_test19:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test19(i32* %p, i32 %n) { define i32 @load_test19(i32* %p, i32 %n) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %add %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add
%t = load i32, i32* %add.ptr, align 4 %t = load i32, i32* %add.ptr, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test20: ; CHECK-LABEL: load_test20:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, -40{{$}} ; CHECK-NEXT: i32.const -40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.load $push2=, 0($pop1){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop2{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test20(i32* %p) { define i32 @load_test20(i32* %p) {
%arrayidx = getelementptr inbounds i32, i32* %p, i32 -10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 -10
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_test21: ; CHECK-LABEL: load_test21:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, -40{{$}} ; CHECK-NEXT: i32.const -40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.load $push5=, 0($pop4){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop5{{$}} ; CHECK-NEXT: return {{$}}
define i32 @load_test21(i32* %p, i32 %n) { define i32 @load_test21(i32* %p, i32 %n) {
%add = add nsw i32 %n, -10 %add = add nsw i32 %n, -10
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
%t = load i32, i32* %arrayidx, align 4 %t = load i32, i32* %arrayidx, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: store_test0: ; CHECK-LABEL: store_test0:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store g+40($pop0), $0{{$}} ; CHECK-NEXT: i32.store g+40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test0(i32 %i) { define void @store_test0(i32 %i) {
store i32 %i, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4 store i32 %i, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4
ret void ret void
} }
; CHECK-LABEL: store_test0_noinbounds: ; CHECK-LABEL: store_test0_noinbounds:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store g+40($pop0), $0{{$}} ; CHECK-NEXT: i32.store g+40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test0_noinbounds(i32 %i) { define void @store_test0_noinbounds(i32 %i) {
store i32 %i, i32* getelementptr ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4 store i32 %i, i32* getelementptr ([0 x i32], [0 x i32]* @g, i32 0, i32 10), align 4
ret void ret void
} }
; CHECK-LABEL: store_test1: ; CHECK-LABEL: store_test1:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test1(i32 %n, i32 %i) { define void @store_test1(i32 %n, i32 %i) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test2: ; CHECK-LABEL: store_test2:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test2(i32 %n, i32 %i) { define void @store_test2(i32 %n, i32 %i) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test3: ; CHECK-LABEL: store_test3:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test3(i32 %n, i32 %i) { define void @store_test3(i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test4: ; CHECK-LABEL: store_test4:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test4(i32 %n, i32 %i) { define void @store_test4(i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test5: ; CHECK-LABEL: store_test5:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test5(i32 %n, i32 %i) { define void @store_test5(i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test6: ; CHECK-LABEL: store_test6:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test6(i32 %n, i32 %i) { define void @store_test6(i32 %n, i32 %i) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test7: ; CHECK-LABEL: store_test7:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test7(i32 %n, i32 %i) { define void @store_test7(i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test8: ; CHECK-LABEL: store_test8:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: i32.store g+40{{$}}
; CHECK-NEX T: return{{$}} ; CHECK-NEX T: return{{$}}
define void @store_test8(i32 %n, i32 %i) { define void @store_test8(i32 %n, i32 %i) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test9: ; CHECK-LABEL: store_test9:
; CHECK-NEXT: param i32{{$}} ; CHECK-NEXT: param i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store g-40($pop0), $0{{$}} ; CHECK-NEXT: i32.store g-40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test9(i32 %i) { define void @store_test9(i32 %i) {
store i32 %i, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 1073741814), align 4 store i32 %i, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 1073741814), align 4
ret void ret void
} }
; CHECK-LABEL: store_test10: ; CHECK-LABEL: store_test10:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.const $push2=, g-40{{$}} ; CHECK-NEXT: i32.const g-40{{$}}
; CHECK-NEXT: i32.add $push3=, $pop1, $pop2{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop3), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test10(i32 %n, i32 %i) { define void @store_test10(i32 %n, i32 %i) {
%add = add nsw i32 %n, -10 %add = add nsw i32 %n, -10
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test11: ; CHECK-LABEL: store_test11:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.store 40($0), $1{{$}} ; CHECK-NEXT: i32.store 40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test11(i32* %p, i32 %i) { define void @store_test11(i32* %p, i32 %i) {
%arrayidx = getelementptr inbounds i32, i32* %p, i32 10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 10
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test11_noinbounds: ; CHECK-LABEL: store_test11_noinbounds:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.store 0($pop1), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test11_noinbounds(i32* %p, i32 %i) { define void @store_test11_noinbounds(i32* %p, i32 %i) {
%arrayidx = getelementptr i32, i32* %p, i32 10 %arrayidx = getelementptr i32, i32* %p, i32 10
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test12: ; CHECK-LABEL: store_test12:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test12(i32* %p, i32 %n, i32 %i) { define void @store_test12(i32* %p, i32 %n, i32 %i) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test13: ; CHECK-LABEL: store_test13:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test13(i32* %p, i32 %n, i32 %i) { define void @store_test13(i32* %p, i32 %n, i32 %i) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test14: ; CHECK-LABEL: store_test14:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.store 40($pop2), $2{{$}} ; CHECK-NEXT: i32.store 40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test14(i32* %p, i32 %n, i32 %i) { define void @store_test14(i32* %p, i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test15: ; CHECK-LABEL: store_test15:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test15(i32* %p, i32 %n, i32 %i) { define void @store_test15(i32* %p, i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr = getelementptr inbounds i32, i32* %p, i32 10
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test16: ; CHECK-LABEL: store_test16:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test16(i32* %p, i32 %n, i32 %i) { define void @store_test16(i32* %p, i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr = getelementptr inbounds i32, i32* %p, i32 10
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test17: ; CHECK-LABEL: store_test17:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test17(i32* %p, i32 %n, i32 %i) { define void @store_test17(i32* %p, i32 %n, i32 %i) {
%add = add nsw i32 %n, 10 %add = add nsw i32 %n, 10
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %add %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test18: ; CHECK-LABEL: store_test18:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.store 40($pop2), $2{{$}} ; CHECK-NEXT: i32.store 40{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test18(i32* %p, i32 %n, i32 %i) { define void @store_test18(i32* %p, i32 %n, i32 %i) {
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n
%add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
store i32 %i, i32* %add.ptr1, align 4 store i32 %i, i32* %add.ptr1, align 4
ret void ret void
} }
; CHECK-LABEL: store_test19: ; CHECK-LABEL: store_test19:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, 40{{$}} ; CHECK-NEXT: i32.const 40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test19(i32* %p, i32 %n, i32 %i) { define void @store_test19(i32* %p, i32 %n, i32 %i) {
%add = add nsw i32 10, %n %add = add nsw i32 10, %n
%add.ptr = getelementptr inbounds i32, i32* %p, i32 %add %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add
store i32 %i, i32* %add.ptr, align 4 store i32 %i, i32* %add.ptr, align 4
ret void ret void
} }
; CHECK-LABEL: store_test20: ; CHECK-LABEL: store_test20:
; CHECK-NEXT: param i32, i32{{$}} ; CHECK-NEXT: param i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, -40{{$}} ; CHECK-NEXT: i32.const -40{{$}}
; CHECK-NEXT: i32.add $push1=, $0, $pop0{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.store 0($pop1), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test20(i32* %p, i32 %i) { define void @store_test20(i32* %p, i32 %i) {
%arrayidx = getelementptr inbounds i32, i32* %p, i32 -10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 -10
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }
; CHECK-LABEL: store_test21: ; CHECK-LABEL: store_test21:
; CHECK-NEXT: param i32, i32, i32{{$}} ; CHECK-NEXT: param i32, i32, i32{{$}}
; CHECK-NEXT: i32.const $push0=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.shl $push1=, $1, $pop0{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.add $push2=, $0, $pop1{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push3=, -40{{$}} ; CHECK-NEXT: i32.const -40{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($pop4), $2{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_test21(i32* %p, i32 %n, i32 %i) { define void @store_test21(i32* %p, i32 %n, i32 %i) {
%add = add nsw i32 %n, -10 %add = add nsw i32 %n, -10
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %add %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add
store i32 %i, i32* %arrayidx, align 4 store i32 %i, i32* %arrayidx, align 4
ret void ret void
} }

test/CodeGen/WebAssembly/byval.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -verify-machineinstrs -fast-isel | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs -fast-isel | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
%SmallStruct = type { i32 } %SmallStruct = type { i32 }
%OddStruct = type { i32, i8, i32 } %OddStruct = type { i32, i8, i32 }
%AlignedStruct = type { double, double } %AlignedStruct = type { double, double }
%BigStruct = type { double, double, double, double, double, double, double, double, double, double, double, i8, i8, i8 } %BigStruct = type { double, double, double, double, double, double, double, double, double, double, double, i8, i8, i8 }
%EmptyStruct = type { } %EmptyStruct = type { }
%BigArray = type { [33 x i8] } %BigArray = type { [33 x i8] }
declare void @ext_func(%SmallStruct*) declare void @ext_func(%SmallStruct*)
declare void @ext_func_empty(%EmptyStruct* byval) declare void @ext_func_empty(%EmptyStruct* byval)
declare void @ext_byval_func(%SmallStruct* byval) declare void @ext_byval_func(%SmallStruct* byval)
declare void @ext_byval_func_align8(%SmallStruct* byval align 8) declare void @ext_byval_func_align8(%SmallStruct* byval align 8)
declare void @ext_byval_func_alignedstruct(%AlignedStruct* byval) declare void @ext_byval_func_alignedstruct(%AlignedStruct* byval)
declare void @ext_byval_func_bigarray(%BigArray* byval) declare void @ext_byval_func_bigarray(%BigArray* byval)
declare void @ext_byval_func_empty(%EmptyStruct* byval) declare void @ext_byval_func_empty(%EmptyStruct* byval)
; CHECK-LABEL: byval_arg ; CHECK-LABEL: byval_arg
define void @byval_arg(%SmallStruct* %ptr) { define void @byval_arg(%SmallStruct* %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; Subtract 16 from SP (SP is 16-byte aligned) ; Subtract 16 from SP (SP is 16-byte aligned)
; CHECK-NEXT: get_global $push[[L2:.+]]=, __stack_pointer ; CHECK-NEXT: get_global __stack_pointer
; CHECK-NEXT: i32.const $push[[L3:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L2]], $pop[[L3]] ; CHECK-NEXT: i32.sub
; Ensure SP is stored back before the call ; Ensure SP is stored back before the call
; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}} ; CHECK-NEXT: tee_local $[[SP:.+]]={{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L10]]{{$}} ; CHECK-NEXT: set_global __stack_pointer{{$}}
; Copy the SmallStruct argument to the stack (SP+12, original SP-4) ; Copy the SmallStruct argument to the stack (SP+12, original SP-4)
; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0) ; CHECK-NEXT: i32.load 0
; CHECK-NEXT: i32.store 12($[[SP]]), $pop[[L0]] ; CHECK-NEXT: i32.store 12($[[SP]])
; Pass a pointer to the stack slot to the function ; Pass a pointer to the stack slot to the function
; CHECK-NEXT: i32.const $push[[L5:.+]]=, 12{{$}} ; CHECK-NEXT: i32.const 12{{$}}
; CHECK-NEXT: i32.add $push[[ARG:.+]]=, $[[SP]], $pop[[L5]]{{$}} ; CHECK-NEXT: i32.add $[[SP]]{{$}}
; CHECK-NEXT: call ext_byval_func@FUNCTION, $pop[[ARG]]{{$}} ; CHECK-NEXT: call ext_byval_func@FUNCTION{{$}}
call void @ext_byval_func(%SmallStruct* byval %ptr) call void @ext_byval_func(%SmallStruct* byval %ptr)
; Restore the stack ; Restore the stack
; CHECK-NEXT: i32.const $push[[L6:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.add $push[[L8:.+]]=, $[[SP]], $pop[[L6]] ; CHECK-NEXT: i32.add $[[SP]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L8]] ; CHECK-NEXT: set_global __stack_pointer
; CHECK-NEXT: return ; CHECK-NEXT: return
ret void ret void
} }
; CHECK-LABEL: byval_arg_align8 ; CHECK-LABEL: byval_arg_align8
define void @byval_arg_align8(%SmallStruct* %ptr) { define void @byval_arg_align8(%SmallStruct* %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; Don't check the entire SP sequence, just enough to get the alignment. ; Don't check the entire SP sequence, just enough to get the alignment.
; CHECK: i32.const $push[[L1:.+]]=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.sub $push[[L11:.+]]=, {{.+}}, $pop[[L1]] ; CHECK-NEXT: i32.sub {{.+}}
; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}} ; CHECK-NEXT: tee_local $[[SP:.+]]={{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L10]]{{$}} ; CHECK-NEXT: set_global __stack_pointer{{$}}
; Copy the SmallStruct argument to the stack (SP+8, original SP-8) ; Copy the SmallStruct argument to the stack (SP+8, original SP-8)
; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: i32.store 8($[[SP]]), $pop[[L0]]{{$}} ; CHECK-NEXT: i32.store 8($[[SP]]){{$}}
; Pass a pointer to the stack slot to the function ; Pass a pointer to the stack slot to the function
; CHECK-NEXT: i32.const $push[[L5:.+]]=, 8{{$}} ; CHECK-NEXT: i32.const 8{{$}}
; CHECK-NEXT: i32.add $push[[ARG:.+]]=, $[[SP]], $pop[[L5]]{{$}} ; CHECK-NEXT: i32.add $[[SP]]{{$}}
; CHECK-NEXT: call ext_byval_func_align8@FUNCTION, $pop[[ARG]]{{$}} ; CHECK-NEXT: call ext_byval_func_align8@FUNCTION{{$}}
call void @ext_byval_func_align8(%SmallStruct* byval align 8 %ptr) call void @ext_byval_func_align8(%SmallStruct* byval align 8 %ptr)
ret void ret void
} }
; CHECK-LABEL: byval_arg_double ; CHECK-LABEL: byval_arg_double
define void @byval_arg_double(%AlignedStruct* %ptr) { define void @byval_arg_double(%AlignedStruct* %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; Subtract 16 from SP (SP is 16-byte aligned) ; Subtract 16 from SP (SP is 16-byte aligned)
; CHECK: i32.const $push[[L1:.+]]=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.sub $push[[L14:.+]]=, {{.+}}, $pop[[L1]] ; CHECK-NEXT: i32.sub {{.+}}
; CHECK-NEXT: tee_local $push[[L13:.+]]=, $[[SP:.+]]=, $pop[[L14]] ; CHECK-NEXT: tee_local $[[SP:.+]]=
; CHECK-NEXT: set_global __stack_pointer, $pop[[L13]] ; CHECK-NEXT: set_global __stack_pointer
; Copy the AlignedStruct argument to the stack (SP+0, original SP-16) ; Copy the AlignedStruct argument to the stack (SP+0, original SP-16)
; Just check the last load/store pair of the memcpy ; Just check the last load/store pair of the memcpy
; CHECK: i64.load $push[[L4:.+]]=, 0($0) ; CHECK: i64.load 0
; CHECK-NEXT: i64.store 0($[[SP]]), $pop[[L4]] ; CHECK-NEXT: i64.store 0($[[SP]])
; Pass a pointer to the stack slot to the function ; Pass a pointer to the stack slot to the function
; CHECK-NEXT: call ext_byval_func_alignedstruct@FUNCTION, $[[SP]] ; CHECK-NEXT: call ext_byval_func_alignedstruct@FUNCTION, $[[SP]]
tail call void @ext_byval_func_alignedstruct(%AlignedStruct* byval %ptr) tail call void @ext_byval_func_alignedstruct(%AlignedStruct* byval %ptr)
ret void ret void
} }
; CHECK-LABEL: byval_param ; CHECK-LABEL: byval_param
define void @byval_param(%SmallStruct* byval align 32 %ptr) { define void @byval_param(%SmallStruct* byval align 32 %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; %ptr is just a pointer to a struct, so pass it directly through ; %ptr is just a pointer to a struct, so pass it directly through
; CHECK: call ext_func@FUNCTION, $0 ; CHECK: call ext_func@FUNCTION
call void @ext_func(%SmallStruct* %ptr) call void @ext_func(%SmallStruct* %ptr)
ret void ret void
} }
; CHECK-LABEL: byval_empty_caller ; CHECK-LABEL: byval_empty_caller
define void @byval_empty_caller(%EmptyStruct* %ptr) { define void @byval_empty_caller(%EmptyStruct* %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; CHECK: call ext_byval_func_empty@FUNCTION, $0 ; CHECK: call ext_byval_func_empty@FUNCTION
call void @ext_byval_func_empty(%EmptyStruct* byval %ptr) call void @ext_byval_func_empty(%EmptyStruct* byval %ptr)
ret void ret void
} }
; CHECK-LABEL: byval_empty_callee ; CHECK-LABEL: byval_empty_callee
define void @byval_empty_callee(%EmptyStruct* byval %ptr) { define void @byval_empty_callee(%EmptyStruct* byval %ptr) {
; CHECK: .param i32 ; CHECK: .param i32
; CHECK: call ext_func_empty@FUNCTION, $0 ; CHECK: call ext_func_empty@FUNCTION
call void @ext_func_empty(%EmptyStruct* %ptr) call void @ext_func_empty(%EmptyStruct* %ptr)
ret void ret void
} }
; Call memcpy for "big" byvals. ; Call memcpy for "big" byvals.
; CHECK-LABEL: big_byval: ; CHECK-LABEL: big_byval:
; CHECK: get_global $push[[L2:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L3:.+]]=, 131072 ; CHECK-NEXT: i32.const 131072
; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L2]], $pop[[L3]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}} ; CHECK-NEXT: tee_local $[[SP:.+]]={{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L10]]{{$}} ; CHECK-NEXT: set_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L0:.+]]=, 131072 ; CHECK-NEXT: i32.const 131072
; CHECK-NEXT: i32.call $push[[L11:.+]]=, memcpy@FUNCTION, $[[SP]], ${{.+}}, $pop{{.+}} ; CHECK-NEXT: i32.call memcpy@FUNCTION, $[[SP]], ${{.+}}
; CHECK-NEXT: tee_local $push[[L9:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}} ; CHECK-NEXT: tee_local $[[SP:.+]]={{$}}
; CHECK-NEXT: call big_byval_callee@FUNCTION, ; CHECK-NEXT: call big_byval_callee@FUNCTION,
%big = type [131072 x i8] %big = type [131072 x i8]
declare void @big_byval_callee(%big* byval align 1) declare void @big_byval_callee(%big* byval align 1)
define void @big_byval(%big* byval align 1 %x) { define void @big_byval(%big* byval align 1 %x) {
call void @big_byval_callee(%big* byval align 1 %x) call void @big_byval_callee(%big* byval align 1 %x)
ret void ret void
} }

test/CodeGen/WebAssembly/call.ll

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declare i32 @i32_binary(i32, i32) declare i32 @i32_binary(i32, i32)
declare i64 @i64_nullary() declare i64 @i64_nullary()
declare float @float_nullary() declare float @float_nullary()
declare double @double_nullary() declare double @double_nullary()
declare void @void_nullary() declare void @void_nullary()
; CHECK-LABEL: call_i32_nullary: ; CHECK-LABEL: call_i32_nullary:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} i32.call i32_nullary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @call_i32_nullary() { define i32 @call_i32_nullary() {
%r = call i32 @i32_nullary() %r = call i32 @i32_nullary()
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: call_i64_nullary: ; CHECK-LABEL: call_i64_nullary:
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: {{^}} i64.call $push[[NUM:[0-9]+]]=, i64_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} i64.call i64_nullary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @call_i64_nullary() { define i64 @call_i64_nullary() {
%r = call i64 @i64_nullary() %r = call i64 @i64_nullary()
ret i64 %r ret i64 %r
} }
; CHECK-LABEL: call_float_nullary: ; CHECK-LABEL: call_float_nullary:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: {{^}} f32.call $push[[NUM:[0-9]+]]=, float_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} f32.call float_nullary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @call_float_nullary() { define float @call_float_nullary() {
%r = call float @float_nullary() %r = call float @float_nullary()
ret float %r ret float %r
} }
; CHECK-LABEL: call_double_nullary: ; CHECK-LABEL: call_double_nullary:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: {{^}} f64.call $push[[NUM:[0-9]+]]=, double_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} f64.call double_nullary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @call_double_nullary() { define double @call_double_nullary() {
%r = call double @double_nullary() %r = call double @double_nullary()
ret double %r ret double %r
} }
; CHECK-LABEL: call_void_nullary: ; CHECK-LABEL: call_void_nullary:
; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @call_void_nullary() { define void @call_void_nullary() {
call void @void_nullary() call void @void_nullary()
ret void ret void
} }
; CHECK-LABEL: call_i32_unary: ; CHECK-LABEL: call_i32_unary:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_unary@FUNCTION, $pop[[L0]]{{$}} ; CHECK-NEXT: {{^}} i32.call i32_unary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @call_i32_unary(i32 %a) { define i32 @call_i32_unary(i32 %a) {
%r = call i32 @i32_unary(i32 %a) %r = call i32 @i32_unary(i32 %a)
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: call_i32_binary: ; CHECK-LABEL: call_i32_binary:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_binary@FUNCTION, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: {{^}} i32.call i32_binary@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @call_i32_binary(i32 %a, i32 %b) { define i32 @call_i32_binary(i32 %a, i32 %b) {
%r = call i32 @i32_binary(i32 %a, i32 %b) %r = call i32 @i32_binary(i32 %a, i32 %b)
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: call_indirect_void: ; CHECK-LABEL: call_indirect_void:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: {{^}} call_indirect $pop[[L0]]{{$}} ; CHECK-NEXT: {{^}} call_indirect{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @call_indirect_void(void ()* %callee) { define void @call_indirect_void(void ()* %callee) {
call void %callee() call void %callee()
ret void ret void
} }
; CHECK-LABEL: call_indirect_i32: ; CHECK-LABEL: call_indirect_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: {{^}} i32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}} ; CHECK-NEXT: {{^}} i32.call_indirect{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @call_indirect_i32(i32 ()* %callee) { define i32 @call_indirect_i32(i32 ()* %callee) {
%t = call i32 %callee() %t = call i32 %callee()
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: call_indirect_arg: ; CHECK-LABEL: call_indirect_arg:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: {{^}} call_indirect $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: {{^}} call_indirect{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @call_indirect_arg(void (i32)* %callee, i32 %arg) { define void @call_indirect_arg(void (i32)* %callee, i32 %arg) {
call void %callee(i32 %arg) call void %callee(i32 %arg)
ret void ret void
} }
; CHECK-LABEL: call_indirect_arg_2: ; CHECK-LABEL: call_indirect_arg_2:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 2{{$}} ; CHECK-NEXT: get_local 2{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: {{^}} i32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $pop[[L2]]{{$}} ; CHECK-NEXT: {{^}} i32.call_indirect{{$}}
; CHECK-NEXT: drop $pop[[NUM]]{{$}} ; CHECK-NEXT: drop{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @call_indirect_arg_2(i32 (i32, i32)* %callee, i32 %arg, i32 %arg2) { define void @call_indirect_arg_2(i32 (i32, i32)* %callee, i32 %arg, i32 %arg2) {
call i32 %callee(i32 %arg, i32 %arg2) call i32 %callee(i32 %arg, i32 %arg2)
ret void ret void
} }
; CHECK-LABEL: tail_call_void_nullary: ; CHECK-LABEL: tail_call_void_nullary:
; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}}
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; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @coldcc_tail_call_void_nullary() { define void @coldcc_tail_call_void_nullary() {
tail call coldcc void @void_nullary() tail call coldcc void @void_nullary()
ret void ret void
} }
; CHECK-LABEL: call_constexpr: ; CHECK-LABEL: call_constexpr:
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 3{{$}} ; CHECK-NEXT: i32.const 3{{$}}
; CHECK-NEXT: call .Lbitcast@FUNCTION, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: call .Lbitcast@FUNCTION{{$}}
; CHECK-NEXT: call other_void_nullary@FUNCTION{{$}} ; CHECK-NEXT: call other_void_nullary@FUNCTION{{$}}
; CHECK-NEXT: call void_nullary@FUNCTION{{$}} ; CHECK-NEXT: call void_nullary@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
declare void @vararg_func(...) declare void @vararg_func(...)
declare void @other_void_nullary() declare void @other_void_nullary()
define void @call_constexpr() { define void @call_constexpr() {
bb0: bb0:
call void bitcast (void (...)* @vararg_func to void (i32, i32)*)(i32 2, i32 3) call void bitcast (void (...)* @vararg_func to void (i32, i32)*)(i32 2, i32 3)
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test/CodeGen/WebAssembly/cfg-stackify.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -tail-dup-placement=0 -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck -check-prefix=OPT %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -tail-dup-placement=0 -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck -check-prefix=OPT %s
; Test the CFG stackifier pass. ; Test the CFG stackifier pass.
; Explicitly disable fast-isel, since it gets implicitly enabled in the ; Explicitly disable fast-isel, since it gets implicitly enabled in the
; optnone test. ; optnone test.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
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call void @something() call void @something()
br label %header br label %header
} }
; Test that a simple loop is handled as expected. ; Test that a simple loop is handled as expected.
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK-NOT: local ; CHECK-NOT: local
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK: .LBB2_{{[0-9]+}}: ; CHECK: .LBB2_{{[0-9]+}}:
; CHECK: loop ; CHECK: loop
; CHECK: br_if 0, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB2_{{[0-9]+}}: ; CHECK: .LBB2_{{[0-9]+}}:
; CHECK: end_loop ; CHECK: end_loop
; CHECK: end_block ; CHECK: end_block
; CHECK: return{{$}} ; CHECK: return{{$}}
; OPT-LABEL: test2: ; OPT-LABEL: test2:
; OPT-NOT: local ; OPT-NOT: local
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: .LBB2_{{[0-9]+}}: ; OPT: .LBB2_{{[0-9]+}}:
; OPT: loop ; OPT: loop
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT: .LBB2_{{[0-9]+}}: ; OPT: .LBB2_{{[0-9]+}}:
; OPT: end_loop ; OPT: end_loop
; OPT: end_block ; OPT: end_block
; OPT: return{{$}} ; OPT: return{{$}}
define void @test2(double* nocapture %p, i32 %n) { define void @test2(double* nocapture %p, i32 %n) {
entry: entry:
%cmp.4 = icmp sgt i32 %n, 0 %cmp.4 = icmp sgt i32 %n, 0
br i1 %cmp.4, label %for.body.preheader, label %for.end br i1 %cmp.4, label %for.body.preheader, label %for.end
Show All 14 Lines
for.end.loopexit: for.end.loopexit:
br label %for.end br label %for.end
for.end: for.end:
ret void ret void
} }
; CHECK-LABEL: doublediamond: ; CHECK-LABEL: doublediamond:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, ${{[^,]+}}{{$}} ; CHECK: br_if 0, ${{[^,]+}}{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB3_2: ; CHECK: .LBB3_2:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, ${{[^,]+}}{{$}} ; CHECK: br_if 0, ${{[^,]+}}{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB3_4: ; CHECK: .LBB3_4:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: .LBB3_5: ; CHECK: .LBB3_5:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: return $pop{{[0-9]+}}{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: doublediamond: ; OPT-LABEL: doublediamond:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, ${{[^,]+}}{{$}} ; OPT: br_if 0, ${{[^,]+}}{{$}}
; OPT: br_if 1, ${{[^,]+}}{{$}} ; OPT: br_if 1, ${{[^,]+}}{{$}}
; OPT: br 2{{$}} ; OPT: br 2{{$}}
; OPT-NEXT: .LBB3_3: ; OPT-NEXT: .LBB3_3:
; OPT-NEXT: end_block ; OPT-NEXT: end_block
; OPT: br 1{{$}} ; OPT: br 1{{$}}
; OPT-NEXT: .LBB3_4: ; OPT-NEXT: .LBB3_4:
; OPT: .LBB3_5: ; OPT: .LBB3_5:
; OPT-NEXT: end_block ; OPT-NEXT: end_block
; OPT: return $pop{{[0-9]+}}{{$}} ; OPT: return{{$}}
define i32 @doublediamond(i32 %a, i32 %b, i32* %p) { define i32 @doublediamond(i32 %a, i32 %b, i32* %p) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
%d = icmp eq i32 %b, 0 %d = icmp eq i32 %b, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br i1 %c, label %true, label %false br i1 %c, label %true, label %false
true: true:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br label %exit br label %exit
false: false:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
br i1 %d, label %ft, label %ff br i1 %d, label %ft, label %ff
ft: ft:
store volatile i32 3, i32* %p store volatile i32 3, i32* %p
br label %exit br label %exit
ff: ff:
store volatile i32 4, i32* %p store volatile i32 4, i32* %p
br label %exit br label %exit
exit: exit:
store volatile i32 5, i32* %p store volatile i32 5, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: triangle: ; CHECK-LABEL: triangle:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $1{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB4_2: ; CHECK: .LBB4_2:
; CHECK: return ; CHECK: return
; OPT-LABEL: triangle: ; OPT-LABEL: triangle:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, $1{{$}} ; OPT: br_if 0{{$}}
; OPT: .LBB4_2: ; OPT: .LBB4_2:
; OPT: return ; OPT: return
define i32 @triangle(i32* %p, i32 %a) { define i32 @triangle(i32* %p, i32 %a) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br i1 %c, label %true, label %exit br i1 %c, label %true, label %exit
true: true:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br label %exit br label %exit
exit: exit:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: diamond: ; CHECK-LABEL: diamond:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $1{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB5_2: ; CHECK: .LBB5_2:
; CHECK: .LBB5_3: ; CHECK: .LBB5_3:
; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: return $pop{{[0-9]+}}{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: diamond: ; OPT-LABEL: diamond:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: br 1{{$}} ; OPT: br 1{{$}}
; OPT: .LBB5_2: ; OPT: .LBB5_2:
; OPT: .LBB5_3: ; OPT: .LBB5_3:
; OPT: i32.const $push{{[0-9]+}}=, 0{{$}} ; OPT: i32.const 0{{$}}
; OPT-NEXT: return $pop{{[0-9]+}}{{$}} ; OPT-NEXT: return{{$}}
define i32 @diamond(i32* %p, i32 %a) { define i32 @diamond(i32* %p, i32 %a) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br i1 %c, label %true, label %false br i1 %c, label %true, label %false
true: true:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br label %exit br label %exit
false: false:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
br label %exit br label %exit
exit: exit:
store volatile i32 3, i32* %p store volatile i32 3, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: single_block: ; CHECK-LABEL: single_block:
; CHECK-NOT: br ; CHECK-NOT: br
; CHECK: return $pop{{[0-9]+}}{{$}} ; CHECK: return{{$}}
; OPT-LABEL: single_block: ; OPT-LABEL: single_block:
; OPT-NOT: br ; OPT-NOT: br
; OPT: return $pop{{[0-9]+}}{{$}} ; OPT: return{{$}}
define i32 @single_block(i32* %p) { define i32 @single_block(i32* %p) {
entry: entry:
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: minimal_loop: ; CHECK-LABEL: minimal_loop:
; CHECK-NOT: br ; CHECK-NOT: br
; CHECK: .LBB7_1: ; CHECK: .LBB7_1:
; CHECK: loop i32 ; CHECK: loop i32
; CHECK: i32.store 0($0), $pop{{[0-9]+}}{{$}} ; CHECK: i32.store 0{{$}}
; CHECK: br 0{{$}} ; CHECK: br 0{{$}}
; CHECK: .LBB7_2: ; CHECK: .LBB7_2:
; OPT-LABEL: minimal_loop: ; OPT-LABEL: minimal_loop:
; OPT-NOT: br ; OPT-NOT: br
; OPT: .LBB7_1: ; OPT: .LBB7_1:
; OPT: loop i32 ; OPT: loop i32
; OPT: i32.store 0($0), $pop{{[0-9]+}}{{$}} ; OPT: i32.store 0{{$}}
; OPT: br 0{{$}} ; OPT: br 0{{$}}
; OPT: .LBB7_2: ; OPT: .LBB7_2:
define i32 @minimal_loop(i32* %p) { define i32 @minimal_loop(i32* %p) {
entry: entry:
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br label %loop br label %loop
loop: loop:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br label %loop br label %loop
} }
; CHECK-LABEL: simple_loop: ; CHECK-LABEL: simple_loop:
; CHECK-NOT: br ; CHECK-NOT: br
; CHECK: .LBB8_1: ; CHECK: .LBB8_1:
; CHECK: loop {{$}} ; CHECK: loop{{$}}
; CHECK: br_if 0, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 0{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: return $pop{{[0-9]+}}{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: simple_loop: ; OPT-LABEL: simple_loop:
; OPT-NOT: br ; OPT-NOT: br
; OPT: .LBB8_1: ; OPT: .LBB8_1:
; OPT: loop {{$}} ; OPT: loop{{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
; OPT: i32.const $push{{[0-9]+}}=, 0{{$}} ; OPT: i32.const 0{{$}}
; OPT-NEXT: return $pop{{[0-9]+}}{{$}} ; OPT-NEXT: return{{$}}
define i32 @simple_loop(i32* %p, i32 %a) { define i32 @simple_loop(i32* %p, i32 %a) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br label %loop br label %loop
loop: loop:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br i1 %c, label %loop, label %exit br i1 %c, label %loop, label %exit
exit: exit:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: doubletriangle: ; CHECK-LABEL: doubletriangle:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $0{{$}} ; CHECK: br_if 0{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $1{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB9_3: ; CHECK: .LBB9_3:
; CHECK: .LBB9_4: ; CHECK: .LBB9_4:
; CHECK: return ; CHECK: return
; OPT-LABEL: doubletriangle: ; OPT-LABEL: doubletriangle:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, $0{{$}} ; OPT: br_if 0{{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, $1{{$}} ; OPT: br_if 0{{$}}
; OPT: .LBB9_3: ; OPT: .LBB9_3:
; OPT: .LBB9_4: ; OPT: .LBB9_4:
; OPT: return ; OPT: return
define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) { define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
%d = icmp eq i32 %b, 0 %d = icmp eq i32 %b, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br i1 %c, label %true, label %exit br i1 %c, label %true, label %exit
true: true:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
br i1 %d, label %tt, label %tf br i1 %d, label %tt, label %tf
tt: tt:
store volatile i32 3, i32* %p store volatile i32 3, i32* %p
br label %tf br label %tf
tf: tf:
store volatile i32 4, i32* %p store volatile i32 4, i32* %p
br label %exit br label %exit
exit: exit:
store volatile i32 5, i32* %p store volatile i32 5, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: ifelse_earlyexits: ; CHECK-LABEL: ifelse_earlyexits:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $0{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB10_2: ; CHECK: .LBB10_2:
; CHECK: br_if 0, $1{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB10_4: ; CHECK: .LBB10_4:
; CHECK: i32.const $push{{[0-9]+}}=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: return $pop{{[0-9]+}}{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: ifelse_earlyexits: ; OPT-LABEL: ifelse_earlyexits:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: br_if 1, $1{{$}} ; OPT: br_if 1{{$}}
; OPT: br 1{{$}} ; OPT: br 1{{$}}
; OPT: .LBB10_3: ; OPT: .LBB10_3:
; OPT: .LBB10_4: ; OPT: .LBB10_4:
; OPT: i32.const $push{{[0-9]+}}=, 0{{$}} ; OPT: i32.const 0{{$}}
; OPT-NEXT: return $pop{{[0-9]+}}{{$}} ; OPT-NEXT: return{{$}}
define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) { define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
entry: entry:
%c = icmp eq i32 %a, 0 %c = icmp eq i32 %a, 0
%d = icmp eq i32 %b, 0 %d = icmp eq i32 %b, 0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
br i1 %c, label %true, label %false br i1 %c, label %true, label %false
true: true:
store volatile i32 1, i32* %p store volatile i32 1, i32* %p
br label %exit br label %exit
false: false:
store volatile i32 2, i32* %p store volatile i32 2, i32* %p
br i1 %d, label %ft, label %exit br i1 %d, label %ft, label %exit
ft: ft:
store volatile i32 3, i32* %p store volatile i32 3, i32* %p
br label %exit br label %exit
exit: exit:
store volatile i32 4, i32* %p store volatile i32 4, i32* %p
ret i32 0 ret i32 0
} }
; CHECK-LABEL: doublediamond_in_a_loop: ; CHECK-LABEL: doublediamond_in_a_loop:
; CHECK: .LBB11_1: ; CHECK: .LBB11_1:
; CHECK: loop i32{{$}} ; CHECK: loop i32{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $0{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB11_3: ; CHECK: .LBB11_3:
; CHECK: end_block{{$}} ; CHECK: end_block{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $1{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK: .LBB11_5: ; CHECK: .LBB11_5:
; CHECK: br 0{{$}} ; CHECK: br 0{{$}}
; CHECK: .LBB11_6: ; CHECK: .LBB11_6:
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; OPT-LABEL: doublediamond_in_a_loop: ; OPT-LABEL: doublediamond_in_a_loop:
; OPT: .LBB11_1: ; OPT: .LBB11_1:
; OPT: loop i32{{$}} ; OPT: loop i32{{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: br 2{{$}} ; OPT: br 2{{$}}
; OPT-NEXT: .LBB11_4: ; OPT-NEXT: .LBB11_4:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT: br 1{{$}} ; OPT: br 1{{$}}
; OPT: .LBB11_5: ; OPT: .LBB11_5:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT: br 0{{$}} ; OPT: br 0{{$}}
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Linesif.end:
call void @bar() call void @bar()
br label %outer br label %outer
} }
; Test switch lowering and block placement. ; Test switch lowering and block placement.
; CHECK-LABEL: test4: ; CHECK-LABEL: test4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br_if 1, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 1{{$}}
; CHECK: br 1{{$}} ; CHECK: br 1{{$}}
; CHECK-NEXT: .LBB13_3: ; CHECK-NEXT: .LBB13_3:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 0{{$}}
; CHECK: br_if 1, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 1{{$}}
; CHECK-NEXT: .LBB13_5: ; CHECK-NEXT: .LBB13_5:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: .LBB13_6: ; CHECK-NEXT: .LBB13_6:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: test4: ; OPT-LABEL: test4:
; OPT-NEXT: .param i32{{$}} ; OPT-NEXT: .param i32{{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT: br_if 1, $pop{{[0-9]+}}{{$}} ; OPT: br_if 1{{$}}
; OPT: br 1{{$}} ; OPT: br 1{{$}}
; OPT-NEXT: .LBB13_3: ; OPT-NEXT: .LBB13_3:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT: br_if 1, $pop{{[0-9]+}}{{$}} ; OPT: br_if 1{{$}}
; OPT-NEXT: .LBB13_5: ; OPT-NEXT: .LBB13_5:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NEXT: return{{$}} ; OPT-NEXT: return{{$}}
; OPT-NEXT: .LBB13_6: ; OPT-NEXT: .LBB13_6:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NEXT: return{{$}} ; OPT-NEXT: return{{$}}
define void @test4(i32 %t) { define void @test4(i32 %t) {
entry: entry:
Show All 17 Linesdefault:
ret void ret void
} }
; Test a case where the BLOCK needs to be placed before the LOOP in the ; Test a case where the BLOCK needs to be placed before the LOOP in the
; same basic block. ; same basic block.
; CHECK-LABEL: test5: ; CHECK-LABEL: test5:
; CHECK: .LBB14_1: ; CHECK: .LBB14_1:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK: return{{$}} ; CHECK: return{{$}}
; CHECK-NEXT: .LBB14_4: ; CHECK-NEXT: .LBB14_4:
; CHECK: return{{$}} ; CHECK: return{{$}}
; OPT-LABEL: test5: ; OPT-LABEL: test5:
; OPT: .LBB14_1: ; OPT: .LBB14_1:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
; OPT: return{{$}} ; OPT: return{{$}}
; OPT-NEXT: .LBB14_4: ; OPT-NEXT: .LBB14_4:
; OPT: return{{$}} ; OPT: return{{$}}
define void @test5(i1 %p, i1 %q) { define void @test5(i1 %p, i1 %q) {
entry: entry:
Show All 17 Lines
} }
; Test an interesting case of a loop with multiple exits, which ; Test an interesting case of a loop with multiple exits, which
; aren't to layout successors of the loop, and one of which is to a successors ; aren't to layout successors of the loop, and one of which is to a successors
; which has another predecessor. ; which has another predecessor.
; CHECK-LABEL: test6: ; CHECK-LABEL: test6:
; CHECK: .LBB15_1: ; CHECK: .LBB15_1:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 2, {{[^,]+}}{{$}} ; CHECK: br_if 2, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
; CHECK-NEXT: .LBB15_5: ; CHECK-NEXT: .LBB15_5:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: .LBB15_6: ; CHECK: .LBB15_6:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
; OPT-LABEL: test6: ; OPT-LABEL: test6:
; OPT: .LBB15_1: ; OPT: .LBB15_1:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 2, {{[^,]+}}{{$}} ; OPT: br_if 2, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
Show All 34 Linessecond:
ret void ret void
} }
; Test a case where there are multiple backedges and multiple loop exits ; Test a case where there are multiple backedges and multiple loop exits
; that end in unreachable. ; that end in unreachable.
; CHECK-LABEL: test7: ; CHECK-LABEL: test7:
; CHECK: .LBB16_1: ; CHECK: .LBB16_1:
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: unreachable ; CHECK: unreachable
; CHECK-NEXT: .LBB16_4: ; CHECK-NEXT: .LBB16_4:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: unreachable ; CHECK: unreachable
; OPT-LABEL: test7: ; OPT-LABEL: test7:
; OPT: .LBB16_1: ; OPT: .LBB16_1:
; OPT-NEXT: block ; OPT-NEXT: block
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT: br 2{{$}} ; OPT: br 2{{$}}
; OPT-NEXT: .LBB16_3: ; OPT-NEXT: .LBB16_3:
; OPT-NEXT: end_block ; OPT-NEXT: end_block
; OPT-NOT: block ; OPT-NOT: block
Show All 31 Linesu1:
unreachable unreachable
} }
; Test an interesting case using nested loops and switches. ; Test an interesting case using nested loops and switches.
; CHECK-LABEL: test8: ; CHECK-LABEL: test8:
; CHECK: .LBB17_1: ; CHECK: .LBB17_1:
; CHECK-NEXT: loop i32{{$}} ; CHECK-NEXT: loop i32{{$}}
; CHECK-NEXT: i32.const $push{{[^,]+}}, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: br_if 0, {{[^,]+}}{{$}} ; CHECK-NEXT: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: br 0{{$}} ; CHECK-NEXT: br 0{{$}}
; CHECK-NEXT: .LBB17_2: ; CHECK-NEXT: .LBB17_2:
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; OPT-LABEL: test8: ; OPT-LABEL: test8:
; OPT: .LBB17_1: ; OPT: .LBB17_1:
; OPT-NEXT: loop i32{{$}} ; OPT-NEXT: loop i32{{$}}
; OPT-NEXT: i32.const $push{{[^,]+}}, 0{{$}} ; OPT-NEXT: i32.const 0{{$}}
; OPT-NEXT: br_if 0, {{[^,]+}}{{$}} ; OPT-NEXT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: br 0{{$}} ; OPT-NEXT: br 0{{$}}
; OPT-NEXT: .LBB17_2: ; OPT-NEXT: .LBB17_2:
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
define i32 @test8() { define i32 @test8() {
bb: bb:
br label %bb1 br label %bb1
Show All 10 Lines switch i8 undef, label %bb1 [
i8 44, label %bb2 i8 44, label %bb2
] ]
} }
; Test an interesting case using nested loops that share a bottom block. ; Test an interesting case using nested loops that share a bottom block.
; CHECK-LABEL: test9: ; CHECK-LABEL: test9:
; CHECK: .LBB18_1: ; CHECK: .LBB18_1:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NEXT: .LBB18_2: ; CHECK-NEXT: .LBB18_2:
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 2, {{[^,]+}}{{$}} ; CHECK: br_if 2, {{[^,]+}}{{$}}
; CHECK-NEXT: br 1{{$}} ; CHECK-NEXT: br 1{{$}}
; CHECK-NEXT: .LBB18_4: ; CHECK-NEXT: .LBB18_4:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NEXT: br 0{{$}} ; CHECK-NEXT: br 0{{$}}
; CHECK-NEXT: .LBB18_5: ; CHECK-NEXT: .LBB18_5:
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: end_block ; CHECK: end_block
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
; OPT-LABEL: test9: ; OPT-LABEL: test9:
; OPT: .LBB18_1: ; OPT: .LBB18_1:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NEXT: .LBB18_2: ; OPT-NEXT: .LBB18_2:
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NEXT: br 2{{$}} ; OPT-NEXT: br 2{{$}}
; OPT-NEXT: .LBB18_4: ; OPT-NEXT: .LBB18_4:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NOT: block ; OPT-NOT: block
Show All 35 Linesend:
ret void ret void
} }
; Test an interesting case involving nested loops sharing a loop bottom, ; Test an interesting case involving nested loops sharing a loop bottom,
; and loop exits to a block with unreachable. ; and loop exits to a block with unreachable.
; CHECK-LABEL: test10: ; CHECK-LABEL: test10:
; CHECK: .LBB19_1: ; CHECK: .LBB19_1:
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK: .LBB19_3: ; CHECK: .LBB19_3:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: .LBB19_4: ; CHECK: .LBB19_4:
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: .LBB19_9: ; CHECK-NEXT: .LBB19_9:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br 0{{$}} ; CHECK: br 0{{$}}
; CHECK-NEXT: .LBB19_10: ; CHECK-NEXT: .LBB19_10:
; OPT-LABEL: test10: ; OPT-LABEL: test10:
; OPT: .LBB19_1: ; OPT: .LBB19_1:
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT: .LBB19_3: ; OPT: .LBB19_3:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: .LBB19_4: ; OPT: .LBB19_4:
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NEXT: end_loop{{$}} ; OPT-NEXT: end_loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
Show All 37 Lines
bb6: bb6:
ret void ret void
} }
; Test a CFG DAG with interesting merging. ; Test a CFG DAG with interesting merging.
; CHECK-LABEL: test11: ; CHECK-LABEL: test11:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NEXT: i32.const ; CHECK-NEXT: i32.const
; CHECK-NEXT: br_if 0, {{[^,]+}}{{$}} ; CHECK-NEXT: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 2, {{[^,]+}}{{$}} ; CHECK: br_if 2, {{[^,]+}}{{$}}
; CHECK-NEXT: .LBB20_3: ; CHECK-NEXT: .LBB20_3:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
Show All 11 Lines
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
; CHECK-NEXT: .LBB20_8: ; CHECK-NEXT: .LBB20_8:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: return{{$}} ; CHECK: return{{$}}
; OPT-LABEL: test11: ; OPT-LABEL: test11:
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NEXT: i32.const ; OPT-NEXT: i32.const
; OPT-NEXT: br_if 0, {{[^,]+}}{{$}} ; OPT-NEXT: br_if 0, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 2, {{[^,]+}}{{$}} ; OPT: br_if 2, {{[^,]+}}{{$}}
; OPT-NEXT: .LBB20_3: ; OPT-NEXT: .LBB20_3:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: return{{$}} ; OPT: return{{$}}
; OPT-NEXT: .LBB20_4: ; OPT-NEXT: .LBB20_4:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: return{{$}} ; OPT: return{{$}}
; OPT-NEXT: .LBB20_6: ; OPT-NEXT: .LBB20_6:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 0, $pop{{[0-9]+}}{{$}} ; OPT: br_if 0{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: return{{$}} ; OPT: return{{$}}
; OPT-NEXT: .LBB20_8: ; OPT-NEXT: .LBB20_8:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: return{{$}} ; OPT: return{{$}}
define void @test11() { define void @test11() {
bb0: bb0:
Show All 22 Linesbb7:
ret void ret void
bb8: bb8:
store volatile i32 8, i32* null store volatile i32 8, i32* null
ret void ret void
} }
; CHECK-LABEL: test12: ; CHECK-LABEL: test12:
; CHECK: .LBB21_1: ; CHECK: .LBB21_1:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 1, {{[^,]+}}{{$}} ; CHECK: br_if 1, {{[^,]+}}{{$}}
; CHECK-NEXT: br 3{{$}} ; CHECK-NEXT: br 3{{$}}
; CHECK-NEXT: .LBB21_4: ; CHECK-NEXT: .LBB21_4:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 0, {{[^,]+}}{{$}} ; CHECK: br_if 0, {{[^,]+}}{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br_if 2, {{[^,]+}}{{$}} ; CHECK: br_if 2, {{[^,]+}}{{$}}
; CHECK-NEXT: .LBB21_6: ; CHECK-NEXT: .LBB21_6:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NOT: block ; CHECK-NOT: block
; CHECK: br 0{{$}} ; CHECK: br 0{{$}}
; CHECK-NEXT: .LBB21_7: ; CHECK-NEXT: .LBB21_7:
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: test12: ; OPT-LABEL: test12:
; OPT: .LBB21_1: ; OPT: .LBB21_1:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: loop {{$}} ; OPT-NEXT: loop{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: block {{$}} ; OPT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, {{[^,]+}}{{$}} ; OPT: br_if 0, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NOT: block ; OPT-NOT: block
; OPT: br_if 1, {{[^,]+}}{{$}} ; OPT: br_if 1, {{[^,]+}}{{$}}
; OPT-NEXT: br 3{{$}} ; OPT-NEXT: br 3{{$}}
; OPT-NEXT: .LBB21_4: ; OPT-NEXT: .LBB21_4:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
Show All 31 Linesbb7:
ret void ret void
} }
; A block can be "branched to" from another even if it is also reachable via ; A block can be "branched to" from another even if it is also reachable via
; fallthrough from the other. This would normally be optimized away, so use ; fallthrough from the other. This would normally be optimized away, so use
; optnone to disable optimizations to test this case. ; optnone to disable optimizations to test this case.
; CHECK-LABEL: test13: ; CHECK-LABEL: test13:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK: br_if 0, $pop0{{$}} ; CHECK: br_if 0{{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_if 0, $pop3{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB22_3: ; CHECK: .LBB22_3:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: br_if 1, $pop{{[0-9]+}}{{$}} ; CHECK: br_if 1{{$}}
; CHECK-NEXT: br 1{{$}} ; CHECK-NEXT: br 1{{$}}
; CHECK-NEXT: .LBB22_4: ; CHECK-NEXT: .LBB22_4:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: .LBB22_5: ; CHECK-NEXT: .LBB22_5:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: unreachable{{$}} ; CHECK-NEXT: unreachable{{$}}
; OPT-LABEL: test13: ; OPT-LABEL: test13:
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT-NEXT: block {{$}} ; OPT-NEXT: block {{$}}
; OPT: br_if 0, $pop0{{$}} ; OPT: br_if 0{{$}}
; OPT: block {{$}} ; OPT: block {{$}}
; OPT: br_if 0, $pop3{{$}} ; OPT: br_if 0{{$}}
; OPT: .LBB22_3: ; OPT: .LBB22_3:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT: br_if 1, $pop{{[0-9]+}}{{$}} ; OPT: br_if 1{{$}}
; OPT-NEXT: br 1{{$}} ; OPT-NEXT: br 1{{$}}
; OPT-NEXT: .LBB22_4: ; OPT-NEXT: .LBB22_4:
; OPT-NEXT: end_block ; OPT-NEXT: end_block
; OPT-NEXT: return ; OPT-NEXT: return
; OPT-NEXT: .LBB22_5: ; OPT-NEXT: .LBB22_5:
; OPT-NEXT: end_block{{$}} ; OPT-NEXT: end_block{{$}}
; OPT-NEXT: unreachable{{$}} ; OPT-NEXT: unreachable{{$}}
define void @test13() noinline optnone { define void @test13() noinline optnone {
Show All 13 Lines
} }
; Test a case with a single-block loop that has another loop ; Test a case with a single-block loop that has another loop
; as a successor. The end_loop for the first loop should go ; as a successor. The end_loop for the first loop should go
; before the loop for the second. ; before the loop for the second.
; CHECK-LABEL: test14: ; CHECK-LABEL: test14:
; CHECK-NEXT: .LBB23_1:{{$}} ; CHECK-NEXT: .LBB23_1:{{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: br_if 0, $pop0{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NEXT: .LBB23_3:{{$}} ; CHECK-NEXT: .LBB23_3:{{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK-NEXT: i32.const $push1=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: br_if 0, $pop1{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @test14() { define void @test14() {
bb: bb:
br label %bb1 br label %bb1
bb1: bb1:
%tmp = bitcast i1 undef to i1 %tmp = bitcast i1 undef to i1
Show All 38 Lines
} }
; Test that a block boundary which ends one block, begins another block, and ; Test that a block boundary which ends one block, begins another block, and
; also begins a loop, has the markers placed in the correct order. ; also begins a loop, has the markers placed in the correct order.
; CHECK-LABEL: test15: ; CHECK-LABEL: test15:
; CHECK: block ; CHECK: block
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK: br_if 0, $pop{{.*}}{{$}} ; CHECK: br_if 0{{$}}
; CHECK: .LBB24_2: ; CHECK: .LBB24_2:
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: loop {{$}} ; CHECK-NEXT: loop{{$}}
; CHECK: br_if 1, $pop{{.*}}{{$}} ; CHECK: br_if 1{{$}}
; CHECK: br_if 0, ${{.*}}{{$}} ; CHECK: br_if 0, ${{.*}}{{$}}
; CHECK-NEXT: br 2{{$}} ; CHECK-NEXT: br 2{{$}}
; CHECK-NEXT: .LBB24_4: ; CHECK-NEXT: .LBB24_4:
; CHECK-NEXT: end_loop{{$}} ; CHECK-NEXT: end_loop{{$}}
; CHECK: .LBB24_5: ; CHECK: .LBB24_5:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: br_if 1, $pop{{.*}}{{$}} ; CHECK: br_if 1{{$}}
; CHECK: return{{$}} ; CHECK: return{{$}}
; CHECK: .LBB24_7: ; CHECK: .LBB24_7:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK: .LBB24_8: ; CHECK: .LBB24_8:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
; OPT-LABEL: test15: ; OPT-LABEL: test15:
; OPT: block ; OPT: block
; OPT: block ; OPT: block
; OPT-NEXT: i32.const $push ; OPT-NEXT: i32.const
; OPT-NEXT: i32.eqz $push{{.*}}=, $pop{{.*}}{{$}} ; OPT-NEXT: i32.eqz{{$}}
; OPT-NEXT: br_if 0, $pop{{.*}}{{$}} ; OPT-NEXT: br_if 0{{$}}
; OPT-NEXT: call test15_callee1@FUNCTION{{$}} ; OPT-NEXT: call test15_callee1@FUNCTION{{$}}
; OPT-NEXT: br 1{{$}} ; OPT-NEXT: br 1{{$}}
; OPT-NEXT: .LBB24_2: ; OPT-NEXT: .LBB24_2:
; OPT-NEXT: end_block ; OPT-NEXT: end_block
; OPT-NEXT: i32.const ; OPT-NEXT: i32.const
; OPT-NEXT: .LBB24_3: ; OPT-NEXT: .LBB24_3:
; OPT-NEXT: block ; OPT-NEXT: block
; OPT-NEXT: block ; OPT-NEXT: block
Show All 40 Lines

test/CodeGen/WebAssembly/comparisons_f32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic 32-bit floating-point comparison operations assemble as ; Test that basic 32-bit floating-point comparison operations assemble as
; expected. ; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f32: ; CHECK-LABEL: ord_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ord_f32(float %x, float %y) { define i32 @ord_f32(float %x, float %y) {
%a = fcmp ord float %x, %y %a = fcmp ord float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uno_f32: ; CHECK-LABEL: uno_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.ne{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f32.ne{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uno_f32(float %x, float %y) { define i32 @uno_f32(float %x, float %y) {
%a = fcmp uno float %x, %y %a = fcmp uno float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: oeq_f32: ; CHECK-LABEL: oeq_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @oeq_f32(float %x, float %y) { define i32 @oeq_f32(float %x, float %y) {
%a = fcmp oeq float %x, %y %a = fcmp oeq float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: une_f32: ; CHECK-LABEL: une_f32:
; CHECK: f32.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f32.ne{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @une_f32(float %x, float %y) { define i32 @une_f32(float %x, float %y) {
%a = fcmp une float %x, %y %a = fcmp une float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: olt_f32: ; CHECK-LABEL: olt_f32:
; CHECK: f32.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f32.lt{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @olt_f32(float %x, float %y) { define i32 @olt_f32(float %x, float %y) {
%a = fcmp olt float %x, %y %a = fcmp olt float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ole_f32: ; CHECK-LABEL: ole_f32:
; CHECK: f32.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f32.le{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ole_f32(float %x, float %y) { define i32 @ole_f32(float %x, float %y) {
%a = fcmp ole float %x, %y %a = fcmp ole float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ogt_f32: ; CHECK-LABEL: ogt_f32:
; CHECK: f32.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f32.gt{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ogt_f32(float %x, float %y) { define i32 @ogt_f32(float %x, float %y) {
%a = fcmp ogt float %x, %y %a = fcmp ogt float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: oge_f32: ; CHECK-LABEL: oge_f32:
; CHECK: f32.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f32.ge{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @oge_f32(float %x, float %y) { define i32 @oge_f32(float %x, float %y) {
%a = fcmp oge float %x, %y %a = fcmp oge float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; Expanded comparisons, which also check for NaN. ; Expanded comparisons, which also check for NaN.
; These simply rely on SDAG's Expand cond code action. ; These simply rely on SDAG's Expand cond code action.
; CHECK-LABEL: ueq_f32: ; CHECK-LABEL: ueq_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f32.ne{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}} ; CHECK-NEXT: f32.ne{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ueq_f32(float %x, float %y) { define i32 @ueq_f32(float %x, float %y) {
%a = fcmp ueq float %x, %y %a = fcmp ueq float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: one_f32: ; CHECK-LABEL: one_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.ne{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}} ; CHECK-NEXT: f32.eq{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: return $pop[[NUM4]] ; CHECK-NEXT: return
define i32 @one_f32(float %x, float %y) { define i32 @one_f32(float %x, float %y) {
%a = fcmp one float %x, %y %a = fcmp one float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ult_f32: ; CHECK-LABEL: ult_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.ge{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ult_f32(float %x, float %y) { define i32 @ult_f32(float %x, float %y) {
%a = fcmp ult float %x, %y %a = fcmp ult float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ule_f32: ; CHECK-LABEL: ule_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.gt{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ule_f32(float %x, float %y) { define i32 @ule_f32(float %x, float %y) {
%a = fcmp ule float %x, %y %a = fcmp ule float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ugt_f32: ; CHECK-LABEL: ugt_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.le{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ugt_f32(float %x, float %y) { define i32 @ugt_f32(float %x, float %y) {
%a = fcmp ugt float %x, %y %a = fcmp ugt float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uge_f32: ; CHECK-LABEL: uge_f32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.lt{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uge_f32(float %x, float %y) { define i32 @uge_f32(float %x, float %y) {
%a = fcmp uge float %x, %y %a = fcmp uge float %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }

test/CodeGen/WebAssembly/comparisons_f64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic 64-bit floating-point comparison operations assemble as ; Test that basic 64-bit floating-point comparison operations assemble as
; expected. ; expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ord_f64: ; CHECK-LABEL: ord_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ord_f64(double %x, double %y) { define i32 @ord_f64(double %x, double %y) {
%a = fcmp ord double %x, %y %a = fcmp ord double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uno_f64: ; CHECK-LABEL: uno_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.ne{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f64.ne{{$}}
; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uno_f64(double %x, double %y) { define i32 @uno_f64(double %x, double %y) {
%a = fcmp uno double %x, %y %a = fcmp uno double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: oeq_f64: ; CHECK-LABEL: oeq_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @oeq_f64(double %x, double %y) { define i32 @oeq_f64(double %x, double %y) {
%a = fcmp oeq double %x, %y %a = fcmp oeq double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: une_f64: ; CHECK-LABEL: une_f64:
; CHECK: f64.ne $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f64.ne{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @une_f64(double %x, double %y) { define i32 @une_f64(double %x, double %y) {
%a = fcmp une double %x, %y %a = fcmp une double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: olt_f64: ; CHECK-LABEL: olt_f64:
; CHECK: f64.lt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f64.lt{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @olt_f64(double %x, double %y) { define i32 @olt_f64(double %x, double %y) {
%a = fcmp olt double %x, %y %a = fcmp olt double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ole_f64: ; CHECK-LABEL: ole_f64:
; CHECK: f64.le $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f64.le{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ole_f64(double %x, double %y) { define i32 @ole_f64(double %x, double %y) {
%a = fcmp ole double %x, %y %a = fcmp ole double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ogt_f64: ; CHECK-LABEL: ogt_f64:
; CHECK: f64.gt $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f64.gt{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ogt_f64(double %x, double %y) { define i32 @ogt_f64(double %x, double %y) {
%a = fcmp ogt double %x, %y %a = fcmp ogt double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: oge_f64: ; CHECK-LABEL: oge_f64:
; CHECK: f64.ge $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: f64.ge{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @oge_f64(double %x, double %y) { define i32 @oge_f64(double %x, double %y) {
%a = fcmp oge double %x, %y %a = fcmp oge double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; Expanded comparisons, which also check for NaN. ; Expanded comparisons, which also check for NaN.
; CHECK-LABEL: ueq_f64: ; CHECK-LABEL: ueq_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f64.ne{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}} ; CHECK-NEXT: f64.ne{{$}}
; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ueq_f64(double %x, double %y) { define i32 @ueq_f64(double %x, double %y) {
%a = fcmp ueq double %x, %y %a = fcmp ueq double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: one_f64: ; CHECK-LABEL: one_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.ne{{$}}
; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}} ; CHECK-NEXT: f64.eq{{$}}
; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: return $pop[[NUM4]] ; CHECK-NEXT: return
define i32 @one_f64(double %x, double %y) { define i32 @one_f64(double %x, double %y) {
%a = fcmp one double %x, %y %a = fcmp one double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ult_f64: ; CHECK-LABEL: ult_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.ge{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ult_f64(double %x, double %y) { define i32 @ult_f64(double %x, double %y) {
%a = fcmp ult double %x, %y %a = fcmp ult double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ule_f64: ; CHECK-LABEL: ule_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.gt{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ule_f64(double %x, double %y) { define i32 @ule_f64(double %x, double %y) {
%a = fcmp ule double %x, %y %a = fcmp ule double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ugt_f64: ; CHECK-LABEL: ugt_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.le{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ugt_f64(double %x, double %y) { define i32 @ugt_f64(double %x, double %y) {
%a = fcmp ugt double %x, %y %a = fcmp ugt double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uge_f64: ; CHECK-LABEL: uge_f64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.lt{{$}}
; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uge_f64(double %x, double %y) { define i32 @uge_f64(double %x, double %y) {
%a = fcmp uge double %x, %y %a = fcmp uge double %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }

test/CodeGen/WebAssembly/comparisons_i32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 32-bit integer comparison operations assemble as expected. ; Test that basic 32-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i32: ; CHECK-LABEL: eq_i32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.eq{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @eq_i32(i32 %x, i32 %y) { define i32 @eq_i32(i32 %x, i32 %y) {
%a = icmp eq i32 %x, %y %a = icmp eq i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ne_i32: ; CHECK-LABEL: ne_i32:
; CHECK: i32.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.ne {{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ne_i32(i32 %x, i32 %y) { define i32 @ne_i32(i32 %x, i32 %y) {
%a = icmp ne i32 %x, %y %a = icmp ne i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: slt_i32: ; CHECK-LABEL: slt_i32:
; CHECK: i32.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.lt_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @slt_i32(i32 %x, i32 %y) { define i32 @slt_i32(i32 %x, i32 %y) {
%a = icmp slt i32 %x, %y %a = icmp slt i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sle_i32: ; CHECK-LABEL: sle_i32:
; CHECK: i32.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.le_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sle_i32(i32 %x, i32 %y) { define i32 @sle_i32(i32 %x, i32 %y) {
%a = icmp sle i32 %x, %y %a = icmp sle i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ult_i32: ; CHECK-LABEL: ult_i32:
; CHECK: i32.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.lt_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ult_i32(i32 %x, i32 %y) { define i32 @ult_i32(i32 %x, i32 %y) {
%a = icmp ult i32 %x, %y %a = icmp ult i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ule_i32: ; CHECK-LABEL: ule_i32:
; CHECK: i32.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.le_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ule_i32(i32 %x, i32 %y) { define i32 @ule_i32(i32 %x, i32 %y) {
%a = icmp ule i32 %x, %y %a = icmp ule i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sgt_i32: ; CHECK-LABEL: sgt_i32:
; CHECK: i32.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.gt_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sgt_i32(i32 %x, i32 %y) { define i32 @sgt_i32(i32 %x, i32 %y) {
%a = icmp sgt i32 %x, %y %a = icmp sgt i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sge_i32: ; CHECK-LABEL: sge_i32:
; CHECK: i32.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.ge_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sge_i32(i32 %x, i32 %y) { define i32 @sge_i32(i32 %x, i32 %y) {
%a = icmp sge i32 %x, %y %a = icmp sge i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ugt_i32: ; CHECK-LABEL: ugt_i32:
; CHECK: i32.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.gt_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ugt_i32(i32 %x, i32 %y) { define i32 @ugt_i32(i32 %x, i32 %y) {
%a = icmp ugt i32 %x, %y %a = icmp ugt i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uge_i32: ; CHECK-LABEL: uge_i32:
; CHECK: i32.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.ge_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uge_i32(i32 %x, i32 %y) { define i32 @uge_i32(i32 %x, i32 %y) {
%a = icmp uge i32 %x, %y %a = icmp uge i32 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }

test/CodeGen/WebAssembly/comparisons_i64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic 64-bit integer comparison operations assemble as expected. ; Test that basic 64-bit integer comparison operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: eq_i64: ; CHECK-LABEL: eq_i64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.eq{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @eq_i64(i64 %x, i64 %y) { define i32 @eq_i64(i64 %x, i64 %y) {
%a = icmp eq i64 %x, %y %a = icmp eq i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ne_i64: ; CHECK-LABEL: ne_i64:
; CHECK: i64.ne $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.ne{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ne_i64(i64 %x, i64 %y) { define i32 @ne_i64(i64 %x, i64 %y) {
%a = icmp ne i64 %x, %y %a = icmp ne i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: slt_i64: ; CHECK-LABEL: slt_i64:
; CHECK: i64.lt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.lt_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @slt_i64(i64 %x, i64 %y) { define i32 @slt_i64(i64 %x, i64 %y) {
%a = icmp slt i64 %x, %y %a = icmp slt i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sle_i64: ; CHECK-LABEL: sle_i64:
; CHECK: i64.le_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.le_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sle_i64(i64 %x, i64 %y) { define i32 @sle_i64(i64 %x, i64 %y) {
%a = icmp sle i64 %x, %y %a = icmp sle i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ult_i64: ; CHECK-LABEL: ult_i64:
; CHECK: i64.lt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.lt_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ult_i64(i64 %x, i64 %y) { define i32 @ult_i64(i64 %x, i64 %y) {
%a = icmp ult i64 %x, %y %a = icmp ult i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ule_i64: ; CHECK-LABEL: ule_i64:
; CHECK: i64.le_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.le_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ule_i64(i64 %x, i64 %y) { define i32 @ule_i64(i64 %x, i64 %y) {
%a = icmp ule i64 %x, %y %a = icmp ule i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sgt_i64: ; CHECK-LABEL: sgt_i64:
; CHECK: i64.gt_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.gt_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sgt_i64(i64 %x, i64 %y) { define i32 @sgt_i64(i64 %x, i64 %y) {
%a = icmp sgt i64 %x, %y %a = icmp sgt i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: sge_i64: ; CHECK-LABEL: sge_i64:
; CHECK: i64.ge_s $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.ge_s{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sge_i64(i64 %x, i64 %y) { define i32 @sge_i64(i64 %x, i64 %y) {
%a = icmp sge i64 %x, %y %a = icmp sge i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ugt_i64: ; CHECK-LABEL: ugt_i64:
; CHECK: i64.gt_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.gt_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ugt_i64(i64 %x, i64 %y) { define i32 @ugt_i64(i64 %x, i64 %y) {
%a = icmp ugt i64 %x, %y %a = icmp ugt i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: uge_i64: ; CHECK-LABEL: uge_i64:
; CHECK: i64.ge_u $push[[NUM:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i64.ge_u{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @uge_i64(i64 %x, i64 %y) { define i32 @uge_i64(i64 %x, i64 %y) {
%a = icmp uge i64 %x, %y %a = icmp uge i64 %x, %y
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }

test/CodeGen/WebAssembly/conv-trap.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-nontrapping-fptoint | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=-nontrapping-fptoint | FileCheck %s
; Test that basic conversion operations assemble as expected using ; Test that basic conversion operations assemble as expected using
; the trapping opcodes and explicit code to suppress the trapping. ; the trapping opcodes and explicit code to suppress the trapping.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_trunc_s_f32: ; CHECK-LABEL: i32_trunc_s_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.abs
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}} ; CHECK-NEXT: f32.const 0x1p31{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f32.lt{{$}}
; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}} ; CHECK-NEXT: i32.const -2147483648{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i32.trunc_s/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_s/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_s_f32(float %x) { define i32 @i32_trunc_s_f32(float %x) {
%a = fptosi float %x to i32 %a = fptosi float %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_u_f32: ; CHECK-LABEL: i32_trunc_u_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}} ; CHECK-NEXT: f32.const 0x1p32{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f32.lt
; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f32.const 0x0p0{{$}}
; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}} ; CHECK-NEXT: f32.ge
; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i32.trunc_u/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_u/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_u_f32(float %x) { define i32 @i32_trunc_u_f32(float %x) {
%a = fptoui float %x to i32 %a = fptoui float %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_s_f64: ; CHECK-LABEL: i32_trunc_s_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.abs
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}} ; CHECK-NEXT: f64.const 0x1p31{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f64.lt{{$}}
; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}} ; CHECK-NEXT: i32.const -2147483648{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i32.trunc_s/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_s/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_s_f64(double %x) { define i32 @i32_trunc_s_f64(double %x) {
%a = fptosi double %x to i32 %a = fptosi double %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_u_f64: ; CHECK-LABEL: i32_trunc_u_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}} ; CHECK-NEXT: f64.const 0x1p32{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f64.lt
; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f64.const 0x0p0{{$}}
; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}} ; CHECK-NEXT: f64.ge
; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i32.trunc_u/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_u/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_u_f64(double %x) { define i32 @i32_trunc_u_f64(double %x) {
%a = fptoui double %x to i32 %a = fptoui double %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i64_trunc_s_f32: ; CHECK-LABEL: i64_trunc_s_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.abs
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}} ; CHECK-NEXT: f32.const 0x1p63{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f32.lt{{$}}
; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}} ; CHECK-NEXT: i64.const -9223372036854775808{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i64.trunc_s/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_s/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_s_f32(float %x) { define i64 @i64_trunc_s_f32(float %x) {
%a = fptosi float %x to i64 %a = fptosi float %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_u_f32: ; CHECK-LABEL: i64_trunc_u_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}} ; CHECK-NEXT: f32.const 0x1p64{{$}}
; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f32.lt
; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f32.const 0x0p0{{$}}
; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}} ; CHECK-NEXT: f32.ge
; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i64.const 0{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i64.trunc_u/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_u/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_u_f32(float %x) { define i64 @i64_trunc_u_f32(float %x) {
%a = fptoui float %x to i64 %a = fptoui float %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_s_f64: ; CHECK-LABEL: i64_trunc_s_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.abs
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}} ; CHECK-NEXT: f64.const 0x1p63{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f64.lt{{$}}
; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}} ; CHECK-NEXT: i64.const -9223372036854775808{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i64.trunc_s/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_s/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_s_f64(double %x) { define i64 @i64_trunc_s_f64(double %x) {
%a = fptosi double %x to i64 %a = fptosi double %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_u_f64: ; CHECK-LABEL: i64_trunc_u_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}} ; CHECK-NEXT: f64.const 0x1p64{{$}}
; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}} ; CHECK-NEXT: f64.lt
; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f64.const 0x0p0{{$}}
; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}} ; CHECK-NEXT: f64.ge
; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i64.const 0{{$}}
; CHECK-NEXT: return $pop[[ALT]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK-NEXT: BB ; CHECK-NEXT: BB
; CHECK-NEXT: end_block ; CHECK-NEXT: end_block
; CHECK-NEXT: i64.trunc_u/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_u/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_u_f64(double %x) { define i64 @i64_trunc_u_f64(double %x) {
%a = fptoui double %x to i64 %a = fptoui double %x to i64
ret i64 %a ret i64 %a
} }

test/CodeGen/WebAssembly/conv.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+nontrapping-fptoint | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=+nontrapping-fptoint | FileCheck %s
; Test that basic conversion operations assemble as expected. ; Test that basic conversion operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_wrap_i64: ; CHECK-LABEL: i32_wrap_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.wrap/i64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.wrap/i64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_wrap_i64(i64 %x) { define i32 @i32_wrap_i64(i64 %x) {
%a = trunc i64 %x to i32 %a = trunc i64 %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i64_extend_s_i32: ; CHECK-LABEL: i64_extend_s_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.extend_s/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_extend_s_i32(i32 %x) { define i64 @i64_extend_s_i32(i32 %x) {
%a = sext i32 %x to i64 %a = sext i32 %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_extend_u_i32: ; CHECK-LABEL: i64_extend_u_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.extend_u/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_extend_u_i32(i32 %x) { define i64 @i64_extend_u_i32(i32 %x) {
%a = zext i32 %x to i64 %a = zext i32 %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i32_trunc_s_f32: ; CHECK-LABEL: i32_trunc_s_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_s:sat/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_s_f32(float %x) { define i32 @i32_trunc_s_f32(float %x) {
%a = fptosi float %x to i32 %a = fptosi float %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_u_f32: ; CHECK-LABEL: i32_trunc_u_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_u:sat/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_u_f32(float %x) { define i32 @i32_trunc_u_f32(float %x) {
%a = fptoui float %x to i32 %a = fptoui float %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_s_f64: ; CHECK-LABEL: i32_trunc_s_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_s:sat/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_s_f64(double %x) { define i32 @i32_trunc_s_f64(double %x) {
%a = fptosi double %x to i32 %a = fptosi double %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_trunc_u_f64: ; CHECK-LABEL: i32_trunc_u_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.trunc_u:sat/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @i32_trunc_u_f64(double %x) { define i32 @i32_trunc_u_f64(double %x) {
%a = fptoui double %x to i32 %a = fptoui double %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i64_trunc_s_f32: ; CHECK-LABEL: i64_trunc_s_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_s:sat/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_s_f32(float %x) { define i64 @i64_trunc_s_f32(float %x) {
%a = fptosi float %x to i64 %a = fptosi float %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_u_f32: ; CHECK-LABEL: i64_trunc_u_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_u:sat/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_u_f32(float %x) { define i64 @i64_trunc_u_f32(float %x) {
%a = fptoui float %x to i64 %a = fptoui float %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_s_f64: ; CHECK-LABEL: i64_trunc_s_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_s:sat/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_s_f64(double %x) { define i64 @i64_trunc_s_f64(double %x) {
%a = fptosi double %x to i64 %a = fptosi double %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_trunc_u_f64: ; CHECK-LABEL: i64_trunc_u_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.trunc_u:sat/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_trunc_u_f64(double %x) { define i64 @i64_trunc_u_f64(double %x) {
%a = fptoui double %x to i64 %a = fptoui double %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: f32_convert_s_i32: ; CHECK-LABEL: f32_convert_s_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.convert_s/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @f32_convert_s_i32(i32 %x) { define float @f32_convert_s_i32(i32 %x) {
%a = sitofp i32 %x to float %a = sitofp i32 %x to float
ret float %a ret float %a
} }
; CHECK-LABEL: f32_convert_u_i32: ; CHECK-LABEL: f32_convert_u_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.convert_u/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @f32_convert_u_i32(i32 %x) { define float @f32_convert_u_i32(i32 %x) {
%a = uitofp i32 %x to float %a = uitofp i32 %x to float
ret float %a ret float %a
} }
; CHECK-LABEL: f64_convert_s_i32: ; CHECK-LABEL: f64_convert_s_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.convert_s/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @f64_convert_s_i32(i32 %x) { define double @f64_convert_s_i32(i32 %x) {
%a = sitofp i32 %x to double %a = sitofp i32 %x to double
ret double %a ret double %a
} }
; CHECK-LABEL: f64_convert_u_i32: ; CHECK-LABEL: f64_convert_u_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.convert_u/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @f64_convert_u_i32(i32 %x) { define double @f64_convert_u_i32(i32 %x) {
%a = uitofp i32 %x to double %a = uitofp i32 %x to double
ret double %a ret double %a
} }
; CHECK-LABEL: f32_convert_s_i64: ; CHECK-LABEL: f32_convert_s_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.convert_s/i64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @f32_convert_s_i64(i64 %x) { define float @f32_convert_s_i64(i64 %x) {
%a = sitofp i64 %x to float %a = sitofp i64 %x to float
ret float %a ret float %a
} }
; CHECK-LABEL: f32_convert_u_i64: ; CHECK-LABEL: f32_convert_u_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.convert_u/i64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @f32_convert_u_i64(i64 %x) { define float @f32_convert_u_i64(i64 %x) {
%a = uitofp i64 %x to float %a = uitofp i64 %x to float
ret float %a ret float %a
} }
; CHECK-LABEL: f64_convert_s_i64: ; CHECK-LABEL: f64_convert_s_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.convert_s/i64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @f64_convert_s_i64(i64 %x) { define double @f64_convert_s_i64(i64 %x) {
%a = sitofp i64 %x to double %a = sitofp i64 %x to double
ret double %a ret double %a
} }
; CHECK-LABEL: f64_convert_u_i64: ; CHECK-LABEL: f64_convert_u_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.convert_u/i64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @f64_convert_u_i64(i64 %x) { define double @f64_convert_u_i64(i64 %x) {
%a = uitofp i64 %x to double %a = uitofp i64 %x to double
ret double %a ret double %a
} }
; CHECK-LABEL: f64_promote_f32: ; CHECK-LABEL: f64_promote_f32:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.promote/f32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f64.promote/f32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @f64_promote_f32(float %x) { define double @f64_promote_f32(float %x) {
%a = fpext float %x to double %a = fpext float %x to double
ret double %a ret double %a
} }
; CHECK-LABEL: f32_demote_f64: ; CHECK-LABEL: f32_demote_f64:
; CHECK-NEXT: .param f64{{$}} ; CHECK-NEXT: .param f64{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.demote/f64 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: f32.demote/f64
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @f32_demote_f64(double %x) { define float @f32_demote_f64(double %x) {
%a = fptrunc double %x to float %a = fptrunc double %x to float
ret float %a ret float %a
} }
; If the high its are unused, LLVM will optimize sext/zext into anyext, which ; If the high its are unused, LLVM will optimize sext/zext into anyext, which
; we need to patterm-match back to a specific instruction. ; we need to patterm-match back to a specific instruction.
; CHECK-LABEL: anyext: ; CHECK-LABEL: anyext:
; CHECK: i64.extend_u/i32 $push0=, $0{{$}} ; CHECK: i64.extend_u/i32
define i64 @anyext(i32 %x) { define i64 @anyext(i32 %x) {
%y = sext i32 %x to i64 %y = sext i32 %x to i64
%w = shl i64 %y, 32 %w = shl i64 %y, 32
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: bitcast_i32_to_float: ; CHECK-LABEL: bitcast_i32_to_float:
; CHECK: f32.reinterpret/i32 $push0=, $0{{$}} ; CHECK: f32.reinterpret/i32
define float @bitcast_i32_to_float(i32 %a) { define float @bitcast_i32_to_float(i32 %a) {
%t = bitcast i32 %a to float %t = bitcast i32 %a to float
ret float %t ret float %t
} }
; CHECK-LABEL: bitcast_float_to_i32: ; CHECK-LABEL: bitcast_float_to_i32:
; CHECK: i32.reinterpret/f32 $push0=, $0{{$}} ; CHECK: i32.reinterpret/f32
define i32 @bitcast_float_to_i32(float %a) { define i32 @bitcast_float_to_i32(float %a) {
%t = bitcast float %a to i32 %t = bitcast float %a to i32
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: bitcast_i64_to_double: ; CHECK-LABEL: bitcast_i64_to_double:
; CHECK: f64.reinterpret/i64 $push0=, $0{{$}} ; CHECK: f64.reinterpret/i64
define double @bitcast_i64_to_double(i64 %a) { define double @bitcast_i64_to_double(i64 %a) {
%t = bitcast i64 %a to double %t = bitcast i64 %a to double
ret double %t ret double %t
} }
; CHECK-LABEL: bitcast_double_to_i64: ; CHECK-LABEL: bitcast_double_to_i64:
; CHECK: i64.reinterpret/f64 $push0=, $0{{$}} ; CHECK: i64.reinterpret/f64
define i64 @bitcast_double_to_i64(double %a) { define i64 @bitcast_double_to_i64(double %a) {
%t = bitcast double %a to i64 %t = bitcast double %a to i64
ret i64 %t ret i64 %t
} }

test/CodeGen/WebAssembly/copysign-casts.ll

; RUN: llc < %s -asm-verbose=false | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get
; unfolded. ; unfolded.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare double @copysign(double, double) nounwind readnone declare double @copysign(double, double) nounwind readnone
declare float @copysignf(float, float) nounwind readnone declare float @copysignf(float, float) nounwind readnone
; CHECK-LABEL: fold_promote: ; CHECK-LABEL: fold_promote:
; CHECK: f64.promote/f32 $push0=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.promote/f32{{$}}
; CHECK: f64.copysign $push1=, $pop{{[0-9]+}}, $pop0{{$}} ; CHECK: f64.copysign{{$}}
define double @fold_promote(double %a, float %b) { define double @fold_promote(double %a, float %b) {
%c = fpext float %b to double %c = fpext float %b to double
%t = call double @copysign(double %a, double %c) %t = call double @copysign(double %a, double %c)
ret double %t ret double %t
} }
; CHECK-LABEL: fold_demote:{{$}} ; CHECK-LABEL: fold_demote:{{$}}
; CHECK: f32.demote/f64 $push0=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.demote/f64{{$}}
; CHECK: f32.copysign $push1=, $pop{{[0-9]+}}, $pop0{{$}} ; CHECK: f32.copysign{{$}}
define float @fold_demote(float %a, double %b) { define float @fold_demote(float %a, double %b) {
%c = fptrunc double %b to float %c = fptrunc double %b to float
%t = call float @copysignf(float %a, float %c) %t = call float @copysignf(float %a, float %c)
ret float %t ret float %t
} }

test/CodeGen/WebAssembly/exception.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -exception-model=wasm | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -exception-model=wasm | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
%struct.Cleanup = type { i8 } %struct.Cleanup = type { i8 }
@_ZTIi = external constant i8* @_ZTIi = external constant i8*
declare void @llvm.wasm.throw(i32, i8*) declare void @llvm.wasm.throw(i32, i8*)
; CHECK-LABEL: test_throw: ; CHECK-LABEL: test_throw:
; CHECK-NEXT: i32.const $push0=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: throw 0, $pop0 ; CHECK-NEXT: throw 0
define void @test_throw() { define void @test_throw() {
call void @llvm.wasm.throw(i32 0, i8* null) call void @llvm.wasm.throw(i32 0, i8* null)
ret void ret void
} }
; CHECK-LABEL: test_catch_rethrow: ; CHECK-LABEL: test_catch_rethrow:
; CHECK: call foo@FUNCTION ; CHECK: call foo@FUNCTION
; CHECK: i32.catch $push{{.+}}=, 0 ; CHECK: i32.catch 0
; CHECK-DAG: i32.store __wasm_lpad_context ; CHECK-DAG: i32.store __wasm_lpad_context
; CHECK-DAG: i32.store __wasm_lpad_context+4 ; CHECK-DAG: i32.store __wasm_lpad_context+4
; CHECK: i32.call $push{{.+}}=, _Unwind_CallPersonality@FUNCTION ; CHECK: i32.call _Unwind_CallPersonality@FUNCTION
; CHECK: i32.call $push{{.+}}=, __cxa_begin_catch@FUNCTION ; CHECK: i32.call __cxa_begin_catch@FUNCTION
; CHECK: call __cxa_end_catch@FUNCTION ; CHECK: call __cxa_end_catch@FUNCTION
; CHECK: call __cxa_rethrow@FUNCTION ; CHECK: call __cxa_rethrow@FUNCTION
; CHECK-NEXT: rethrow ; CHECK-NEXT: rethrow
define void @test_catch_rethrow() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) { define void @test_catch_rethrow() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
entry: entry:
invoke void @foo() invoke void @foo()
to label %try.cont unwind label %catch.dispatch to label %try.cont unwind label %catch.dispatch
Show All 19 Lines
try.cont: ; preds = %entry, %catch try.cont: ; preds = %entry, %catch
ret void ret void
} }
; CHECK-LABEL: test_cleanup: ; CHECK-LABEL: test_cleanup:
; CHECK: call foo@FUNCTION ; CHECK: call foo@FUNCTION
; CHECK: catch_all ; CHECK: catch_all
; CHECK: i32.call $push20=, _ZN7CleanupD1Ev@FUNCTION ; CHECK: i32.call _ZN7CleanupD1Ev@FUNCTION
; CHECK: rethrow ; CHECK: rethrow
define void @test_cleanup() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) { define void @test_cleanup() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
entry: entry:
%c = alloca %struct.Cleanup, align 1 %c = alloca %struct.Cleanup, align 1
invoke void @foo() invoke void @foo()
to label %invoke.cont unwind label %ehcleanup to label %invoke.cont unwind label %ehcleanup
invoke.cont: ; preds = %entry invoke.cont: ; preds = %entry
▲ Show 20 Lines • Show All 88 Lines • Show Last 20 Lines

test/CodeGen/WebAssembly/explicit-locals.mir

Show All 11 Lines
body: | body: |
bb.0: bb.0:
successors: %bb.1 successors: %bb.1
liveins: $arguments liveins: $arguments
bb.1: bb.1:
; predecessors: %bb.0 ; predecessors: %bb.0
; CHECK-NOT: dead %{{[0-9]+}} ; CHECK-NOT: dead %{{[0-9]+}}
; CHECK: DROP_I32 killed %{{[0-9]+}} ; CHECK: DROP_I32_S killed %{{[0-9]+}}
dead %0:i32 = CONST_I32 0, implicit-def dead $arguments, implicit $sp32, implicit $sp64 dead %0:i32 = CONST_I32 0, implicit-def dead $arguments, implicit $sp32, implicit $sp64
RETURN_VOID implicit-def dead $arguments RETURN_VOID implicit-def dead $arguments
... ...

test/CodeGen/WebAssembly/f16.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel | FileCheck %s
; Test that f16 is expanded. ; Test that f16 is expanded.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: demote: ; CHECK-LABEL: demote:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.call $push[[L1:[0-9]+]]=, __gnu_f2h_ieee@FUNCTION, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.call __gnu_f2h_ieee@FUNCTION{{$}}
; CHECK-NEXT: f32.call $push[[L2:[0-9]+]]=, __gnu_h2f_ieee@FUNCTION, $pop[[L1]]{{$}} ; CHECK-NEXT: f32.call __gnu_h2f_ieee@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[L2]]{{$}} ; CHECK-NEXT: return {{$}}
define half @demote(float %f) { define half @demote(float %f) {
%t = fptrunc float %f to half %t = fptrunc float %f to half
ret half %t ret half %t
} }
; CHECK-LABEL: promote: ; CHECK-LABEL: promote:
; CHECK-NEXT: .param f32{{$}} ; CHECK-NEXT: .param f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: get_local $push0=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define float @promote(half %f) { define float @promote(half %f) {
%t = fpext half %f to float %t = fpext half %f to float
ret float %t ret float %t
} }

test/CodeGen/WebAssembly/f32.ll

Show All 12 Lines
declare float @llvm.trunc.f32(float) declare float @llvm.trunc.f32(float)
declare float @llvm.nearbyint.f32(float) declare float @llvm.nearbyint.f32(float)
declare float @llvm.rint.f32(float) declare float @llvm.rint.f32(float)
declare float @llvm.fma.f32(float, float, float) declare float @llvm.fma.f32(float, float, float)
; CHECK-LABEL: fadd32: ; CHECK-LABEL: fadd32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f32.add {{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fadd32(float %x, float %y) { define float @fadd32(float %x, float %y) {
%a = fadd float %x, %y %a = fadd float %x, %y
ret float %a ret float %a
} }
; CHECK-LABEL: fsub32: ; CHECK-LABEL: fsub32:
; CHECK: f32.sub $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f32.sub{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fsub32(float %x, float %y) { define float @fsub32(float %x, float %y) {
%a = fsub float %x, %y %a = fsub float %x, %y
ret float %a ret float %a
} }
; CHECK-LABEL: fmul32: ; CHECK-LABEL: fmul32:
; CHECK: f32.mul $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f32.mul{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fmul32(float %x, float %y) { define float @fmul32(float %x, float %y) {
%a = fmul float %x, %y %a = fmul float %x, %y
ret float %a ret float %a
} }
; CHECK-LABEL: fdiv32: ; CHECK-LABEL: fdiv32:
; CHECK: f32.div $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f32.div{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fdiv32(float %x, float %y) { define float @fdiv32(float %x, float %y) {
%a = fdiv float %x, %y %a = fdiv float %x, %y
ret float %a ret float %a
} }
; CHECK-LABEL: fabs32: ; CHECK-LABEL: fabs32:
; CHECK: f32.abs $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.abs{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fabs32(float %x) { define float @fabs32(float %x) {
%a = call float @llvm.fabs.f32(float %x) %a = call float @llvm.fabs.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: fneg32: ; CHECK-LABEL: fneg32:
; CHECK: f32.neg $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.neg{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fneg32(float %x) { define float @fneg32(float %x) {
%a = fsub float -0., %x %a = fsub float -0., %x
ret float %a ret float %a
} }
; CHECK-LABEL: copysign32: ; CHECK-LABEL: copysign32:
; CHECK: f32.copysign $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f32.copysign{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @copysign32(float %x, float %y) { define float @copysign32(float %x, float %y) {
%a = call float @llvm.copysign.f32(float %x, float %y) %a = call float @llvm.copysign.f32(float %x, float %y)
ret float %a ret float %a
} }
; CHECK-LABEL: sqrt32: ; CHECK-LABEL: sqrt32:
; CHECK: f32.sqrt $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.sqrt{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @sqrt32(float %x) { define float @sqrt32(float %x) {
%a = call float @llvm.sqrt.f32(float %x) %a = call float @llvm.sqrt.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: ceil32: ; CHECK-LABEL: ceil32:
; CHECK: f32.ceil $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.ceil{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @ceil32(float %x) { define float @ceil32(float %x) {
%a = call float @llvm.ceil.f32(float %x) %a = call float @llvm.ceil.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: floor32: ; CHECK-LABEL: floor32:
; CHECK: f32.floor $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.floor{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @floor32(float %x) { define float @floor32(float %x) {
%a = call float @llvm.floor.f32(float %x) %a = call float @llvm.floor.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: trunc32: ; CHECK-LABEL: trunc32:
; CHECK: f32.trunc $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.trunc{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @trunc32(float %x) { define float @trunc32(float %x) {
%a = call float @llvm.trunc.f32(float %x) %a = call float @llvm.trunc.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: nearest32: ; CHECK-LABEL: nearest32:
; CHECK: f32.nearest $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.nearest{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @nearest32(float %x) { define float @nearest32(float %x) {
%a = call float @llvm.nearbyint.f32(float %x) %a = call float @llvm.nearbyint.f32(float %x)
ret float %a ret float %a
} }
; CHECK-LABEL: nearest32_via_rint: ; CHECK-LABEL: nearest32_via_rint:
; CHECK: f32.nearest $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f32.nearest{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @nearest32_via_rint(float %x) { define float @nearest32_via_rint(float %x) {
%a = call float @llvm.rint.f32(float %x) %a = call float @llvm.rint.f32(float %x)
ret float %a ret float %a
} }
; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in ; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in
; cases where there's a single fcmp with a select and it can prove that one ; cases where there's a single fcmp with a select and it can prove that one
; of the arms is never NaN, so we only test that case. In the future if LLVM ; of the arms is never NaN, so we only test that case. In the future if LLVM
; learns to form fminnan/fmaxnan in more cases, we can write more general ; learns to form fminnan/fmaxnan in more cases, we can write more general
; tests. ; tests.
; CHECK-LABEL: fmin32: ; CHECK-LABEL: fmin32:
; CHECK: f32.min $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}} ; CHECK: f32.min{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define float @fmin32(float %x) { define float @fmin32(float %x) {
%a = fcmp ult float %x, 0.0 %a = fcmp ult float %x, 0.0
%b = select i1 %a, float %x, float 0.0 %b = select i1 %a, float %x, float 0.0
ret float %b ret float %b
} }
; CHECK-LABEL: fmax32: ; CHECK-LABEL: fmax32:
; CHECK: f32.max $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}} ; CHECK: f32.max{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define float @fmax32(float %x) { define float @fmax32(float %x) {
%a = fcmp ugt float %x, 0.0 %a = fcmp ugt float %x, 0.0
%b = select i1 %a, float %x, float 0.0 %b = select i1 %a, float %x, float 0.0
ret float %b ret float %b
} }
; CHECK-LABEL: fma32: ; CHECK-LABEL: fma32:
; CHECK: {{^}} f32.call $push[[LR:[0-9]+]]=, fmaf@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: {{^}} f32.call fmaf@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define float @fma32(float %a, float %b, float %c) { define float @fma32(float %a, float %b, float %c) {
%d = call float @llvm.fma.f32(float %a, float %b, float %c) %d = call float @llvm.fma.f32(float %a, float %b, float %c)
ret float %d ret float %d
} }

test/CodeGen/WebAssembly/f64.ll

Show All 12 Lines
declare double @llvm.trunc.f64(double) declare double @llvm.trunc.f64(double)
declare double @llvm.nearbyint.f64(double) declare double @llvm.nearbyint.f64(double)
declare double @llvm.rint.f64(double) declare double @llvm.rint.f64(double)
declare double @llvm.fma.f64(double, double, double) declare double @llvm.fma.f64(double, double, double)
; CHECK-LABEL: fadd64: ; CHECK-LABEL: fadd64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: f64.add {{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fadd64(double %x, double %y) { define double @fadd64(double %x, double %y) {
%a = fadd double %x, %y %a = fadd double %x, %y
ret double %a ret double %a
} }
; CHECK-LABEL: fsub64: ; CHECK-LABEL: fsub64:
; CHECK: f64.sub $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f64.sub{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fsub64(double %x, double %y) { define double @fsub64(double %x, double %y) {
%a = fsub double %x, %y %a = fsub double %x, %y
ret double %a ret double %a
} }
; CHECK-LABEL: fmul64: ; CHECK-LABEL: fmul64:
; CHECK: f64.mul $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f64.mul{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fmul64(double %x, double %y) { define double @fmul64(double %x, double %y) {
%a = fmul double %x, %y %a = fmul double %x, %y
ret double %a ret double %a
} }
; CHECK-LABEL: fdiv64: ; CHECK-LABEL: fdiv64:
; CHECK: f64.div $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f64.div{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fdiv64(double %x, double %y) { define double @fdiv64(double %x, double %y) {
%a = fdiv double %x, %y %a = fdiv double %x, %y
ret double %a ret double %a
} }
; CHECK-LABEL: fabs64: ; CHECK-LABEL: fabs64:
; CHECK: f64.abs $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.abs{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fabs64(double %x) { define double @fabs64(double %x) {
%a = call double @llvm.fabs.f64(double %x) %a = call double @llvm.fabs.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: fneg64: ; CHECK-LABEL: fneg64:
; CHECK: f64.neg $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.neg{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fneg64(double %x) { define double @fneg64(double %x) {
%a = fsub double -0., %x %a = fsub double -0., %x
ret double %a ret double %a
} }
; CHECK-LABEL: copysign64: ; CHECK-LABEL: copysign64:
; CHECK: f64.copysign $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f64.copysign{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @copysign64(double %x, double %y) { define double @copysign64(double %x, double %y) {
%a = call double @llvm.copysign.f64(double %x, double %y) %a = call double @llvm.copysign.f64(double %x, double %y)
ret double %a ret double %a
} }
; CHECK-LABEL: sqrt64: ; CHECK-LABEL: sqrt64:
; CHECK: f64.sqrt $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.sqrt{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @sqrt64(double %x) { define double @sqrt64(double %x) {
%a = call double @llvm.sqrt.f64(double %x) %a = call double @llvm.sqrt.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: ceil64: ; CHECK-LABEL: ceil64:
; CHECK: f64.ceil $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.ceil{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @ceil64(double %x) { define double @ceil64(double %x) {
%a = call double @llvm.ceil.f64(double %x) %a = call double @llvm.ceil.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: floor64: ; CHECK-LABEL: floor64:
; CHECK: f64.floor $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.floor{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @floor64(double %x) { define double @floor64(double %x) {
%a = call double @llvm.floor.f64(double %x) %a = call double @llvm.floor.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: trunc64: ; CHECK-LABEL: trunc64:
; CHECK: f64.trunc $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.trunc{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @trunc64(double %x) { define double @trunc64(double %x) {
%a = call double @llvm.trunc.f64(double %x) %a = call double @llvm.trunc.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: nearest64: ; CHECK-LABEL: nearest64:
; CHECK: f64.nearest $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.nearest{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @nearest64(double %x) { define double @nearest64(double %x) {
%a = call double @llvm.nearbyint.f64(double %x) %a = call double @llvm.nearbyint.f64(double %x)
ret double %a ret double %a
} }
; CHECK-LABEL: nearest64_via_rint: ; CHECK-LABEL: nearest64_via_rint:
; CHECK: f64.nearest $push[[LR:[0-9]+]]=, $pop{{[0-9]+}}{{$}} ; CHECK: f64.nearest{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @nearest64_via_rint(double %x) { define double @nearest64_via_rint(double %x) {
%a = call double @llvm.rint.f64(double %x) %a = call double @llvm.rint.f64(double %x)
ret double %a ret double %a
} }
; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in ; Min and max tests. LLVM currently only forms fminnan and fmaxnan nodes in
; cases where there's a single fcmp with a select and it can prove that one ; cases where there's a single fcmp with a select and it can prove that one
; of the arms is never NaN, so we only test that case. In the future if LLVM ; of the arms is never NaN, so we only test that case. In the future if LLVM
; learns to form fminnan/fmaxnan in more cases, we can write more general ; learns to form fminnan/fmaxnan in more cases, we can write more general
; tests. ; tests.
; CHECK-LABEL: fmin64: ; CHECK-LABEL: fmin64:
; CHECK: f64.min $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}} ; CHECK: f64.min{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define double @fmin64(double %x) { define double @fmin64(double %x) {
%a = fcmp ult double %x, 0.0 %a = fcmp ult double %x, 0.0
%b = select i1 %a, double %x, double 0.0 %b = select i1 %a, double %x, double 0.0
ret double %b ret double %b
} }
; CHECK-LABEL: fmax64: ; CHECK-LABEL: fmax64:
; CHECK: f64.max $push1=, $pop{{[0-9]+}}, $pop[[LR]]{{$}} ; CHECK: f64.max{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define double @fmax64(double %x) { define double @fmax64(double %x) {
%a = fcmp ugt double %x, 0.0 %a = fcmp ugt double %x, 0.0
%b = select i1 %a, double %x, double 0.0 %b = select i1 %a, double %x, double 0.0
ret double %b ret double %b
} }
; CHECK-LABEL: fma64: ; CHECK-LABEL: fma64:
; CHECK: {{^}} f64.call $push[[LR:[0-9]+]]=, fma@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: {{^}} f64.call fma@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[LR]]{{$}} ; CHECK-NEXT: return{{$}}
define double @fma64(double %a, double %b, double %c) { define double @fma64(double %a, double %b, double %c) {
%d = call double @llvm.fma.f64(double %a, double %b, double %c) %d = call double @llvm.fma.f64(double %a, double %b, double %c)
ret double %d ret double %d
} }

test/CodeGen/WebAssembly/fast-isel-br-i1.ll

; RUN: llc < %s -fast-isel -asm-verbose=false | FileCheck %s ; RUN: llc < %s -fast-isel -asm-verbose=false | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Fast-isel uses a 32-bit xor with -1 to negate i1 values, because it doesn't ; Fast-isel uses a 32-bit xor with -1 to negate i1 values, because it doesn't
; make any guarantees about the contents of the high bits of a register holding ; make any guarantees about the contents of the high bits of a register holding
; an i1 value. Test that when we do a `br_if` or `br_unless` with what what an ; an i1 value. Test that when we do a `br_if` or `br_unless` with what what an
; i1 value in LLVM IR, that we only test the low bit. ; i1 value in LLVM IR, that we only test the low bit.
; CHECK: i32.xor ; CHECK: i32.xor
; CHECK: i32.const $push[[L0:[0-9]+]]=, 1{{$}} ; CHECK: i32.const 1{{$}}
; CHECK: i32.and $push[[L1:[0-9]+]]=, $pop{{[0-9]+}}, $pop[[L0]]{{$}} ; CHECK: i32.and
; CHECK: br_if 0, $pop[[L1]]{{$}} ; CHECK: br_if 0{{$}}
; CHECK: i32.xor ; CHECK: i32.xor
; CHECK: i32.const $push[[L2:[0-9]+]]=, 1{{$}} ; CHECK: i32.const 1{{$}}
; CHECK: i32.and $push[[L3:[0-9]+]]=, $pop{{[0-9]+}}, $pop[[L2]]{{$}} ; CHECK: i32.and
; CHECK: br_if 0, $pop[[L3]]{{$}} ; CHECK: br_if 0{{$}}
define void @test() { define void @test() {
start: start:
%0 = call i32 @return_one() %0 = call i32 @return_one()
br label %bb1 br label %bb1
bb1: bb1:
%1 = icmp eq i32 %0, 1 %1 = icmp eq i32 %0, 1
Show All 21 Lines

test/CodeGen/WebAssembly/fast-isel-i24.ll

; RUN: llc < %s -O0 ; RUN: llc < %s -O0
; PR36564 ; PR36564
; PR37546 ; PR37546
; Test that fast-isel properly copes with i24 arguments and return types. ; Test that fast-isel properly copes with i24 arguments and return types.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: add: ; CHECK-LABEL: add:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push2=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push1=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.add $push0=, $pop2, $pop1{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
define i24 @add(i24 %x, i24 %y) { define i24 @add(i24 %x, i24 %y) {
%z = add i24 %x, %y %z = add i24 %x, %y
ret i24 %z ret i24 %z
} }
; CHECK-LABEL: return_zero: ; CHECK-LABEL: return_zero:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
define i24 @return_zero() { define i24 @return_zero() {
ret i24 0 ret i24 0
} }

test/CodeGen/WebAssembly/fast-isel-noreg.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -asm-verbose=false -fast-isel -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -fast-isel -verify-machineinstrs | FileCheck %s
; Test that FastISel does not generate instructions with NoReg ; Test that FastISel does not generate instructions with NoReg
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK: i32.const $push0=, 0 ; CHECK: i32.const 0
define hidden i32 @a() #0 { define hidden i32 @a() #0 {
entry: entry:
ret i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32) ret i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32)
} }
; CHECK: i32.const $push0=, 1 ; CHECK: i32.const 1
; CHECK: br_if 0, $pop0 ; CHECK: br_if 0
define hidden i32 @b() #0 { define hidden i32 @b() #0 {
entry: entry:
br i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null), label %a, label %b br i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null), label %a, label %b
a: a:
unreachable unreachable
b: b:
ret i32 0 ret i32 0
} }
; CHECK: i32.const $push1=, 0 ; CHECK: i32.const 0
; CHECK: i32.const $push2=, 0 ; CHECK: i32.const 0
; CHECK: i32.store 0($pop1), $pop2 ; CHECK: i32.store 0
define hidden i32 @c() #0 { define hidden i32 @c() #0 {
entry: entry:
store i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32), i32* inttoptr (i32 0 to i32 *) store i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32), i32* inttoptr (i32 0 to i32 *)
ret i32 0 ret i32 0
} }
; CHECK: i32.const {{.*}}, addr@FUNCTION ; CHECK: i32.const {{.*}}, addr@FUNCTION
; CHECK: i32.const {{.*}}, 24 ; CHECK: i32.const {{.*}}, 24
; CHECK: i32.shl ; CHECK: i32.shl
; CHECK: i32.const {{.*}}, 24 ; CHECK: i32.const {{.*}}, 24
; CHECK: i32.shr_s ; CHECK: i32.shr_s
; CHECK: i32.const {{.*}}, 64 ; CHECK: i32.const {{.*}}, 64
; CHECK: br_if 0, $pop0 ; CHECK: br_if 0
define hidden i32 @d() #0 { define hidden i32 @d() #0 {
entry: entry:
%t = icmp slt i8 ptrtoint (void ()* @addr to i8), 64 %t = icmp slt i8 ptrtoint (void ()* @addr to i8), 64
br i1 %t, label %a, label %b br i1 %t, label %a, label %b
a: a:
unreachable unreachable
b: b:
ret i32 0 ret i32 0
} }
; CHECK: i32.const {{.*}}, addr@FUNCTION ; CHECK: i32.const {{.*}}, addr@FUNCTION
; CHECK: i32.const {{.*}}, 255 ; CHECK: i32.const {{.*}}, 255
; CHECK: i32.and ; CHECK: i32.and
; CHECK: i32.const {{.*}}, 64 ; CHECK: i32.const {{.*}}, 64
; CHECK: br_if 0, $pop0 ; CHECK: br_if 0
define hidden i32 @e() #0 { define hidden i32 @e() #0 {
entry: entry:
%t = icmp ult i8 ptrtoint (void ()* @addr to i8), 64 %t = icmp ult i8 ptrtoint (void ()* @addr to i8), 64
br i1 %t, label %a, label %b br i1 %t, label %a, label %b
a: a:
unreachable unreachable
b: b:
ret i32 0 ret i32 0
Show All 25 Lines

test/CodeGen/WebAssembly/fast-isel.ll

; RUN: llc < %s -asm-verbose=false \ ; RUN: llc < %s -asm-verbose=false \
; RUN: -fast-isel -fast-isel-abort=1 -verify-machineinstrs \ ; RUN: -fast-isel -fast-isel-abort=1 -verify-machineinstrs \
; RUN: -disable-wasm-explicit-locals \
; RUN: | FileCheck %s ; RUN: | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; This tests very minimal fast-isel functionality. ; This tests very minimal fast-isel functionality.
; CHECK-LABEL: immediate_f32: ; CHECK-LABEL: immediate_f32:
; CHECK: f32.const $push{{[0-9]+}}=, 0x1.4p1{{$}} ; CHECK: f32.const 0x1.4p1{{$}}
define float @immediate_f32() { define float @immediate_f32() {
ret float 2.5 ret float 2.5
} }
; CHECK-LABEL: immediate_f64: ; CHECK-LABEL: immediate_f64:
; CHECK: f64.const $push{{[0-9]+}}=, 0x1.4p1{{$}} ; CHECK: f64.const 0x1.4p1{{$}}
define double @immediate_f64() { define double @immediate_f64() {
ret double 2.5 ret double 2.5
} }
; CHECK-LABEL: bitcast_i32_f32: ; CHECK-LABEL: bitcast_i32_f32:
; CHECK: i32.reinterpret/f32 $push{{[0-9]+}}=, $0{{$}} ; CHECK: i32.reinterpret/f32
define i32 @bitcast_i32_f32(float %x) { define i32 @bitcast_i32_f32(float %x) {
%y = bitcast float %x to i32 %y = bitcast float %x to i32
ret i32 %y ret i32 %y
} }
; CHECK-LABEL: bitcast_f32_i32: ; CHECK-LABEL: bitcast_f32_i32:
; CHECK: f32.reinterpret/i32 $push{{[0-9]+}}=, $0{{$}} ; CHECK: f32.reinterpret/i32
define float @bitcast_f32_i32(i32 %x) { define float @bitcast_f32_i32(i32 %x) {
%y = bitcast i32 %x to float %y = bitcast i32 %x to float
ret float %y ret float %y
} }
; CHECK-LABEL: bitcast_i64_f64: ; CHECK-LABEL: bitcast_i64_f64:
; CHECK: i64.reinterpret/f64 $push{{[0-9]+}}=, $0{{$}} ; CHECK: i64.reinterpret/f64
define i64 @bitcast_i64_f64(double %x) { define i64 @bitcast_i64_f64(double %x) {
%y = bitcast double %x to i64 %y = bitcast double %x to i64
ret i64 %y ret i64 %y
} }
; CHECK-LABEL: bitcast_f64_i64: ; CHECK-LABEL: bitcast_f64_i64:
; CHECK: f64.reinterpret/i64 $push{{[0-9]+}}=, $0{{$}} ; CHECK: f64.reinterpret/i64
define double @bitcast_f64_i64(i64 %x) { define double @bitcast_f64_i64(i64 %x) {
%y = bitcast i64 %x to double %y = bitcast i64 %x to double
ret double %y ret double %y
} }
; Do fold offsets into geps. ; Do fold offsets into geps.
; CHECK-LABEL: do_fold_offset_into_gep: ; CHECK-LABEL: do_fold_offset_into_gep:
; CHECK: i64.load $push{{[0-9]+}}=, 8($0) ; CHECK: i64.load 8
define i64 @do_fold_offset_into_gep(i64* %p) { define i64 @do_fold_offset_into_gep(i64* %p) {
bb: bb:
%tmp = getelementptr inbounds i64, i64* %p, i32 1 %tmp = getelementptr inbounds i64, i64* %p, i32 1
%tmp2 = load i64, i64* %tmp, align 8 %tmp2 = load i64, i64* %tmp, align 8
ret i64 %tmp2 ret i64 %tmp2
} }
; Don't fold negative offsets into geps. ; Don't fold negative offsets into geps.
; CHECK-LABEL: dont_fold_negative_offset: ; CHECK-LABEL: dont_fold_negative_offset:
; CHECK: i64.load $push{{[0-9]+}}=, 0($pop{{[0-9]+}}) ; CHECK: i64.load 0
define i64 @dont_fold_negative_offset(i64* %p) { define i64 @dont_fold_negative_offset(i64* %p) {
bb: bb:
%tmp = getelementptr inbounds i64, i64* %p, i32 -1 %tmp = getelementptr inbounds i64, i64* %p, i32 -1
%tmp2 = load i64, i64* %tmp, align 8 %tmp2 = load i64, i64* %tmp, align 8
ret i64 %tmp2 ret i64 %tmp2
} }
; Don't fold non-inbounds geps. ; Don't fold non-inbounds geps.
; CHECK-LABEL: dont_fold_non_inbounds_gep: ; CHECK-LABEL: dont_fold_non_inbounds_gep:
; CHECK: i64.load $push{{[0-9]+}}=, 0($pop{{[0-9]+}}) ; CHECK: i64.load 0
define i64 @dont_fold_non_inbounds_gep(i64* %p) { define i64 @dont_fold_non_inbounds_gep(i64* %p) {
bb: bb:
%tmp = getelementptr i64, i64* %p, i32 1 %tmp = getelementptr i64, i64* %p, i32 1
%tmp2 = load i64, i64* %tmp, align 8 %tmp2 = load i64, i64* %tmp, align 8
ret i64 %tmp2 ret i64 %tmp2
} }

test/CodeGen/WebAssembly/frem.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that the frem instruction works. ; Test that the frem instruction works.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: frem32: ; CHECK-LABEL: frem32:
; CHECK-NEXT: .param f32, f32{{$}} ; CHECK-NEXT: .param f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: {{^}} f32.call $push0=, fmodf@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: {{^}} f32.call fmodf@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define float @frem32(float %x, float %y) { define float @frem32(float %x, float %y) {
%a = frem float %x, %y %a = frem float %x, %y
ret float %a ret float %a
} }
; CHECK-LABEL: frem64: ; CHECK-LABEL: frem64:
; CHECK-NEXT: .param f64, f64{{$}} ; CHECK-NEXT: .param f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: {{^}} f64.call $push0=, fmod@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: {{^}} f64.call fmod@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define double @frem64(double %x, double %y) { define double @frem64(double %x, double %y) {
%a = frem double %x, %y %a = frem double %x, %y
ret double %a ret double %a
} }

test/CodeGen/WebAssembly/func.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic functions assemble as expected. ; Test that basic functions assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: f0: ; CHECK-LABEL: f0:
; CHECK: return{{$}} ; CHECK: return{{$}}
; CHECK: end_function{{$}} ; CHECK: end_function{{$}}
; CHECK: .size f0, ; CHECK: .size f0,
define void @f0() { define void @f0() {
ret void ret void
} }
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK: .size f1, ; CHECK: .size f1,
define i32 @f1() { define i32 @f1() {
ret i32 0 ret i32 0
} }
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK-NEXT: .param i32, f32{{$}} ; CHECK-NEXT: .param i32, f32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK: .size f2, ; CHECK: .size f2,
define i32 @f2(i32 %p1, float %p2) { define i32 @f2(i32 %p1, float %p2) {
ret i32 0 ret i32 0
} }
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK-NEXT: .param i32, f32{{$}} ; CHECK-NEXT: .param i32, f32{{$}}
; CHECK-NOT: local ; CHECK-NOT: local
Show All 27 Lines

test/CodeGen/WebAssembly/function-bitcasts-varargs.ll

Show All 11 Linesentry:
call void(...) bitcast (void (i32, i32)* @specified to void (...)*)(i32 0, i32 1) call void(...) bitcast (void (i32, i32)* @specified to void (...)*)(i32 0, i32 1)
ret void ret void
} }
declare void @underspecified(...) declare void @underspecified(...)
declare void @specified(i32, i32) declare void @specified(i32, i32)
; CHECK: callWithArgs: ; CHECK: callWithArgs:
; CHECK: i32.const $push1=, 0 ; CHECK: i32.const 0
; CHECK-NEXT: i32.const $push0=, 1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: call .Lbitcast@FUNCTION, $pop1, $pop0 ; CHECK-NEXT: call .Lbitcast@FUNCTION
; CHECK: call .Lbitcast.1@FUNCTION, $pop{{[0-9]+$}} ; CHECK: call .Lbitcast.1@FUNCTION
; CHECK: .Lbitcast: ; CHECK: .Lbitcast:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK: call underspecified@FUNCTION, $pop{{[0-9]+$}} ; CHECK: call underspecified@FUNCTION
; CHECK: .Lbitcast.1: ; CHECK: .Lbitcast.1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK: call specified@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+$}} ; CHECK: call specified@FUNCTION

test/CodeGen/WebAssembly/function-bitcasts.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals -enable-emscripten-cxx-exceptions -wasm-temporary-workarounds=false | FileCheck %s ; RUN: llc < %s -asm-verbose=false -enable-emscripten-cxx-exceptions -wasm-temporary-workarounds=false | FileCheck %s
; Test that function pointer casts are replaced with wrappers. ; Test that function pointer casts are replaced with wrappers.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare void @has_i32_arg(i32) declare void @has_i32_arg(i32)
declare i32 @has_i32_ret() declare i32 @has_i32_ret()
declare void @vararg(...) declare void @vararg(...)
declare void @plain(i32) declare void @plain(i32)
declare void @foo0() declare void @foo0()
declare void @foo1() declare void @foo1()
declare void @foo2() declare void @foo2()
declare void @foo3() declare void @foo3()
; CHECK-LABEL: test: ; CHECK-LABEL: test:
; CHECK-NEXT: call .Lbitcast@FUNCTION{{$}} ; CHECK-NEXT: call .Lbitcast@FUNCTION{{$}}
; CHECK-NEXT: call .Lbitcast@FUNCTION{{$}} ; CHECK-NEXT: call .Lbitcast@FUNCTION{{$}}
; CHECK-NEXT: call .Lbitcast.1@FUNCTION{{$}} ; CHECK-NEXT: call .Lbitcast.1@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: call .Lbitcast.4@FUNCTION, $pop[[L0]]{{$}} ; CHECK-NEXT: call .Lbitcast.4@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: call .Lbitcast.4@FUNCTION, $pop[[L1]]{{$}} ; CHECK-NEXT: call .Lbitcast.4@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: call .Lbitcast.4@FUNCTION, $pop[[L2]]{{$}} ; CHECK-NEXT: call .Lbitcast.4@FUNCTION{{$}}
; CHECK-NEXT: call foo0@FUNCTION ; CHECK-NEXT: call foo0@FUNCTION
; CHECK-NEXT: i32.call $drop=, .Lbitcast.5@FUNCTION{{$}} ; CHECK-NEXT: i32.call .Lbitcast.5@FUNCTION{{$}}
; CHECK-NEXT: call foo2@FUNCTION{{$}} ; CHECK-NEXT: call foo2@FUNCTION{{$}}
; CHECK-NEXT: call foo1@FUNCTION{{$}} ; CHECK-NEXT: call foo1@FUNCTION{{$}}
; CHECK-NEXT: call foo3@FUNCTION{{$}} ; CHECK-NEXT: call foo3@FUNCTION{{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
define void @test() { define void @test() {
entry: entry:
call void bitcast (void (i32)* @has_i32_arg to void ()*)() call void bitcast (void (i32)* @has_i32_arg to void ()*)()
call void bitcast (void (i32)* @has_i32_arg to void ()*)() call void bitcast (void (i32)* @has_i32_arg to void ()*)()
Show All 10 Linesentry:
call void @foo1() call void @foo1()
call void @foo3() call void @foo3()
ret void ret void
} }
; CHECK-LABEL: test_varargs: ; CHECK-LABEL: test_varargs:
; CHECK: set_global ; CHECK: set_global
; CHECK: i32.const $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: call .Lbitcast.2@FUNCTION, $pop[[L3]]{{$}} ; CHECK-NEXT: call .Lbitcast.2@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L4:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store 0($[[L5:[0-9]+]]), $pop[[L4]]{{$}} ; CHECK-NEXT: i32.store 0($[[L5:[0-9]+]]){{$}}
; CHECK-NEXT: call .Lbitcast.3@FUNCTION, $[[L5]]{{$}} ; CHECK-NEXT: call .Lbitcast.3@FUNCTION, $[[L5]]{{$}}
define void @test_varargs() { define void @test_varargs() {
call void bitcast (void (...)* @vararg to void (i32)*)(i32 0) call void bitcast (void (...)* @vararg to void (i32)*)(i32 0)
call void (...) bitcast (void (i32)* @plain to void (...)*)(i32 0) call void (...) bitcast (void (i32)* @plain to void (...)*)(i32 0)
ret void ret void
} }
; Don't use wrappers when the value is stored in memory ; Don't use wrappers when the value is stored in memory
@global_func = hidden local_unnamed_addr global void ()* null @global_func = hidden local_unnamed_addr global void ()* null
; CHECK-LABEL: test_store: ; CHECK-LABEL: test_store:
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, has_i32_ret@FUNCTION{{$}} ; CHECK-NEXT: i32.const has_i32_ret@FUNCTION{{$}}
; CHECK-NEXT: i32.store global_func($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK-NEXT: i32.store global_func{{$}}
define void @test_store() { define void @test_store() {
%1 = bitcast i32 ()* @has_i32_ret to void ()* %1 = bitcast i32 ()* @has_i32_ret to void ()*
store void ()* %1, void ()** @global_func store void ()* %1, void ()** @global_func
ret void ret void
} }
; CHECK-LABEL: test_load: ; CHECK-LABEL: test_load:
; CHECK-NEXT: result i32{{$}} ; CHECK-NEXT: result i32{{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.load $push[[L1:[0-9]+]]=, global_func($pop[[L0]]){{$}} ; CHECK-NEXT: i32.load global_func{{$}}
; CHECK-NEXT: i32.call_indirect $push{{[0-9]+}}=, $pop[[L1]]{{$}} ; CHECK-NEXT: i32.call_indirect{{$}}
define i32 @test_load() { define i32 @test_load() {
%1 = load i32 ()*, i32 ()** bitcast (void ()** @global_func to i32 ()**) %1 = load i32 ()*, i32 ()** bitcast (void ()** @global_func to i32 ()**)
%2 = call i32 %1() %2 = call i32 %1()
ret i32 %2 ret i32 %2
} }
; Don't use wrappers when the value is passed to a function call ; Don't use wrappers when the value is passed to a function call
declare void @call_func(i32 ()*) declare void @call_func(i32 ()*)
; CHECK-LABEL: test_argument: ; CHECK-LABEL: test_argument:
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, has_i32_ret@FUNCTION{{$}} ; CHECK-NEXT: i32.const has_i32_ret@FUNCTION{{$}}
; CHECK-NEXT: call call_func@FUNCTION, $pop[[L0]]{{$}} ; CHECK-NEXT: call call_func@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, has_i32_arg@FUNCTION{{$}} ; CHECK-NEXT: i32.const has_i32_arg@FUNCTION{{$}}
; CHECK-NEXT: call call_func@FUNCTION, $pop[[L1]]{{$}} ; CHECK-NEXT: call call_func@FUNCTION{{$}}
define void @test_argument() { define void @test_argument() {
call void @call_func(i32 ()* @has_i32_ret) call void @call_func(i32 ()* @has_i32_ret)
call void @call_func(i32 ()* bitcast (void (i32)* @has_i32_arg to i32 ()*)) call void @call_func(i32 ()* bitcast (void (i32)* @has_i32_arg to i32 ()*))
ret void ret void
} }
; Invokes should be treated like calls ; Invokes should be treated like calls
; CHECK-LABEL: test_invoke: ; CHECK-LABEL: test_invoke:
; CHECK: i32.const $push[[L1:[0-9]+]]=, call_func@FUNCTION{{$}} ; CHECK: i32.const call_func@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, has_i32_ret@FUNCTION{{$}} ; CHECK-NEXT: i32.const has_i32_ret@FUNCTION{{$}}
; CHECK-NEXT: call "__invoke_void_i32()*"@FUNCTION, $pop[[L1]], $pop[[L0]]{{$}} ; CHECK-NEXT: call "__invoke_void_i32()*"@FUNCTION{{$}}
; CHECK: i32.const $push[[L3:[0-9]+]]=, call_func@FUNCTION{{$}} ; CHECK: i32.const call_func@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, has_i32_arg@FUNCTION{{$}} ; CHECK-NEXT: i32.const has_i32_arg@FUNCTION{{$}}
; CHECK-NEXT: call "__invoke_void_i32()*"@FUNCTION, $pop[[L3]], $pop[[L2]]{{$}} ; CHECK-NEXT: call "__invoke_void_i32()*"@FUNCTION{{$}}
; CHECK: i32.const $push[[L4:[0-9]+]]=, .Lbitcast@FUNCTION{{$}} ; CHECK: i32.const .Lbitcast@FUNCTION{{$}}
; CHECK-NEXT: call __invoke_void@FUNCTION, $pop[[L4]]{{$}} ; CHECK-NEXT: call __invoke_void@FUNCTION{{$}}
declare i32 @personality(...) declare i32 @personality(...)
define void @test_invoke() personality i32 (...)* @personality { define void @test_invoke() personality i32 (...)* @personality {
entry: entry:
invoke void @call_func(i32 ()* @has_i32_ret) invoke void @call_func(i32 ()* @has_i32_ret)
to label %cont unwind label %lpad to label %cont unwind label %lpad
cont: cont:
invoke void @call_func(i32 ()* bitcast (void (i32)* @has_i32_arg to i32 ()*)) invoke void @call_func(i32 ()* bitcast (void (i32)* @has_i32_arg to i32 ()*))
to label %cont2 unwind label %lpad to label %cont2 unwind label %lpad
cont2: cont2:
invoke void bitcast (void (i32)* @has_i32_arg to void ()*)() invoke void bitcast (void (i32)* @has_i32_arg to void ()*)()
to label %end unwind label %lpad to label %end unwind label %lpad
lpad: lpad:
%0 = landingpad { i8*, i32 } %0 = landingpad { i8*, i32 }
catch i8* null catch i8* null
br label %end br label %end
end: end:
ret void ret void
} }
; CHECK-LABEL: .Lbitcast: ; CHECK-LABEL: .Lbitcast:
; CHECK-NEXT: call has_i32_arg@FUNCTION, $0{{$}} ; CHECK-NEXT: call has_i32_arg@FUNCTION{{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
; CHECK-LABEL: .Lbitcast.1: ; CHECK-LABEL: .Lbitcast.1:
; CHECK-NEXT: call $drop=, has_i32_ret@FUNCTION{{$}} ; CHECK-NEXT: call has_i32_ret@FUNCTION{{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
; CHECK-LABEL: .Lbitcast.2: ; CHECK-LABEL: .Lbitcast.2:
; CHECK: call vararg@FUNCTION, $1{{$}} ; CHECK: call vararg@FUNCTION{{$}}
; CHECK: end_function ; CHECK: end_function
; CHECK-LABEL: .Lbitcast.3: ; CHECK-LABEL: .Lbitcast.3:
; CHECK: call plain@FUNCTION, $1{{$}} ; CHECK: call plain@FUNCTION{{$}}
; CHECK: end_function ; CHECK: end_function
; CHECK-LABEL: .Lbitcast.4: ; CHECK-LABEL: .Lbitcast.4:
; CHECK-NEXT: .param i32 ; CHECK-NEXT: .param i32
; CHECK-NEXT: call foo0@FUNCTION{{$}} ; CHECK-NEXT: call foo0@FUNCTION{{$}}
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
; CHECK-LABEL: .Lbitcast.5: ; CHECK-LABEL: .Lbitcast.5:
; CHECK-NEXT: .result i32 ; CHECK-NEXT: .result i32
; CHECK-NEXT: call foo1@FUNCTION{{$}} ; CHECK-NEXT: call foo1@FUNCTION{{$}}
; CHECK-NEXT: copy_local $push0=, $0 ; CHECK-NEXT: copy_local $0
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function

test/CodeGen/WebAssembly/global.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that globals assemble as expected. ; Test that globals assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-NOT: llvm.used ; CHECK-NOT: llvm.used
; CHECK-NOT: llvm.metadata ; CHECK-NOT: llvm.metadata
@llvm.used = appending global [1 x i32*] [i32* @g], section "llvm.metadata" @llvm.used = appending global [1 x i32*] [i32* @g], section "llvm.metadata"
; CHECK: foo: ; CHECK: foo:
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: i32.load $push1=, answer($pop0){{$}} ; CHECK-NEXT: i32.load answer{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i32 @foo() { define i32 @foo() {
%a = load i32, i32* @answer %a = load i32, i32* @answer
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: call_memcpy: ; CHECK-LABEL: call_memcpy:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: i32.call memcpy@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) { define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) {
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false) tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
ret i8* %p ret i8* %p
} }
; CHECK: .type .Lg,@object ; CHECK: .type .Lg,@object
; CHECK: .p2align 2{{$}} ; CHECK: .p2align 2{{$}}
▲ Show 20 Lines • Show All 189 Lines • Show Last 20 Lines

test/CodeGen/WebAssembly/i32-load-store-alignment.ll

; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test loads and stores with custom alignment values. ; Test loads and stores with custom alignment values.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Loads. ; Loads.
; CHECK-LABEL: ldi32_a1: ; CHECK-LABEL: ldi32_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}} ; CHECK-NEXT: i32.load 0:p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_a1(i32 *%p) { define i32 @ldi32_a1(i32 *%p) {
%v = load i32, i32* %p, align 1 %v = load i32, i32* %p, align 1
ret i32 %v ret i32 %v
} }
; CHECK-LABEL: ldi32_a2: ; CHECK-LABEL: ldi32_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}} ; CHECK-NEXT: i32.load 0:p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_a2(i32 *%p) { define i32 @ldi32_a2(i32 *%p) {
%v = load i32, i32* %p, align 2 %v = load i32, i32* %p, align 2
ret i32 %v ret i32 %v
} }
; 4 is the default alignment for i32 so no attribute is needed. ; 4 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: ldi32_a4: ; CHECK-LABEL: ldi32_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_a4(i32 *%p) { define i32 @ldi32_a4(i32 *%p) {
%v = load i32, i32* %p, align 4 %v = load i32, i32* %p, align 4
ret i32 %v ret i32 %v
} }
; The default alignment in LLVM is the same as the defualt alignment in wasm. ; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: ldi32: ; CHECK-LABEL: ldi32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32(i32 *%p) { define i32 @ldi32(i32 *%p) {
%v = load i32, i32* %p %v = load i32, i32* %p
ret i32 %v ret i32 %v
} }
; 8 is greater than the default alignment so it is ignored. ; 8 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi32_a8: ; CHECK-LABEL: ldi32_a8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_a8(i32 *%p) { define i32 @ldi32_a8(i32 *%p) {
%v = load i32, i32* %p, align 8 %v = load i32, i32* %p, align 8
ret i32 %v ret i32 %v
} }
; Extending loads. ; Extending loads.
; CHECK-LABEL: ldi8_a1: ; CHECK-LABEL: ldi8_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i8 @ldi8_a1(i8 *%p) { define i8 @ldi8_a1(i8 *%p) {
%v = load i8, i8* %p, align 1 %v = load i8, i8* %p, align 1
ret i8 %v ret i8 %v
} }
; CHECK-LABEL: ldi8_a2: ; CHECK-LABEL: ldi8_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i8 @ldi8_a2(i8 *%p) { define i8 @ldi8_a2(i8 *%p) {
%v = load i8, i8* %p, align 2 %v = load i8, i8* %p, align 2
ret i8 %v ret i8 %v
} }
; CHECK-LABEL: ldi16_a1: ; CHECK-LABEL: ldi16_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}} ; CHECK-NEXT: i32.load16_u 0:p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i16 @ldi16_a1(i16 *%p) { define i16 @ldi16_a1(i16 *%p) {
%v = load i16, i16* %p, align 1 %v = load i16, i16* %p, align 1
ret i16 %v ret i16 %v
} }
; CHECK-LABEL: ldi16_a2: ; CHECK-LABEL: ldi16_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load16_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i16 @ldi16_a2(i16 *%p) { define i16 @ldi16_a2(i16 *%p) {
%v = load i16, i16* %p, align 2 %v = load i16, i16* %p, align 2
ret i16 %v ret i16 %v
} }
; CHECK-LABEL: ldi16_a4: ; CHECK-LABEL: ldi16_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load16_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i16 @ldi16_a4(i16 *%p) { define i16 @ldi16_a4(i16 *%p) {
%v = load i16, i16* %p, align 4 %v = load i16, i16* %p, align 4
ret i16 %v ret i16 %v
} }
; Stores. ; Stores.
; CHECK-LABEL: sti32_a1: ; CHECK-LABEL: sti32_a1:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store 0($0):p2align=0, $1{{$}} ; CHECK-NEXT: i32.store 0:p2align=0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a1(i32 *%p, i32 %v) { define void @sti32_a1(i32 *%p, i32 %v) {
store i32 %v, i32* %p, align 1 store i32 %v, i32* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti32_a2: ; CHECK-LABEL: sti32_a2:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store 0($0):p2align=1, $1{{$}} ; CHECK-NEXT: i32.store 0:p2align=1{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a2(i32 *%p, i32 %v) { define void @sti32_a2(i32 *%p, i32 %v) {
store i32 %v, i32* %p, align 2 store i32 %v, i32* %p, align 2
ret void ret void
} }
; 4 is the default alignment for i32 so no attribute is needed. ; 4 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: sti32_a4: ; CHECK-LABEL: sti32_a4:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a4(i32 *%p, i32 %v) { define void @sti32_a4(i32 *%p, i32 %v) {
store i32 %v, i32* %p, align 4 store i32 %v, i32* %p, align 4
ret void ret void
} }
; The default alignment in LLVM is the same as the defualt alignment in wasm. ; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: sti32: ; CHECK-LABEL: sti32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32(i32 *%p, i32 %v) { define void @sti32(i32 *%p, i32 %v) {
store i32 %v, i32* %p store i32 %v, i32* %p
ret void ret void
} }
; CHECK-LABEL: sti32_a8: ; CHECK-LABEL: sti32_a8:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store 0($0), $1{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a8(i32 *%p, i32 %v) { define void @sti32_a8(i32 *%p, i32 %v) {
store i32 %v, i32* %p, align 8 store i32 %v, i32* %p, align 8
ret void ret void
} }
; Truncating stores. ; Truncating stores.
; CHECK-LABEL: sti8_a1: ; CHECK-LABEL: sti8_a1:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store8 0($0), $1{{$}} ; CHECK-NEXT: i32.store8 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti8_a1(i8 *%p, i8 %v) { define void @sti8_a1(i8 *%p, i8 %v) {
store i8 %v, i8* %p, align 1 store i8 %v, i8* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti8_a2: ; CHECK-LABEL: sti8_a2:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store8 0($0), $1{{$}} ; CHECK-NEXT: i32.store8 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti8_a2(i8 *%p, i8 %v) { define void @sti8_a2(i8 *%p, i8 %v) {
store i8 %v, i8* %p, align 2 store i8 %v, i8* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti16_a1: ; CHECK-LABEL: sti16_a1:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store16 0($0):p2align=0, $1{{$}} ; CHECK-NEXT: i32.store16 0:p2align=0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a1(i16 *%p, i16 %v) { define void @sti16_a1(i16 *%p, i16 %v) {
store i16 %v, i16* %p, align 1 store i16 %v, i16* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti16_a2: ; CHECK-LABEL: sti16_a2:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store16 0($0), $1{{$}} ; CHECK-NEXT: i32.store16 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a2(i16 *%p, i16 %v) { define void @sti16_a2(i16 *%p, i16 %v) {
store i16 %v, i16* %p, align 2 store i16 %v, i16* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti16_a4: ; CHECK-LABEL: sti16_a4:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.store16 0($0), $1{{$}} ; CHECK-NEXT: i32.store16 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a4(i16 *%p, i16 %v) { define void @sti16_a4(i16 *%p, i16 %v) {
store i16 %v, i16* %p, align 4 store i16 %v, i16* %p, align 4
ret void ret void
} }
; Atomics. ; Atomics.
; Wasm atomics have the alignment field, but it must always have the ; Wasm atomics have the alignment field, but it must always have the
; type's natural alignment. ; type's natural alignment.
; CHECK-LABEL: ldi32_atomic_a4: ; CHECK-LABEL: ldi32_atomic_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_atomic_a4(i32 *%p) { define i32 @ldi32_atomic_a4(i32 *%p) {
%v = load atomic i32, i32* %p seq_cst, align 4 %v = load atomic i32, i32* %p seq_cst, align 4
ret i32 %v ret i32 %v
} }
; 8 is greater than the default alignment so it is rounded down to 4 ; 8 is greater than the default alignment so it is rounded down to 4
; CHECK-LABEL: ldi32_atomic_a8: ; CHECK-LABEL: ldi32_atomic_a8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32_atomic_a8(i32 *%p) { define i32 @ldi32_atomic_a8(i32 *%p) {
%v = load atomic i32, i32* %p seq_cst, align 8 %v = load atomic i32, i32* %p seq_cst, align 8
ret i32 %v ret i32 %v
} }
; CHECK-LABEL: sti32_atomic_a4: ; CHECK-LABEL: sti32_atomic_a4:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}} ; CHECK-NEXT: i32.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_atomic_a4(i32 *%p, i32 %v) { define void @sti32_atomic_a4(i32 *%p, i32 %v) {
store atomic i32 %v, i32* %p seq_cst, align 4 store atomic i32 %v, i32* %p seq_cst, align 4
ret void ret void
} }
; CHECK-LABEL: sti32_atomic_a8: ; CHECK-LABEL: sti32_atomic_a8:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}} ; CHECK-NEXT: i32.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_atomic_a8(i32 *%p, i32 %v) { define void @sti32_atomic_a8(i32 *%p, i32 %v) {
store atomic i32 %v, i32* %p seq_cst, align 8 store atomic i32 %v, i32* %p seq_cst, align 8
ret void ret void
} }

test/CodeGen/WebAssembly/i32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic 32-bit integer operations assemble as expected. ; Test that basic 32-bit integer operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare i32 @llvm.ctlz.i32(i32, i1) declare i32 @llvm.ctlz.i32(i32, i1)
declare i32 @llvm.cttz.i32(i32, i1) declare i32 @llvm.cttz.i32(i32, i1)
declare i32 @llvm.ctpop.i32(i32) declare i32 @llvm.ctpop.i32(i32)
; CHECK-LABEL: add32: ; CHECK-LABEL: add32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.add $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @add32(i32 %x, i32 %y) { define i32 @add32(i32 %x, i32 %y) {
%a = add i32 %x, %y %a = add i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: sub32: ; CHECK-LABEL: sub32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.sub{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sub32(i32 %x, i32 %y) { define i32 @sub32(i32 %x, i32 %y) {
%a = sub i32 %x, %y %a = sub i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: mul32: ; CHECK-LABEL: mul32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.mul{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @mul32(i32 %x, i32 %y) { define i32 @mul32(i32 %x, i32 %y) {
%a = mul i32 %x, %y %a = mul i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: sdiv32: ; CHECK-LABEL: sdiv32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sdiv32(i32 %x, i32 %y) { define i32 @sdiv32(i32 %x, i32 %y) {
%a = sdiv i32 %x, %y %a = sdiv i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: udiv32: ; CHECK-LABEL: udiv32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.div_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @udiv32(i32 %x, i32 %y) { define i32 @udiv32(i32 %x, i32 %y) {
%a = udiv i32 %x, %y %a = udiv i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: srem32: ; CHECK-LABEL: srem32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.rem_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @srem32(i32 %x, i32 %y) { define i32 @srem32(i32 %x, i32 %y) {
%a = srem i32 %x, %y %a = srem i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: urem32: ; CHECK-LABEL: urem32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.rem_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @urem32(i32 %x, i32 %y) { define i32 @urem32(i32 %x, i32 %y) {
%a = urem i32 %x, %y %a = urem i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: and32: ; CHECK-LABEL: and32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.and $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @and32(i32 %x, i32 %y) { define i32 @and32(i32 %x, i32 %y) {
%a = and i32 %x, %y %a = and i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: or32: ; CHECK-LABEL: or32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.or $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.or{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @or32(i32 %x, i32 %y) { define i32 @or32(i32 %x, i32 %y) {
%a = or i32 %x, %y %a = or i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: xor32: ; CHECK-LABEL: xor32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @xor32(i32 %x, i32 %y) { define i32 @xor32(i32 %x, i32 %y) {
%a = xor i32 %x, %y %a = xor i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: shl32: ; CHECK-LABEL: shl32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.shl{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @shl32(i32 %x, i32 %y) { define i32 @shl32(i32 %x, i32 %y) {
%a = shl i32 %x, %y %a = shl i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: shr32: ; CHECK-LABEL: shr32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.shr_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @shr32(i32 %x, i32 %y) { define i32 @shr32(i32 %x, i32 %y) {
%a = lshr i32 %x, %y %a = lshr i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: sar32: ; CHECK-LABEL: sar32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.shr_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sar32(i32 %x, i32 %y) { define i32 @sar32(i32 %x, i32 %y) {
%a = ashr i32 %x, %y %a = ashr i32 %x, %y
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: clz32: ; CHECK-LABEL: clz32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.clz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @clz32(i32 %x) { define i32 @clz32(i32 %x) {
%a = call i32 @llvm.ctlz.i32(i32 %x, i1 false) %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: clz32_zero_undef: ; CHECK-LABEL: clz32_zero_undef:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.clz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @clz32_zero_undef(i32 %x) { define i32 @clz32_zero_undef(i32 %x) {
%a = call i32 @llvm.ctlz.i32(i32 %x, i1 true) %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: ctz32: ; CHECK-LABEL: ctz32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.ctz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ctz32(i32 %x) { define i32 @ctz32(i32 %x) {
%a = call i32 @llvm.cttz.i32(i32 %x, i1 false) %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: ctz32_zero_undef: ; CHECK-LABEL: ctz32_zero_undef:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.ctz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ctz32_zero_undef(i32 %x) { define i32 @ctz32_zero_undef(i32 %x) {
%a = call i32 @llvm.cttz.i32(i32 %x, i1 true) %a = call i32 @llvm.cttz.i32(i32 %x, i1 true)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: popcnt32: ; CHECK-LABEL: popcnt32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.popcnt $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.popcnt{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @popcnt32(i32 %x) { define i32 @popcnt32(i32 %x) {
%a = call i32 @llvm.ctpop.i32(i32 %x) %a = call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: eqz32: ; CHECK-LABEL: eqz32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.eqz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i32.eqz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @eqz32(i32 %x) { define i32 @eqz32(i32 %x) {
%a = icmp eq i32 %x, 0 %a = icmp eq i32 %x, 0
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: rotl: ; CHECK-LABEL: rotl:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i32.rotl
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @rotl(i32 %x, i32 %y) { define i32 @rotl(i32 %x, i32 %y) {
%z = sub i32 32, %y %z = sub i32 32, %y
%b = shl i32 %x, %y %b = shl i32 %x, %y
%c = lshr i32 %x, %z %c = lshr i32 %x, %z
%d = or i32 %b, %c %d = or i32 %b, %c
ret i32 %d ret i32 %d
} }
; CHECK-LABEL: masked_rotl: ; CHECK-LABEL: masked_rotl:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i32.rotl
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @masked_rotl(i32 %x, i32 %y) { define i32 @masked_rotl(i32 %x, i32 %y) {
%a = and i32 %y, 31 %a = and i32 %y, 31
%z = sub i32 32, %a %z = sub i32 32, %a
%b = shl i32 %x, %a %b = shl i32 %x, %a
%c = lshr i32 %x, %z %c = lshr i32 %x, %z
%d = or i32 %b, %c %d = or i32 %b, %c
ret i32 %d ret i32 %d
} }
; CHECK-LABEL: rotr: ; CHECK-LABEL: rotr:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i32.rotr
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @rotr(i32 %x, i32 %y) { define i32 @rotr(i32 %x, i32 %y) {
%z = sub i32 32, %y %z = sub i32 32, %y
%b = lshr i32 %x, %y %b = lshr i32 %x, %y
%c = shl i32 %x, %z %c = shl i32 %x, %z
%d = or i32 %b, %c %d = or i32 %b, %c
ret i32 %d ret i32 %d
} }
; CHECK-LABEL: masked_rotr: ; CHECK-LABEL: masked_rotr:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i32.rotr
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @masked_rotr(i32 %x, i32 %y) { define i32 @masked_rotr(i32 %x, i32 %y) {
%a = and i32 %y, 31 %a = and i32 %y, 31
%z = sub i32 32, %a %z = sub i32 32, %a
%b = lshr i32 %x, %a %b = lshr i32 %x, %a
%c = shl i32 %x, %z %c = shl i32 %x, %z
%d = or i32 %b, %c %d = or i32 %b, %c
ret i32 %d ret i32 %d
} }

test/CodeGen/WebAssembly/i64-load-store-alignment.ll

; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test loads and stores with custom alignment values. ; Test loads and stores with custom alignment values.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Loads. ; Loads.
; CHECK-LABEL: ldi64_a1: ; CHECK-LABEL: ldi64_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}} ; CHECK-NEXT: i64.load 0:p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_a1(i64 *%p) { define i64 @ldi64_a1(i64 *%p) {
%v = load i64, i64* %p, align 1 %v = load i64, i64* %p, align 1
ret i64 %v ret i64 %v
} }
; CHECK-LABEL: ldi64_a2: ; CHECK-LABEL: ldi64_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}} ; CHECK-NEXT: i64.load 0:p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_a2(i64 *%p) { define i64 @ldi64_a2(i64 *%p) {
%v = load i64, i64* %p, align 2 %v = load i64, i64* %p, align 2
ret i64 %v ret i64 %v
} }
; CHECK-LABEL: ldi64_a4: ; CHECK-LABEL: ldi64_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=2{{$}} ; CHECK-NEXT: i64.load 0:p2align=2{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_a4(i64 *%p) { define i64 @ldi64_a4(i64 *%p) {
%v = load i64, i64* %p, align 4 %v = load i64, i64* %p, align 4
ret i64 %v ret i64 %v
} }
; 8 is the default alignment for i64 so no attribute is needed. ; 8 is the default alignment for i64 so no attribute is needed.
; CHECK-LABEL: ldi64_a8: ; CHECK-LABEL: ldi64_a8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_a8(i64 *%p) { define i64 @ldi64_a8(i64 *%p) {
%v = load i64, i64* %p, align 8 %v = load i64, i64* %p, align 8
ret i64 %v ret i64 %v
} }
; The default alignment in LLVM is the same as the defualt alignment in wasm. ; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: ldi64: ; CHECK-LABEL: ldi64:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64(i64 *%p) { define i64 @ldi64(i64 *%p) {
%v = load i64, i64* %p %v = load i64, i64* %p
ret i64 %v ret i64 %v
} }
; 16 is greater than the default alignment so it is ignored. ; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi64_a16: ; CHECK-LABEL: ldi64_a16:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_a16(i64 *%p) { define i64 @ldi64_a16(i64 *%p) {
%v = load i64, i64* %p, align 16 %v = load i64, i64* %p, align 16
ret i64 %v ret i64 %v
} }
; Extending loads. ; Extending loads.
; CHECK-LABEL: ldi8_a1: ; CHECK-LABEL: ldi8_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi8_a1(i8 *%p) { define i64 @ldi8_a1(i8 *%p) {
%v = load i8, i8* %p, align 1 %v = load i8, i8* %p, align 1
%w = zext i8 %v to i64 %w = zext i8 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi8_a2: ; CHECK-LABEL: ldi8_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi8_a2(i8 *%p) { define i64 @ldi8_a2(i8 *%p) {
%v = load i8, i8* %p, align 2 %v = load i8, i8* %p, align 2
%w = zext i8 %v to i64 %w = zext i8 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi16_a1: ; CHECK-LABEL: ldi16_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}} ; CHECK-NEXT: i64.load16_u 0:p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi16_a1(i16 *%p) { define i64 @ldi16_a1(i16 *%p) {
%v = load i16, i16* %p, align 1 %v = load i16, i16* %p, align 1
%w = zext i16 %v to i64 %w = zext i16 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi16_a2: ; CHECK-LABEL: ldi16_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load16_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi16_a2(i16 *%p) { define i64 @ldi16_a2(i16 *%p) {
%v = load i16, i16* %p, align 2 %v = load i16, i16* %p, align 2
%w = zext i16 %v to i64 %w = zext i16 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi16_a4: ; CHECK-LABEL: ldi16_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load16_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi16_a4(i16 *%p) { define i64 @ldi16_a4(i16 *%p) {
%v = load i16, i16* %p, align 4 %v = load i16, i16* %p, align 4
%w = zext i16 %v to i64 %w = zext i16 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi32_a1: ; CHECK-LABEL: ldi32_a1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}} ; CHECK-NEXT: i64.load32_u 0:p2align=0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi32_a1(i32 *%p) { define i64 @ldi32_a1(i32 *%p) {
%v = load i32, i32* %p, align 1 %v = load i32, i32* %p, align 1
%w = zext i32 %v to i64 %w = zext i32 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi32_a2: ; CHECK-LABEL: ldi32_a2:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}} ; CHECK-NEXT: i64.load32_u 0:p2align=1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi32_a2(i32 *%p) { define i64 @ldi32_a2(i32 *%p) {
%v = load i32, i32* %p, align 2 %v = load i32, i32* %p, align 2
%w = zext i32 %v to i64 %w = zext i32 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi32_a4: ; CHECK-LABEL: ldi32_a4:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load32_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi32_a4(i32 *%p) { define i64 @ldi32_a4(i32 *%p) {
%v = load i32, i32* %p, align 4 %v = load i32, i32* %p, align 4
%w = zext i32 %v to i64 %w = zext i32 %v to i64
ret i64 %w ret i64 %w
} }
; CHECK-LABEL: ldi32_a8: ; CHECK-LABEL: ldi32_a8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load32_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi32_a8(i32 *%p) { define i64 @ldi32_a8(i32 *%p) {
%v = load i32, i32* %p, align 8 %v = load i32, i32* %p, align 8
%w = zext i32 %v to i64 %w = zext i32 %v to i64
ret i64 %w ret i64 %w
} }
; Stores. ; Stores.
; CHECK-LABEL: sti64_a1: ; CHECK-LABEL: sti64_a1:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0):p2align=0, $1{{$}} ; CHECK-NEXT: i64.store 0:p2align=0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_a1(i64 *%p, i64 %v) { define void @sti64_a1(i64 *%p, i64 %v) {
store i64 %v, i64* %p, align 1 store i64 %v, i64* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti64_a2: ; CHECK-LABEL: sti64_a2:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0):p2align=1, $1{{$}} ; CHECK-NEXT: i64.store 0:p2align=1{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_a2(i64 *%p, i64 %v) { define void @sti64_a2(i64 *%p, i64 %v) {
store i64 %v, i64* %p, align 2 store i64 %v, i64* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti64_a4: ; CHECK-LABEL: sti64_a4:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0):p2align=2, $1{{$}} ; CHECK-NEXT: i64.store 0:p2align=2{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_a4(i64 *%p, i64 %v) { define void @sti64_a4(i64 *%p, i64 %v) {
store i64 %v, i64* %p, align 4 store i64 %v, i64* %p, align 4
ret void ret void
} }
; 8 is the default alignment for i32 so no attribute is needed. ; 8 is the default alignment for i32 so no attribute is needed.
; CHECK-LABEL: sti64_a8: ; CHECK-LABEL: sti64_a8:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}} ; CHECK-NEXT: i64.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_a8(i64 *%p, i64 %v) { define void @sti64_a8(i64 *%p, i64 %v) {
store i64 %v, i64* %p, align 8 store i64 %v, i64* %p, align 8
ret void ret void
} }
; The default alignment in LLVM is the same as the defualt alignment in wasm. ; The default alignment in LLVM is the same as the defualt alignment in wasm.
; CHECK-LABEL: sti64: ; CHECK-LABEL: sti64:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}} ; CHECK-NEXT: i64.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64(i64 *%p, i64 %v) { define void @sti64(i64 *%p, i64 %v) {
store i64 %v, i64* %p store i64 %v, i64* %p
ret void ret void
} }
; CHECK-LABEL: sti64_a16: ; CHECK-LABEL: sti64_a16:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store 0($0), $1{{$}} ; CHECK-NEXT: i64.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_a16(i64 *%p, i64 %v) { define void @sti64_a16(i64 *%p, i64 %v) {
store i64 %v, i64* %p, align 16 store i64 %v, i64* %p, align 16
ret void ret void
} }
; Truncating stores. ; Truncating stores.
; CHECK-LABEL: sti8_a1: ; CHECK-LABEL: sti8_a1:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store8 0($0), $1{{$}} ; CHECK-NEXT: i64.store8 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti8_a1(i8 *%p, i64 %w) { define void @sti8_a1(i8 *%p, i64 %w) {
%v = trunc i64 %w to i8 %v = trunc i64 %w to i8
store i8 %v, i8* %p, align 1 store i8 %v, i8* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti8_a2: ; CHECK-LABEL: sti8_a2:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store8 0($0), $1{{$}} ; CHECK-NEXT: i64.store8 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti8_a2(i8 *%p, i64 %w) { define void @sti8_a2(i8 *%p, i64 %w) {
%v = trunc i64 %w to i8 %v = trunc i64 %w to i8
store i8 %v, i8* %p, align 2 store i8 %v, i8* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti16_a1: ; CHECK-LABEL: sti16_a1:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store16 0($0):p2align=0, $1{{$}} ; CHECK-NEXT: i64.store16 0:p2align=0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a1(i16 *%p, i64 %w) { define void @sti16_a1(i16 *%p, i64 %w) {
%v = trunc i64 %w to i16 %v = trunc i64 %w to i16
store i16 %v, i16* %p, align 1 store i16 %v, i16* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti16_a2: ; CHECK-LABEL: sti16_a2:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store16 0($0), $1{{$}} ; CHECK-NEXT: i64.store16 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a2(i16 *%p, i64 %w) { define void @sti16_a2(i16 *%p, i64 %w) {
%v = trunc i64 %w to i16 %v = trunc i64 %w to i16
store i16 %v, i16* %p, align 2 store i16 %v, i16* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti16_a4: ; CHECK-LABEL: sti16_a4:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store16 0($0), $1{{$}} ; CHECK-NEXT: i64.store16 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti16_a4(i16 *%p, i64 %w) { define void @sti16_a4(i16 *%p, i64 %w) {
%v = trunc i64 %w to i16 %v = trunc i64 %w to i16
store i16 %v, i16* %p, align 4 store i16 %v, i16* %p, align 4
ret void ret void
} }
; CHECK-LABEL: sti32_a1: ; CHECK-LABEL: sti32_a1:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store32 0($0):p2align=0, $1{{$}} ; CHECK-NEXT: i64.store32 0:p2align=0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a1(i32 *%p, i64 %w) { define void @sti32_a1(i32 *%p, i64 %w) {
%v = trunc i64 %w to i32 %v = trunc i64 %w to i32
store i32 %v, i32* %p, align 1 store i32 %v, i32* %p, align 1
ret void ret void
} }
; CHECK-LABEL: sti32_a2: ; CHECK-LABEL: sti32_a2:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store32 0($0):p2align=1, $1{{$}} ; CHECK-NEXT: i64.store32 0:p2align=1{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a2(i32 *%p, i64 %w) { define void @sti32_a2(i32 *%p, i64 %w) {
%v = trunc i64 %w to i32 %v = trunc i64 %w to i32
store i32 %v, i32* %p, align 2 store i32 %v, i32* %p, align 2
ret void ret void
} }
; CHECK-LABEL: sti32_a4: ; CHECK-LABEL: sti32_a4:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store32 0($0), $1{{$}} ; CHECK-NEXT: i64.store32 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a4(i32 *%p, i64 %w) { define void @sti32_a4(i32 *%p, i64 %w) {
%v = trunc i64 %w to i32 %v = trunc i64 %w to i32
store i32 %v, i32* %p, align 4 store i32 %v, i32* %p, align 4
ret void ret void
} }
; CHECK-LABEL: sti32_a8: ; CHECK-LABEL: sti32_a8:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.store32 0($0), $1{{$}} ; CHECK-NEXT: i64.store32 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32_a8(i32 *%p, i64 %w) { define void @sti32_a8(i32 *%p, i64 %w) {
%v = trunc i64 %w to i32 %v = trunc i64 %w to i32
store i32 %v, i32* %p, align 8 store i32 %v, i32* %p, align 8
ret void ret void
} }
; Atomics. ; Atomics.
; Wasm atomics have the alignment field, but it must always have the type's ; Wasm atomics have the alignment field, but it must always have the type's
; natural alignment. ; natural alignment.
; CHECK-LABEL: ldi64_atomic_a8: ; CHECK-LABEL: ldi64_atomic_a8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_atomic_a8(i64 *%p) { define i64 @ldi64_atomic_a8(i64 *%p) {
%v = load atomic i64, i64* %p seq_cst, align 8 %v = load atomic i64, i64* %p seq_cst, align 8
ret i64 %v ret i64 %v
} }
; 16 is greater than the default alignment so it is ignored. ; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: ldi64_atomic_a16: ; CHECK-LABEL: ldi64_atomic_a16:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64_atomic_a16(i64 *%p) { define i64 @ldi64_atomic_a16(i64 *%p) {
%v = load atomic i64, i64* %p seq_cst, align 16 %v = load atomic i64, i64* %p seq_cst, align 16
ret i64 %v ret i64 %v
} }
; CHECK-LABEL: sti64_atomic_a4: ; CHECK-LABEL: sti64_atomic_a4:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}} ; CHECK-NEXT: i64.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_atomic_a4(i64 *%p, i64 %v) { define void @sti64_atomic_a4(i64 *%p, i64 %v) {
store atomic i64 %v, i64* %p seq_cst, align 8 store atomic i64 %v, i64* %p seq_cst, align 8
ret void ret void
} }
; 16 is greater than the default alignment so it is ignored. ; 16 is greater than the default alignment so it is ignored.
; CHECK-LABEL: sti64_atomic_a8: ; CHECK-LABEL: sti64_atomic_a8:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}} ; CHECK-NEXT: i64.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64_atomic_a8(i64 *%p, i64 %v) { define void @sti64_atomic_a8(i64 *%p, i64 %v) {
store atomic i64 %v, i64* %p seq_cst, align 16 store atomic i64 %v, i64* %p seq_cst, align 16
ret void ret void
} }

test/CodeGen/WebAssembly/i64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic 64-bit integer operations assemble as expected. ; Test that basic 64-bit integer operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare i64 @llvm.ctlz.i64(i64, i1) declare i64 @llvm.ctlz.i64(i64, i1)
declare i64 @llvm.cttz.i64(i64, i1) declare i64 @llvm.cttz.i64(i64, i1)
declare i64 @llvm.ctpop.i64(i64) declare i64 @llvm.ctpop.i64(i64)
; CHECK-LABEL: add64: ; CHECK-LABEL: add64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.add $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.add {{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @add64(i64 %x, i64 %y) { define i64 @add64(i64 %x, i64 %y) {
%a = add i64 %x, %y %a = add i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: sub64: ; CHECK-LABEL: sub64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.sub{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sub64(i64 %x, i64 %y) { define i64 @sub64(i64 %x, i64 %y) {
%a = sub i64 %x, %y %a = sub i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: mul64: ; CHECK-LABEL: mul64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.mul{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @mul64(i64 %x, i64 %y) { define i64 @mul64(i64 %x, i64 %y) {
%a = mul i64 %x, %y %a = mul i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: sdiv64: ; CHECK-LABEL: sdiv64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.div_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sdiv64(i64 %x, i64 %y) { define i64 @sdiv64(i64 %x, i64 %y) {
%a = sdiv i64 %x, %y %a = sdiv i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: udiv64: ; CHECK-LABEL: udiv64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.div_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @udiv64(i64 %x, i64 %y) { define i64 @udiv64(i64 %x, i64 %y) {
%a = udiv i64 %x, %y %a = udiv i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: srem64: ; CHECK-LABEL: srem64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.rem_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @srem64(i64 %x, i64 %y) { define i64 @srem64(i64 %x, i64 %y) {
%a = srem i64 %x, %y %a = srem i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: urem64: ; CHECK-LABEL: urem64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.rem_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @urem64(i64 %x, i64 %y) { define i64 @urem64(i64 %x, i64 %y) {
%a = urem i64 %x, %y %a = urem i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: and64: ; CHECK-LABEL: and64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.and $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.and{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @and64(i64 %x, i64 %y) { define i64 @and64(i64 %x, i64 %y) {
%a = and i64 %x, %y %a = and i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: or64: ; CHECK-LABEL: or64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.or $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.or{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @or64(i64 %x, i64 %y) { define i64 @or64(i64 %x, i64 %y) {
%a = or i64 %x, %y %a = or i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: xor64: ; CHECK-LABEL: xor64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.xor{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @xor64(i64 %x, i64 %y) { define i64 @xor64(i64 %x, i64 %y) {
%a = xor i64 %x, %y %a = xor i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: shl64: ; CHECK-LABEL: shl64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.shl{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @shl64(i64 %x, i64 %y) { define i64 @shl64(i64 %x, i64 %y) {
%a = shl i64 %x, %y %a = shl i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: shr64: ; CHECK-LABEL: shr64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.shr_u{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @shr64(i64 %x, i64 %y) { define i64 @shr64(i64 %x, i64 %y) {
%a = lshr i64 %x, %y %a = lshr i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: sar64: ; CHECK-LABEL: sar64:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i64.shr_s{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sar64(i64 %x, i64 %y) { define i64 @sar64(i64 %x, i64 %y) {
%a = ashr i64 %x, %y %a = ashr i64 %x, %y
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: clz64: ; CHECK-LABEL: clz64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.clz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @clz64(i64 %x) { define i64 @clz64(i64 %x) {
%a = call i64 @llvm.ctlz.i64(i64 %x, i1 false) %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: clz64_zero_undef: ; CHECK-LABEL: clz64_zero_undef:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.clz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @clz64_zero_undef(i64 %x) { define i64 @clz64_zero_undef(i64 %x) {
%a = call i64 @llvm.ctlz.i64(i64 %x, i1 true) %a = call i64 @llvm.ctlz.i64(i64 %x, i1 true)
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: ctz64: ; CHECK-LABEL: ctz64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.ctz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ctz64(i64 %x) { define i64 @ctz64(i64 %x) {
%a = call i64 @llvm.cttz.i64(i64 %x, i1 false) %a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: ctz64_zero_undef: ; CHECK-LABEL: ctz64_zero_undef:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.ctz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ctz64_zero_undef(i64 %x) { define i64 @ctz64_zero_undef(i64 %x) {
%a = call i64 @llvm.cttz.i64(i64 %x, i1 true) %a = call i64 @llvm.cttz.i64(i64 %x, i1 true)
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: popcnt64: ; CHECK-LABEL: popcnt64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.popcnt $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.popcnt{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @popcnt64(i64 %x) { define i64 @popcnt64(i64 %x) {
%a = call i64 @llvm.ctpop.i64(i64 %x) %a = call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: eqz64: ; CHECK-LABEL: eqz64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.eqz $push0=, $pop[[L0]]{{$}} ; CHECK-NEXT: i64.eqz{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @eqz64(i64 %x) { define i32 @eqz64(i64 %x) {
%a = icmp eq i64 %x, 0 %a = icmp eq i64 %x, 0
%b = zext i1 %a to i32 %b = zext i1 %a to i32
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: rotl: ; CHECK-LABEL: rotl:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i64.rotl
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @rotl(i64 %x, i64 %y) { define i64 @rotl(i64 %x, i64 %y) {
%z = sub i64 64, %y %z = sub i64 64, %y
%b = shl i64 %x, %y %b = shl i64 %x, %y
%c = lshr i64 %x, %z %c = lshr i64 %x, %z
%d = or i64 %b, %c %d = or i64 %b, %c
ret i64 %d ret i64 %d
} }
; CHECK-LABEL: masked_rotl: ; CHECK-LABEL: masked_rotl:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i64.rotl
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @masked_rotl(i64 %x, i64 %y) { define i64 @masked_rotl(i64 %x, i64 %y) {
%a = and i64 %y, 63 %a = and i64 %y, 63
%z = sub i64 64, %a %z = sub i64 64, %a
%b = shl i64 %x, %a %b = shl i64 %x, %a
%c = lshr i64 %x, %z %c = lshr i64 %x, %z
%d = or i64 %b, %c %d = or i64 %b, %c
ret i64 %d ret i64 %d
} }
; CHECK-LABEL: rotr: ; CHECK-LABEL: rotr:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i64.rotr
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @rotr(i64 %x, i64 %y) { define i64 @rotr(i64 %x, i64 %y) {
%z = sub i64 64, %y %z = sub i64 64, %y
%b = lshr i64 %x, %y %b = lshr i64 %x, %y
%c = shl i64 %x, %z %c = shl i64 %x, %z
%d = or i64 %b, %c %d = or i64 %b, %c
ret i64 %d ret i64 %d
} }
; CHECK-LABEL: masked_rotr: ; CHECK-LABEL: masked_rotr:
; CHECK-NEXT: .param i64, i64{{$}} ; CHECK-NEXT: .param i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]] ; CHECK-NEXT: i64.rotr
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @masked_rotr(i64 %x, i64 %y) { define i64 @masked_rotr(i64 %x, i64 %y) {
%a = and i64 %y, 63 %a = and i64 %y, 63
%z = sub i64 64, %a %z = sub i64 64, %a
%b = lshr i64 %x, %a %b = lshr i64 %x, %a
%c = shl i64 %x, %z %c = shl i64 %x, %z
%d = or i64 %b, %c %d = or i64 %b, %c
ret i64 %d ret i64 %d
} }

test/CodeGen/WebAssembly/immediates.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic immediates assemble as expected. ; Test that basic immediates assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: zero_i32: ; CHECK-LABEL: zero_i32:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @zero_i32() { define i32 @zero_i32() {
ret i32 0 ret i32 0
} }
; CHECK-LABEL: one_i32: ; CHECK-LABEL: one_i32:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @one_i32() { define i32 @one_i32() {
ret i32 1 ret i32 1
} }
; CHECK-LABEL: max_i32: ; CHECK-LABEL: max_i32:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 2147483647{{$}} ; CHECK-NEXT: i32.const 2147483647{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @max_i32() { define i32 @max_i32() {
ret i32 2147483647 ret i32 2147483647
} }
; CHECK-LABEL: min_i32: ; CHECK-LABEL: min_i32:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, -2147483648{{$}} ; CHECK-NEXT: i32.const -2147483648{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @min_i32() { define i32 @min_i32() {
ret i32 -2147483648 ret i32 -2147483648
} }
; CHECK-LABEL: zero_i64: ; CHECK-LABEL: zero_i64:
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i64.const 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @zero_i64() { define i64 @zero_i64() {
ret i64 0 ret i64 0
} }
; CHECK-LABEL: one_i64: ; CHECK-LABEL: one_i64:
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: i64.const 1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @one_i64() { define i64 @one_i64() {
ret i64 1 ret i64 1
} }
; CHECK-LABEL: max_i64: ; CHECK-LABEL: max_i64:
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, 9223372036854775807{{$}} ; CHECK-NEXT: i64.const 9223372036854775807{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @max_i64() { define i64 @max_i64() {
ret i64 9223372036854775807 ret i64 9223372036854775807
} }
; CHECK-LABEL: min_i64: ; CHECK-LABEL: min_i64:
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.const $push[[NUM:[0-9]+]]=, -9223372036854775808{{$}} ; CHECK-NEXT: i64.const -9223372036854775808{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @min_i64() { define i64 @min_i64() {
ret i64 -9223372036854775808 ret i64 -9223372036854775808
} }
; CHECK-LABEL: negzero_f32: ; CHECK-LABEL: negzero_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -0x0p0{{$}} ; CHECK-NEXT: f32.const -0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @negzero_f32() { define float @negzero_f32() {
ret float -0.0 ret float -0.0
} }
; CHECK-LABEL: zero_f32: ; CHECK-LABEL: zero_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f32.const 0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @zero_f32() { define float @zero_f32() {
ret float 0.0 ret float 0.0
} }
; CHECK-LABEL: one_f32: ; CHECK-LABEL: one_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x1p0{{$}} ; CHECK-NEXT: f32.const 0x1p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @one_f32() { define float @one_f32() {
ret float 1.0 ret float 1.0
} }
; CHECK-LABEL: two_f32: ; CHECK-LABEL: two_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, 0x1p1{{$}} ; CHECK-NEXT: f32.const 0x1p1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @two_f32() { define float @two_f32() {
ret float 2.0 ret float 2.0
} }
; CHECK-LABEL: nan_f32: ; CHECK-LABEL: nan_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, nan{{$}} ; CHECK-NEXT: f32.const nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @nan_f32() { define float @nan_f32() {
ret float 0x7FF8000000000000 ret float 0x7FF8000000000000
} }
; CHECK-LABEL: negnan_f32: ; CHECK-LABEL: negnan_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan{{$}} ; CHECK-NEXT: f32.const -nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @negnan_f32() { define float @negnan_f32() {
ret float 0xFFF8000000000000 ret float 0xFFF8000000000000
} }
; CHECK-LABEL: inf_f32: ; CHECK-LABEL: inf_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, infinity{{$}} ; CHECK-NEXT: f32.const infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @inf_f32() { define float @inf_f32() {
ret float 0x7FF0000000000000 ret float 0x7FF0000000000000
} }
; CHECK-LABEL: neginf_f32: ; CHECK-LABEL: neginf_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -infinity{{$}} ; CHECK-NEXT: f32.const -infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @neginf_f32() { define float @neginf_f32() {
ret float 0xFFF0000000000000 ret float 0xFFF0000000000000
} }
; CHECK-LABEL: custom_nan_f32: ; CHECK-LABEL: custom_nan_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan:0x6bcdef{{$}} ; CHECK-NEXT: f32.const -nan:0x6bcdef{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @custom_nan_f32() { define float @custom_nan_f32() {
ret float 0xFFFD79BDE0000000 ret float 0xFFFD79BDE0000000
} }
; TODO: LLVM's MC layer stores f32 operands as host doubles, requiring a ; TODO: LLVM's MC layer stores f32 operands as host doubles, requiring a
; conversion, so the bits of the NaN are not fully preserved. ; conversion, so the bits of the NaN are not fully preserved.
; CHECK-LABEL: custom_nans_f32: ; CHECK-LABEL: custom_nans_f32:
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.const $push[[NUM:[0-9]+]]=, -nan:0x6bcdef{{$}} ; CHECK-NEXT: f32.const -nan:0x6bcdef{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @custom_nans_f32() { define float @custom_nans_f32() {
ret float 0xFFF579BDE0000000 ret float 0xFFF579BDE0000000
} }
; CHECK-LABEL: negzero_f64: ; CHECK-LABEL: negzero_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -0x0p0{{$}} ; CHECK-NEXT: f64.const -0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @negzero_f64() { define double @negzero_f64() {
ret double -0.0 ret double -0.0
} }
; CHECK-LABEL: zero_f64: ; CHECK-LABEL: zero_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x0p0{{$}} ; CHECK-NEXT: f64.const 0x0p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @zero_f64() { define double @zero_f64() {
ret double 0.0 ret double 0.0
} }
; CHECK-LABEL: one_f64: ; CHECK-LABEL: one_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x1p0{{$}} ; CHECK-NEXT: f64.const 0x1p0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @one_f64() { define double @one_f64() {
ret double 1.0 ret double 1.0
} }
; CHECK-LABEL: two_f64: ; CHECK-LABEL: two_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, 0x1p1{{$}} ; CHECK-NEXT: f64.const 0x1p1{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @two_f64() { define double @two_f64() {
ret double 2.0 ret double 2.0
} }
; CHECK-LABEL: nan_f64: ; CHECK-LABEL: nan_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, nan{{$}} ; CHECK-NEXT: f64.const nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @nan_f64() { define double @nan_f64() {
ret double 0x7FF8000000000000 ret double 0x7FF8000000000000
} }
; CHECK-LABEL: negnan_f64: ; CHECK-LABEL: negnan_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan{{$}} ; CHECK-NEXT: f64.const -nan{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @negnan_f64() { define double @negnan_f64() {
ret double 0xFFF8000000000000 ret double 0xFFF8000000000000
} }
; CHECK-LABEL: inf_f64: ; CHECK-LABEL: inf_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, infinity{{$}} ; CHECK-NEXT: f64.const infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @inf_f64() { define double @inf_f64() {
ret double 0x7FF0000000000000 ret double 0x7FF0000000000000
} }
; CHECK-LABEL: neginf_f64: ; CHECK-LABEL: neginf_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -infinity{{$}} ; CHECK-NEXT: f64.const -infinity{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @neginf_f64() { define double @neginf_f64() {
ret double 0xFFF0000000000000 ret double 0xFFF0000000000000
} }
; CHECK-LABEL: custom_nan_f64: ; CHECK-LABEL: custom_nan_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan:0xabcdef0123456{{$}} ; CHECK-NEXT: f64.const -nan:0xabcdef0123456{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @custom_nan_f64() { define double @custom_nan_f64() {
ret double 0xFFFABCDEF0123456 ret double 0xFFFABCDEF0123456
} }
; CHECK-LABEL: custom_nans_f64: ; CHECK-LABEL: custom_nans_f64:
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.const $push[[NUM:[0-9]+]]=, -nan:0x2bcdef0123456{{$}} ; CHECK-NEXT: f64.const -nan:0x2bcdef0123456{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @custom_nans_f64() { define double @custom_nans_f64() {
ret double 0xFFF2BCDEF0123456 ret double 0xFFF2BCDEF0123456
} }

test/CodeGen/WebAssembly/implicit-def.ll

; RUN: llc -o - %s -asm-verbose=false | FileCheck %s ; RUN: llc -o - %s -asm-verbose=false | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Test that stackified IMPLICIT_DEF instructions are converted into ; Test that stackified IMPLICIT_DEF instructions are converted into
; CONST_I32 to provide an explicit push. ; CONST_I32 to provide an explicit push.
; CHECK: br_if 2, ; CHECK: br_if 2,
; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: return $pop[[L0]]{{$}} ; CHECK-NEXT: return{{$}}
define i1 @f() { define i1 @f() {
%a = xor i1 0, 0 %a = xor i1 0, 0
switch i1 %a, label %C [ switch i1 %a, label %C [
i1 0, label %A i1 0, label %A
i1 1, label %B i1 1, label %B
] ]
A: A:
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test/CodeGen/WebAssembly/indirect-import.ll

Show All 13 Lines
entry: entry:
%fd = alloca float (double)*, align 4 %fd = alloca float (double)*, align 4
%vj = alloca void (i64)*, align 4 %vj = alloca void (i64)*, align 4
%v = alloca void ()*, align 4 %v = alloca void ()*, align 4
%ijidf = alloca i32 (i64, i32, double, float)*, align 4 %ijidf = alloca i32 (i64, i32, double, float)*, align 4
%vs = alloca void (%struct.big*)*, align 4 %vs = alloca void (%struct.big*)*, align 4
%s = alloca void (%struct.big*)*, align 4 %s = alloca void (%struct.big*)*, align 4
; CHECK-DAG: i32.const {{.+}}=, extern_fd@FUNCTION ; CHECK-DAG: i32.const extern_fd@FUNCTION
; CHECK-DAG: i32.const {{.+}}=, extern_vj@FUNCTION ; CHECK-DAG: i32.const extern_vj@FUNCTION
store float (double)* @extern_fd, float (double)** %fd, align 4 store float (double)* @extern_fd, float (double)** %fd, align 4
store void (i64)* @extern_vj, void (i64)** %vj, align 4 store void (i64)* @extern_vj, void (i64)** %vj, align 4
%0 = load void (i64)*, void (i64)** %vj, align 4 %0 = load void (i64)*, void (i64)** %vj, align 4
call void %0(i64 1) call void %0(i64 1)
; CHECK: i32.const {{.+}}=, extern_v@FUNCTION ; CHECK: i32.const extern_v@FUNCTION
store void ()* @extern_v, void ()** %v, align 4 store void ()* @extern_v, void ()** %v, align 4
%1 = load void ()*, void ()** %v, align 4 %1 = load void ()*, void ()** %v, align 4
call void %1() call void %1()
; CHECK: i32.const {{.+}}=, extern_ijidf@FUNCTION ; CHECK: i32.const extern_ijidf@FUNCTION
store i32 (i64, i32, double, float)* @extern_ijidf, i32 (i64, i32, double, float)** %ijidf, align 4 store i32 (i64, i32, double, float)* @extern_ijidf, i32 (i64, i32, double, float)** %ijidf, align 4
%2 = load i32 (i64, i32, double, float)*, i32 (i64, i32, double, float)** %ijidf, align 4 %2 = load i32 (i64, i32, double, float)*, i32 (i64, i32, double, float)** %ijidf, align 4
%call = call i32 %2(i64 1, i32 2, double 3.000000e+00, float 4.000000e+00) %call = call i32 %2(i64 1, i32 2, double 3.000000e+00, float 4.000000e+00)
; CHECK-DAG: i32.const {{.+}}=, extern_struct@FUNCTION ; CHECK-DAG: i32.const extern_struct@FUNCTION
; CHECK-DAG: i32.const {{.+}}=, extern_sret@FUNCTION ; CHECK-DAG: i32.const extern_sret@FUNCTION
store void (%struct.big*)* @extern_struct, void (%struct.big*)** %vs, align 4 store void (%struct.big*)* @extern_struct, void (%struct.big*)** %vs, align 4
store void (%struct.big*)* @extern_sret, void (%struct.big*)** %s, align 4 store void (%struct.big*)* @extern_sret, void (%struct.big*)** %s, align 4
%3 = load float (double)*, float (double)** %fd, align 4 %3 = load float (double)*, float (double)** %fd, align 4
%4 = ptrtoint float (double)* %3 to i32 %4 = ptrtoint float (double)* %3 to i32
ret i32 %4 ret i32 %4
} }
declare float @extern_fd(double) #1 declare float @extern_fd(double) #1
Show All 24 Lines

test/CodeGen/WebAssembly/inline-asm-m.ll

; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -no-integrated-as ; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -no-integrated-as
; Test basic inline assembly "m" operands, which are unsupported. Pass ; Test basic inline assembly "m" operands, which are unsupported. Pass
; -no-integrated-as since these aren't actually valid assembly syntax. ; -no-integrated-as since these aren't actually valid assembly syntax.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
define void @bar(i32* %r, i32* %s) { define void @bar(i32* %r, i32* %s) {
entry: entry:
tail call void asm sideeffect "# $0 = bbb($1)", "=*m,*m"(i32* %s, i32* %r) #0, !srcloc !1 tail call void asm sideeffect "# $0 = bbb($1)", "=*m,*m"(i32* %s, i32* %r) #0, !srcloc !1
ret void ret void
} }

test/CodeGen/WebAssembly/inline-asm.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -no-integrated-as | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -no-integrated-as | FileCheck %s
; Test basic inline assembly. Pass -no-integrated-as since these aren't ; Test basic inline assembly. Pass -no-integrated-as since these aren't
; actually valid assembly syntax. ; actually valid assembly syntax.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: #APP{{$}} ; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = aaa(0){{$}} ; CHECK-NEXT: # 0 = aaa(0){{$}}
; CHECK-NEXT: #NO_APP{{$}} ; CHECK-NEXT: #NO_APP{{$}}
; CHECK-NEXT: get_local $push0=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @foo(i32 %r) { define i32 @foo(i32 %r) {
entry: entry:
%0 = tail call i32 asm sideeffect "# $0 = aaa($1)", "=r,r"(i32 %r) #0, !srcloc !0 %0 = tail call i32 asm sideeffect "# $0 = aaa($1)", "=r,r"(i32 %r) #0, !srcloc !0
ret i32 %0 ret i32 %0
} }
; CHECK-LABEL: imm: ; CHECK-LABEL: imm:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: .local i32{{$}} ; CHECK-NEXT: .local i32{{$}}
; CHECK-NEXT: #APP{{$}} ; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = ccc(42){{$}} ; CHECK-NEXT: # 0 = ccc(42){{$}}
; CHECK-NEXT: #NO_APP{{$}} ; CHECK-NEXT: #NO_APP{{$}}
; CHECK-NEXT: get_local $push0=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @imm() { define i32 @imm() {
entry: entry:
%0 = tail call i32 asm sideeffect "# $0 = ccc($1)", "=r,i"(i32 42) #0, !srcloc !2 %0 = tail call i32 asm sideeffect "# $0 = ccc($1)", "=r,i"(i32 42) #0, !srcloc !2
ret i32 %0 ret i32 %0
} }
; CHECK-LABEL: foo_i64: ; CHECK-LABEL: foo_i64:
; CHECK-NEXT: .param i64{{$}} ; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: #APP{{$}} ; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # 0 = aaa(0){{$}} ; CHECK-NEXT: # 0 = aaa(0){{$}}
; CHECK-NEXT: #NO_APP{{$}} ; CHECK-NEXT: #NO_APP{{$}}
; CHECK-NEXT: get_local $push0=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @foo_i64(i64 %r) { define i64 @foo_i64(i64 %r) {
entry: entry:
%0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0 %0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0
ret i64 %0 ret i64 %0
} }
; CHECK-LABEL: X_i16: ; CHECK-LABEL: X_i16:
; CHECK: foo 1{{$}} ; CHECK: foo 1{{$}}
; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}} ; CHECK: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.store16 0($pop[[S0]]), $pop[[S1]]{{$}} ; CHECK-NEXT: i32.store16 0{{$}}
define void @X_i16(i16 * %t) { define void @X_i16(i16 * %t) {
call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t) call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t)
ret void ret void
} }
; CHECK-LABEL: X_ptr: ; CHECK-LABEL: X_ptr:
; CHECK: foo 1{{$}} ; CHECK: foo 1{{$}}
; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}} ; CHECK: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.store 0($pop[[S0]]), $pop[[S1]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
define void @X_ptr(i16 ** %t) { define void @X_ptr(i16 ** %t) {
call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t) call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t)
ret void ret void
} }
; CHECK-LABEL: funcname: ; CHECK-LABEL: funcname:
; CHECK: foo funcname{{$}} ; CHECK: foo funcname{{$}}
define void @funcname() { define void @funcname() {
tail call void asm sideeffect "foo $0", "i"(void ()* nonnull @funcname) #0, !srcloc !0 tail call void asm sideeffect "foo $0", "i"(void ()* nonnull @funcname) #0, !srcloc !0
ret void ret void
} }
; CHECK-LABEL: varname: ; CHECK-LABEL: varname:
; CHECK: foo gv+37{{$}} ; CHECK: foo gv+37{{$}}
@gv = global [0 x i8] zeroinitializer @gv = global [0 x i8] zeroinitializer
define void @varname() { define void @varname() {
tail call void asm sideeffect "foo $0", "i"(i8* getelementptr inbounds ([0 x i8], [0 x i8]* @gv, i64 0, i64 37)) #0, !srcloc !0 tail call void asm sideeffect "foo $0", "i"(i8* getelementptr inbounds ([0 x i8], [0 x i8]* @gv, i64 0, i64 37)) #0, !srcloc !0
ret void ret void
} }
; CHECK-LABEL: r_constraint ; CHECK-LABEL: r_constraint
; CHECK: i32.const $push[[S0:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: set_local [[L0:[0-9]+]], $pop[[S0]]{{$}} ; CHECK-NEXT: set_local [[L0:[0-9]+]]{{$}}
; CHECK-NEXT: i32.const $push[[S1:[0-9]+]]=, 37{{$}} ; CHECK-NEXT: i32.const 37{{$}}
; CHECK-NEXT: set_local [[L1:[0-9]+]], $pop[[S1]]{{$}} ; CHECK-NEXT: set_local [[L1:[0-9]+]]{{$}}
; CHECK: foo [[L2:[0-9]+]], 1, [[L0]], [[L1]]{{$}} ; CHECK: foo [[L2:[0-9]+]], 1, [[L0]], [[L1]]{{$}}
; CHECK: get_local $push{{[0-9]+}}=, [[L2]]{{$}} ; CHECK: get_local [[L2]]{{$}}
define hidden i32 @r_constraint(i32 %a, i32 %y) { define hidden i32 @r_constraint(i32 %a, i32 %y) {
entry: entry:
%z = bitcast i32 0 to i32 %z = bitcast i32 0 to i32
%t0 = tail call i32 asm "foo $0, $1, $2, $3", "=r,r,r,r"(i32 %y, i32 %z, i32 37) #0, !srcloc !0 %t0 = tail call i32 asm "foo $0, $1, $2, $3", "=r,r,r,r"(i32 %y, i32 %z, i32 37) #0, !srcloc !0
ret i32 %t0 ret i32 %t0
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }
!0 = !{i32 47} !0 = !{i32 47}
!1 = !{i32 145} !1 = !{i32 145}
!2 = !{i32 231} !2 = !{i32 231}

test/CodeGen/WebAssembly/irreducible-cfg.ll

; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-block-placement -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-block-placement | FileCheck %s
; Test irreducible CFG handling. ; Test irreducible CFG handling.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; A simple loop with two entries. ; A simple loop with two entries.
▲ Show 20 Lines • Show All 85 Lines • Show Last 20 Lines

test/CodeGen/WebAssembly/legalize.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test various types and operators that need to be legalized. ; Test various types and operators that need to be legalized.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: shl_i3: ; CHECK-LABEL: shl_i3:
; CHECK: i32.const $push0=, 7{{$}} ; CHECK: i32.const 7{{$}}
; CHECK: i32.and $push1=, $1, $pop0{{$}} ; CHECK: i32.and
; CHECK: i32.shl $push2=, $0, $pop1{{$}} ; CHECK: i32.shl
define i3 @shl_i3(i3 %a, i3 %b, i3* %p) { define i3 @shl_i3(i3 %a, i3 %b, i3* %p) {
%t = shl i3 %a, %b %t = shl i3 %a, %b
ret i3 %t ret i3 %t
} }
; CHECK-LABEL: shl_i53: ; CHECK-LABEL: shl_i53:
; CHECK: i64.const $push0=, 9007199254740991{{$}} ; CHECK: i64.const 9007199254740991{{$}}
; CHECK: i64.and $push1=, $1, $pop0{{$}} ; CHECK: i64.and
; CHECK: i64.shl $push2=, $0, $pop1{{$}} ; CHECK: i64.shl
define i53 @shl_i53(i53 %a, i53 %b, i53* %p) { define i53 @shl_i53(i53 %a, i53 %b, i53* %p) {
%t = shl i53 %a, %b %t = shl i53 %a, %b
ret i53 %t ret i53 %t
} }
; CHECK-LABEL: sext_in_reg_i32_i64: ; CHECK-LABEL: sext_in_reg_i32_i64:
; CHECK: i64.shl ; CHECK: i64.shl
; CHECK: i64.shr_s ; CHECK: i64.shr_s
define i64 @sext_in_reg_i32_i64(i64 %a) { define i64 @sext_in_reg_i32_i64(i64 %a) {
%b = shl i64 %a, 32 %b = shl i64 %a, 32
%c = ashr i64 %b, 32 %c = ashr i64 %b, 32
ret i64 %c ret i64 %c
} }
; CHECK-LABEL: fpext_f32_f64: ; CHECK-LABEL: fpext_f32_f64:
; CHECK: f32.load $push0=, 0($0){{$}} ; CHECK: f32.load 0{{$}}
; CHECK: f64.promote/f32 $push1=, $pop0{{$}} ; CHECK: f64.promote/f32{{$}}
; CHECK: return $pop1{{$}} ; CHECK: return{{$}}
define double @fpext_f32_f64(float *%p) { define double @fpext_f32_f64(float *%p) {
%v = load float, float* %p %v = load float, float* %p
%e = fpext float %v to double %e = fpext float %v to double
ret double %e ret double %e
} }
; CHECK-LABEL: fpconv_f64_f32: ; CHECK-LABEL: fpconv_f64_f32:
; CHECK: f64.load $push0=, 0($0){{$}} ; CHECK: f64.load 0{{$}}
; CHECK: f32.demote/f64 $push1=, $pop0{{$}} ; CHECK: f32.demote/f64{{$}}
; CHECK: return $pop1{{$}} ; CHECK: return{{$}}
define float @fpconv_f64_f32(double *%p) { define float @fpconv_f64_f32(double *%p) {
%v = load double, double* %p %v = load double, double* %p
%e = fptrunc double %v to float %e = fptrunc double %v to float
ret float %e ret float %e
} }
; Check that big shifts work. This generates a big pile of code from the ; Check that big shifts work. This generates a big pile of code from the
; legalizer; the main thing here is that we don't abort. ; legalizer; the main thing here is that we don't abort.
; CHECK-LABEL: bigshift: ; CHECK-LABEL: bigshift:
define i1024 @bigshift(i1024 %a, i1024 %b) { define i1024 @bigshift(i1024 %a, i1024 %b) {
%c = shl i1024 %a, %b %c = shl i1024 %a, %b
ret i1024 %c ret i1024 %c
} }

test/CodeGen/WebAssembly/libcalls.ll

Show First 20 Lines • Show All 46 Lines • ▼ Show 20 Linesdefine i128 @i128libcalls(i128 %x, i128 %y) {
%b = mul i128 %a, %y %b = mul i128 %a, %y
; CHECK: call __umodti3 ; CHECK: call __umodti3
%c = urem i128 %b, %y %c = urem i128 %b, %y
ret i128 %c ret i128 %c
} }
; CHECK-LABEL: f64libcalls: ; CHECK-LABEL: f64libcalls:
define double @f64libcalls(double %x, double %y) { define double @f64libcalls(double %x, double %y) {
; CHECK: f64.call $push{{[0-9]}}=, cos@FUNCTION ; CHECK: f64.call cos@FUNCTION
%a = call double @llvm.cos.f64(double %x) %a = call double @llvm.cos.f64(double %x)
; CHECK: f64.call $push{{[0-9]}}=, log10@FUNCTION ; CHECK: f64.call log10@FUNCTION
%b = call double @llvm.log10.f64(double %a) %b = call double @llvm.log10.f64(double %a)
ret double %b ret double %b
} }
; fcmp ord and unord (RTLIB::O_F32 / RTLIB::UO_F32 etc) are a special case (see ; fcmp ord and unord (RTLIB::O_F32 / RTLIB::UO_F32 etc) are a special case (see
; comment in WebAssemblyRunimeLibcallSignatures.cpp) so check them separately. ; comment in WebAssemblyRunimeLibcallSignatures.cpp) so check them separately.
; no libcalls are needed for f32 and f64 ; no libcalls are needed for f32 and f64
Show All 20 Lines
%b = fcmp ord float %x, %y %b = fcmp ord float %x, %y
; CHECK: i32.xor ; CHECK: i32.xor
%c = xor i1 %a, %b %c = xor i1 %a, %b
ret i1 %c ret i1 %c
} }
; CHECK-LABEL: unordt: ; CHECK-LABEL: unordt:
define i1 @unordt(fp128 %x, fp128 %y) { define i1 @unordt(fp128 %x, fp128 %y) {
; CHECK: i32.call $push[[CALL:[0-9]]]=, __unordtf2 ; CHECK: i32.call __unordtf2
; CHECK-NEXT: i32.const $push[[ZERO:[0-9]+]]=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.ne $push{{[0-9]}}=, $pop[[CALL]], $pop[[ZERO]] ; CHECK-NEXT: i32.ne
%a = fcmp uno fp128 %x, %y %a = fcmp uno fp128 %x, %y
ret i1 %a ret i1 %a
} }
; CHECK-LABEL: ordt: ; CHECK-LABEL: ordt:
define i1 @ordt(fp128 %x, fp128 %y) { define i1 @ordt(fp128 %x, fp128 %y) {
; CHECK: i32.call $push[[CALL:[0-9]]]=, __unordtf2 ; CHECK: i32.call __unordtf2
; CHECK-NEXT: i32.eqz $push{{[0-9]}}=, $pop[[CALL]] ; CHECK-NEXT: i32.eqz
%a = fcmp ord fp128 %x, %y %a = fcmp ord fp128 %x, %y
ret i1 %a ret i1 %a
} }

test/CodeGen/WebAssembly/load-ext-atomic.ll

; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that extending loads are assembled properly. ; Test that extending loads are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sext_i8_i32: ; CHECK-LABEL: sext_i8_i32:
; CHECK: i32.atomic.load8_u $push0=, 0($0){{$}} ; CHECK: i32.atomic.load8_u 0{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}} ; CHECK-NEXT: i32.extend8_s{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sext_i8_i32(i8 *%p) { define i32 @sext_i8_i32(i8 *%p) {
%v = load atomic i8, i8* %p seq_cst, align 1 %v = load atomic i8, i8* %p seq_cst, align 1
%e = sext i8 %v to i32 %e = sext i8 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: zext_i8_i32: ; CHECK-LABEL: zext_i8_i32:
; CHECK: i32.atomic.load8_u $push0=, 0($0){{$}} ; CHECK: i32.atomic.load8_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @zext_i8_i32(i8 *%p) { define i32 @zext_i8_i32(i8 *%p) {
e1: e1:
%v = load atomic i8, i8* %p seq_cst, align 1 %v = load atomic i8, i8* %p seq_cst, align 1
%e = zext i8 %v to i32 %e = zext i8 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: sext_i16_i32: ; CHECK-LABEL: sext_i16_i32:
; CHECK: i32.atomic.load16_u $push0=, 0($0){{$}} ; CHECK: i32.atomic.load16_u 0{{$}}
; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}} ; CHECK-NEXT: i32.extend16_s{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sext_i16_i32(i16 *%p) { define i32 @sext_i16_i32(i16 *%p) {
%v = load atomic i16, i16* %p seq_cst, align 2 %v = load atomic i16, i16* %p seq_cst, align 2
%e = sext i16 %v to i32 %e = sext i16 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: zext_i16_i32: ; CHECK-LABEL: zext_i16_i32:
; CHECK: i32.atomic.load16_u $push0=, 0($0){{$}} ; CHECK: i32.atomic.load16_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @zext_i16_i32(i16 *%p) { define i32 @zext_i16_i32(i16 *%p) {
%v = load atomic i16, i16* %p seq_cst, align 2 %v = load atomic i16, i16* %p seq_cst, align 2
%e = zext i16 %v to i32 %e = zext i16 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: sext_i8_i64: ; CHECK-LABEL: sext_i8_i64:
; CHECK: i64.atomic.load8_u $push0=, 0($0){{$}} ; CHECK: i64.atomic.load8_u 0{{$}}
; CHECK: i64.extend8_s $push1=, $pop0{{$}} ; CHECK: i64.extend8_s{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i8_i64(i8 *%p) { define i64 @sext_i8_i64(i8 *%p) {
%v = load atomic i8, i8* %p seq_cst, align 1 %v = load atomic i8, i8* %p seq_cst, align 1
%e = sext i8 %v to i64 %e = sext i8 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i8_i64: ; CHECK-LABEL: zext_i8_i64:
; CHECK: i64.atomic.load8_u $push0=, 0($0){{$}} ; CHECK: i64.atomic.load8_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @zext_i8_i64(i8 *%p) { define i64 @zext_i8_i64(i8 *%p) {
%v = load atomic i8, i8* %p seq_cst, align 1 %v = load atomic i8, i8* %p seq_cst, align 1
%e = zext i8 %v to i64 %e = zext i8 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: sext_i16_i64: ; CHECK-LABEL: sext_i16_i64:
; CHECK: i64.atomic.load16_u $push0=, 0($0){{$}} ; CHECK: i64.atomic.load16_u 0{{$}}
; CHECK: i64.extend16_s $push1=, $pop0{{$}} ; CHECK: i64.extend16_s{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i16_i64(i16 *%p) { define i64 @sext_i16_i64(i16 *%p) {
%v = load atomic i16, i16* %p seq_cst, align 2 %v = load atomic i16, i16* %p seq_cst, align 2
%e = sext i16 %v to i64 %e = sext i16 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i16_i64: ; CHECK-LABEL: zext_i16_i64:
; CHECK: i64.atomic.load16_u $push0=, 0($0){{$}} ; CHECK: i64.atomic.load16_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @zext_i16_i64(i16 *%p) { define i64 @zext_i16_i64(i16 *%p) {
%v = load atomic i16, i16* %p seq_cst, align 2 %v = load atomic i16, i16* %p seq_cst, align 2
%e = zext i16 %v to i64 %e = zext i16 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: sext_i32_i64: ; CHECK-LABEL: sext_i32_i64:
; CHECK: i32.atomic.load $push0=, 0($0){{$}} ; CHECK: i32.atomic.load 0{{$}}
; CHECK: i64.extend_s/i32 $push1=, $pop0{{$}} ; CHECK: i64.extend_s/i32{{$}}
; CHECK-NEXT: return $pop1{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i32_i64(i32 *%p) { define i64 @sext_i32_i64(i32 *%p) {
%v = load atomic i32, i32* %p seq_cst, align 4 %v = load atomic i32, i32* %p seq_cst, align 4
%e = sext i32 %v to i64 %e = sext i32 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i32_i64: ; CHECK-LABEL: zext_i32_i64:
; CHECK: i64.atomic.load32_u $push0=, 0($0){{$}} ; CHECK: i64.atomic.load32_u 0{{$}}
; CHECK: return $pop0{{$}} ; CHECK: return{{$}}
define i64 @zext_i32_i64(i32 *%p) { define i64 @zext_i32_i64(i32 *%p) {
%v = load atomic i32, i32* %p seq_cst, align 4 %v = load atomic i32, i32* %p seq_cst, align 4
%e = zext i32 %v to i64 %e = zext i32 %v to i64
ret i64 %e ret i64 %e
} }

test/CodeGen/WebAssembly/load-ext.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that extending loads are assembled properly. ; Test that extending loads are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sext_i8_i32: ; CHECK-LABEL: sext_i8_i32:
; CHECK: i32.load8_s $push0=, 0($0){{$}} ; CHECK: i32.load8_s 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sext_i8_i32(i8 *%p) { define i32 @sext_i8_i32(i8 *%p) {
%v = load i8, i8* %p %v = load i8, i8* %p
%e = sext i8 %v to i32 %e = sext i8 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: zext_i8_i32: ; CHECK-LABEL: zext_i8_i32:
; CHECK: i32.load8_u $push0=, 0($0){{$}} ; CHECK: i32.load8_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @zext_i8_i32(i8 *%p) { define i32 @zext_i8_i32(i8 *%p) {
%v = load i8, i8* %p %v = load i8, i8* %p
%e = zext i8 %v to i32 %e = zext i8 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: sext_i16_i32: ; CHECK-LABEL: sext_i16_i32:
; CHECK: i32.load16_s $push0=, 0($0){{$}} ; CHECK: i32.load16_s 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @sext_i16_i32(i16 *%p) { define i32 @sext_i16_i32(i16 *%p) {
%v = load i16, i16* %p %v = load i16, i16* %p
%e = sext i16 %v to i32 %e = sext i16 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: zext_i16_i32: ; CHECK-LABEL: zext_i16_i32:
; CHECK: i32.load16_u $push0=, 0($0){{$}} ; CHECK: i32.load16_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @zext_i16_i32(i16 *%p) { define i32 @zext_i16_i32(i16 *%p) {
%v = load i16, i16* %p %v = load i16, i16* %p
%e = zext i16 %v to i32 %e = zext i16 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: sext_i8_i64: ; CHECK-LABEL: sext_i8_i64:
; CHECK: i64.load8_s $push0=, 0($0){{$}} ; CHECK: i64.load8_s 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i8_i64(i8 *%p) { define i64 @sext_i8_i64(i8 *%p) {
%v = load i8, i8* %p %v = load i8, i8* %p
%e = sext i8 %v to i64 %e = sext i8 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i8_i64: ; CHECK-LABEL: zext_i8_i64:
; CHECK: i64.load8_u $push0=, 0($0){{$}} ; CHECK: i64.load8_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @zext_i8_i64(i8 *%p) { define i64 @zext_i8_i64(i8 *%p) {
%v = load i8, i8* %p %v = load i8, i8* %p
%e = zext i8 %v to i64 %e = zext i8 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: sext_i16_i64: ; CHECK-LABEL: sext_i16_i64:
; CHECK: i64.load16_s $push0=, 0($0){{$}} ; CHECK: i64.load16_s 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i16_i64(i16 *%p) { define i64 @sext_i16_i64(i16 *%p) {
%v = load i16, i16* %p %v = load i16, i16* %p
%e = sext i16 %v to i64 %e = sext i16 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i16_i64: ; CHECK-LABEL: zext_i16_i64:
; CHECK: i64.load16_u $push0=, 0($0){{$}} ; CHECK: i64.load16_u 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @zext_i16_i64(i16 *%p) { define i64 @zext_i16_i64(i16 *%p) {
%v = load i16, i16* %p %v = load i16, i16* %p
%e = zext i16 %v to i64 %e = zext i16 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: sext_i32_i64: ; CHECK-LABEL: sext_i32_i64:
; CHECK: i64.load32_s $push0=, 0($0){{$}} ; CHECK: i64.load32_s 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i64 @sext_i32_i64(i32 *%p) { define i64 @sext_i32_i64(i32 *%p) {
%v = load i32, i32* %p %v = load i32, i32* %p
%e = sext i32 %v to i64 %e = sext i32 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: zext_i32_i64: ; CHECK-LABEL: zext_i32_i64:
; CHECK: i64.load32_u $push0=, 0($0){{$}} ; CHECK: i64.load32_u 0{{$}}
; CHECK: return $pop0{{$}} ; CHECK: return{{$}}
define i64 @zext_i32_i64(i32 *%p) { define i64 @zext_i32_i64(i32 *%p) {
%v = load i32, i32* %p %v = load i32, i32* %p
%e = zext i32 %v to i64 %e = zext i32 %v to i64
ret i64 %e ret i64 %e
} }

test/CodeGen/WebAssembly/load-store-i1.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that i1 extending loads and truncating stores are assembled properly. ; Test that i1 extending loads and truncating stores are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: load_u_i1_i32: ; CHECK-LABEL: load_u_i1_i32:
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK: i32.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM0]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @load_u_i1_i32(i1* %p) { define i32 @load_u_i1_i32(i1* %p) {
%v = load i1, i1* %p %v = load i1, i1* %p
%e = zext i1 %v to i32 %e = zext i1 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: load_s_i1_i32: ; CHECK-LABEL: load_s_i1_i32:
; CHECK: i32.const $push[[NUM3:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK-NEXT: i32.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load8_u 0{{$}}
; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: i32.sub $push[[NUM4:[0-9]+]]=, $pop[[NUM3]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.sub{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @load_s_i1_i32(i1* %p) { define i32 @load_s_i1_i32(i1* %p) {
%v = load i1, i1* %p %v = load i1, i1* %p
%e = sext i1 %v to i32 %e = sext i1 %v to i32
ret i32 %e ret i32 %e
} }
; CHECK-LABEL: load_u_i1_i64: ; CHECK-LABEL: load_u_i1_i64:
; CHECK: i64.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK: i64.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM0]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @load_u_i1_i64(i1* %p) { define i64 @load_u_i1_i64(i1* %p) {
%v = load i1, i1* %p %v = load i1, i1* %p
%e = zext i1 %v to i64 %e = zext i1 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: load_s_i1_i64: ; CHECK-LABEL: load_s_i1_i64:
; CHECK: i64.const $push[[NUM3:[0-9]+]]=, 0{{$}} ; CHECK: i64.const 0{{$}}
; CHECK-NEXT: i64.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i64.load8_u 0{{$}}
; CHECK-NEXT: i64.const $push[[NUM1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: i64.const 1{{$}}
; CHECK-NEXT: i64.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i64.and{{$}}
; CHECK-NEXT: i64.sub $push[[NUM4:[0-9]+]]=, $pop[[NUM3]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i64.sub{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @load_s_i1_i64(i1* %p) { define i64 @load_s_i1_i64(i1* %p) {
%v = load i1, i1* %p %v = load i1, i1* %p
%e = sext i1 %v to i64 %e = sext i1 %v to i64
ret i64 %e ret i64 %e
} }
; CHECK-LABEL: store_i32_i1: ; CHECK-LABEL: store_i32_i1:
; CHECK: i32.const $push[[NUM0:[0-9]+]]=, 1{{$}} ; CHECK: i32.const 1{{$}}
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $1, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.and
; CHECK-NEXT: i32.store8 0($0), $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.store8 0{{$}}
define void @store_i32_i1(i1* %p, i32 %v) { define void @store_i32_i1(i1* %p, i32 %v) {
%t = trunc i32 %v to i1 %t = trunc i32 %v to i1
store i1 %t, i1* %p store i1 %t, i1* %p
ret void ret void
} }
; CHECK-LABEL: store_i64_i1: ; CHECK-LABEL: store_i64_i1:
; CHECK: i64.const $push[[NUM0:[0-9]+]]=, 1{{$}} ; CHECK: i64.const 1{{$}}
; CHECK-NEXT: i64.and $push[[NUM1:[0-9]+]]=, $1, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i64.and
; CHECK-NEXT: i64.store8 0($0), $pop[[NUM1]]{{$}} ; CHECK-NEXT: i64.store8 0{{$}}
define void @store_i64_i1(i1* %p, i64 %v) { define void @store_i64_i1(i1* %p, i64 %v) {
%t = trunc i64 %v to i1 %t = trunc i64 %v to i1
store i1 %t, i1* %p store i1 %t, i1* %p
ret void ret void
} }

test/CodeGen/WebAssembly/load.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic loads are assembled properly. ; Test that basic loads are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: ldi32: ; CHECK-LABEL: ldi32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @ldi32(i32 *%p) { define i32 @ldi32(i32 *%p) {
%v = load i32, i32* %p %v = load i32, i32* %p
ret i32 %v ret i32 %v
} }
; CHECK-LABEL: ldi64: ; CHECK-LABEL: ldi64:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}} ; CHECK-NEXT: i64.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @ldi64(i64 *%p) { define i64 @ldi64(i64 *%p) {
%v = load i64, i64* %p %v = load i64, i64* %p
ret i64 %v ret i64 %v
} }
; CHECK-LABEL: ldf32: ; CHECK-LABEL: ldf32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}} ; CHECK-NEXT: f32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define float @ldf32(float *%p) { define float @ldf32(float *%p) {
%v = load float, float* %p %v = load float, float* %p
ret float %v ret float %v
} }
; CHECK-LABEL: ldf64: ; CHECK-LABEL: ldf64:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}} ; CHECK-NEXT: f64.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define double @ldf64(double *%p) { define double @ldf64(double *%p) {
%v = load double, double* %p %v = load double, double* %p
ret double %v ret double %v
} }

test/CodeGen/WebAssembly/lower-global-dtors.ll

Show All 39 Lines
] ]
; CHECK-LABEL: .Lcall_dtors.0: ; CHECK-LABEL: .Lcall_dtors.0:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call orig_dtor0@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor0@FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.0: ; CHECK-LABEL: .Lregister_call_dtors.0:
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.0@FUNCTION{{$}} ; CHECK-NEXT: i32.const .Lcall_dtors.0@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.const $push0=, __dso_handle ; CHECK-NEXT: i32.const __dso_handle
; CHECK-NEXT: i32.call $push3=, __cxa_atexit@FUNCTION, $pop2, $pop1, $pop0{{$}} ; CHECK-NEXT: i32.call __cxa_atexit@FUNCTION{{$}}
; CHECK-NEXT: br_if 0, $pop3 ; CHECK-NEXT: br_if 0
; CHECK-NEXT: return ; CHECK-NEXT: return
; CHECK: end_block ; CHECK: end_block
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1: ; CHECK-LABEL: .Lcall_dtors.1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call orig_dtor1a@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor1a@FUNCTION{{$}}
; CHECK-NEXT: call orig_dtor1b@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor1b@FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1: ; CHECK-LABEL: .Lregister_call_dtors.1:
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1@FUNCTION{{$}} ; CHECK-NEXT: i32.const .Lcall_dtors.1@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.const $push0=, __dso_handle ; CHECK-NEXT: i32.const __dso_handle
; CHECK-NEXT: i32.call $push3=, __cxa_atexit@FUNCTION, $pop2, $pop1, $pop0{{$}} ; CHECK-NEXT: i32.call __cxa_atexit@FUNCTION{{$}}
; CHECK-NEXT: br_if 0, $pop3 ; CHECK-NEXT: br_if 0
; CHECK-NEXT: return ; CHECK-NEXT: return
; CHECK: end_block ; CHECK: end_block
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1.associated1c0: ; CHECK-LABEL: .Lcall_dtors.1.associated1c0:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call orig_dtor1c0@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor1c0@FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1.associated1c0: ; CHECK-LABEL: .Lregister_call_dtors.1.associated1c0:
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1.associated1c0@FUNCTION{{$}} ; CHECK-NEXT: i32.const .Lcall_dtors.1.associated1c0@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.const $push0=, __dso_handle ; CHECK-NEXT: i32.const __dso_handle
; CHECK-NEXT: i32.call $push3=, __cxa_atexit@FUNCTION, $pop2, $pop1, $pop0{{$}} ; CHECK-NEXT: i32.call __cxa_atexit@FUNCTION{{$}}
; CHECK-NEXT: br_if 0, $pop3 ; CHECK-NEXT: br_if 0
; CHECK-NEXT: return ; CHECK-NEXT: return
; CHECK: end_block ; CHECK: end_block
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors.1.associated1c1: ; CHECK-LABEL: .Lcall_dtors.1.associated1c1:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call orig_dtor1c1a@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor1c1a@FUNCTION{{$}}
; CHECK-NEXT: call orig_dtor1c1b@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor1c1b@FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors.1.associated1c1: ; CHECK-LABEL: .Lregister_call_dtors.1.associated1c1:
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors.1.associated1c1@FUNCTION{{$}} ; CHECK-NEXT: i32.const .Lcall_dtors.1.associated1c1@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.const $push0=, __dso_handle ; CHECK-NEXT: i32.const __dso_handle
; CHECK-NEXT: i32.call $push3=, __cxa_atexit@FUNCTION, $pop2, $pop1, $pop0{{$}} ; CHECK-NEXT: i32.call __cxa_atexit@FUNCTION{{$}}
; CHECK-NEXT: br_if 0, $pop3 ; CHECK-NEXT: br_if 0
; CHECK-NEXT: return ; CHECK-NEXT: return
; CHECK: end_block ; CHECK: end_block
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK-LABEL: .Lcall_dtors: ; CHECK-LABEL: .Lcall_dtors:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: call orig_dtor65536@FUNCTION{{$}} ; CHECK-NEXT: call orig_dtor65536@FUNCTION{{$}}
; CHECK-LABEL: .Lregister_call_dtors: ; CHECK-LABEL: .Lregister_call_dtors:
; CHECK-NEXT: block ; CHECK-NEXT: block
; CHECK-NEXT: i32.const $push2=, .Lcall_dtors@FUNCTION{{$}} ; CHECK-NEXT: i32.const .Lcall_dtors@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push1=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.const $push0=, __dso_handle ; CHECK-NEXT: i32.const __dso_handle
; CHECK-NEXT: i32.call $push3=, __cxa_atexit@FUNCTION, $pop2, $pop1, $pop0{{$}} ; CHECK-NEXT: i32.call __cxa_atexit@FUNCTION{{$}}
; CHECK-NEXT: br_if 0, $pop3 ; CHECK-NEXT: br_if 0
; CHECK-NEXT: return ; CHECK-NEXT: return
; CHECK: end_block ; CHECK: end_block
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK-LABEL: .section .init_array.0,"",@ ; CHECK-LABEL: .section .init_array.0,"",@
; CHECK: .int32 .Lregister_call_dtors.0@FUNCTION{{$}} ; CHECK: .int32 .Lregister_call_dtors.0@FUNCTION{{$}}
; CHECK-LABEL: .section .init_array.1,"",@ ; CHECK-LABEL: .section .init_array.1,"",@
; CHECK: .int32 .Lregister_call_dtors.1@FUNCTION{{$}} ; CHECK: .int32 .Lregister_call_dtors.1@FUNCTION{{$}}
Show All 17 Lines

test/CodeGen/WebAssembly/mem-intrinsics.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -tail-dup-placement=0 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -tail-dup-placement=0 | FileCheck %s
; Test memcpy, memmove, and memset intrinsics. ; Test memcpy, memmove, and memset intrinsics.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1)
; Test that return values are optimized. ; Test that return values are optimized.
; CHECK-LABEL: copy_yes: ; CHECK-LABEL: copy_yes:
; CHECK: i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memcpy@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i8* @copy_yes(i8* %dst, i8* %src, i32 %len) { define i8* @copy_yes(i8* %dst, i8* %src, i32 %len) {
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false)
ret i8* %dst ret i8* %dst
} }
; CHECK-LABEL: copy_no: ; CHECK-LABEL: copy_no:
; CHECK: i32.call $drop=, memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memcpy@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @copy_no(i8* %dst, i8* %src, i32 %len) { define void @copy_no(i8* %dst, i8* %src, i32 %len) {
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false)
ret void ret void
} }
; CHECK-LABEL: move_yes: ; CHECK-LABEL: move_yes:
; CHECK: i32.call $push0=, memmove@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memmove@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i8* @move_yes(i8* %dst, i8* %src, i32 %len) { define i8* @move_yes(i8* %dst, i8* %src, i32 %len) {
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false)
ret i8* %dst ret i8* %dst
} }
; CHECK-LABEL: move_no: ; CHECK-LABEL: move_no:
; CHECK: i32.call $drop=, memmove@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memmove@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @move_no(i8* %dst, i8* %src, i32 %len) { define void @move_no(i8* %dst, i8* %src, i32 %len) {
call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false) call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, i32 %len, i1 false)
ret void ret void
} }
; CHECK-LABEL: set_yes: ; CHECK-LABEL: set_yes:
; CHECK: i32.call $push0=, memset@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memset@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i8* @set_yes(i8* %dst, i8 %src, i32 %len) { define i8* @set_yes(i8* %dst, i8 %src, i32 %len) {
call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i1 false) call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i1 false)
ret i8* %dst ret i8* %dst
} }
; CHECK-LABEL: set_no: ; CHECK-LABEL: set_no:
; CHECK: i32.call $drop=, memset@FUNCTION, $0, $1, $2{{$}} ; CHECK: i32.call memset@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @set_no(i8* %dst, i8 %src, i32 %len) { define void @set_no(i8* %dst, i8 %src, i32 %len) {
call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i1 false) call void @llvm.memset.p0i8.i32(i8* %dst, i8 %src, i32 %len, i1 false)
ret void ret void
} }
; CHECK-LABEL: frame_index: ; CHECK-LABEL: frame_index:
; CHECK: i32.call $drop=, memset@FUNCTION, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.call memset@FUNCTION{{$}}
; CHECK: i32.call $push{{[0-9]+}}=, memset@FUNCTION, ${{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: i32.call memset@FUNCTION{{$}}
; CHECK: return{{$}} ; CHECK: return{{$}}
define void @frame_index() { define void @frame_index() {
entry: entry:
%a = alloca [2048 x i8], align 16 %a = alloca [2048 x i8], align 16
%b = alloca [2048 x i8], align 16 %b = alloca [2048 x i8], align 16
%0 = getelementptr inbounds [2048 x i8], [2048 x i8]* %a, i32 0, i32 0 %0 = getelementptr inbounds [2048 x i8], [2048 x i8]* %a, i32 0, i32 0
%1 = getelementptr inbounds [2048 x i8], [2048 x i8]* %b, i32 0, i32 0 %1 = getelementptr inbounds [2048 x i8], [2048 x i8]* %b, i32 0, i32 0
call void @llvm.memset.p0i8.i32(i8* align 16 %0, i8 256, i32 1024, i1 false) call void @llvm.memset.p0i8.i32(i8* align 16 %0, i8 256, i32 1024, i1 false)
call void @llvm.memset.p0i8.i32(i8* align 16 %1, i8 256, i32 1024, i1 false) call void @llvm.memset.p0i8.i32(i8* align 16 %1, i8 256, i32 1024, i1 false)
ret void ret void
} }
; If the result value of memset doesn't get stackified, it should be marked ; If the result value of memset doesn't get stackified, it should be marked
; $drop. Note that we use a call to prevent tail dup so that we can test ; $drop. Note that we use a call to prevent tail dup so that we can test
; this specific functionality. ; this specific functionality.
; CHECK-LABEL: drop_result: ; CHECK-LABEL: drop_result:
; CHECK: i32.call $drop=, memset@FUNCTION, $0, $1, $2 ; CHECK: i32.call memset@FUNCTION
declare i8* @def() declare i8* @def()
declare void @block_tail_dup() declare void @block_tail_dup()
define i8* @drop_result(i8* %arg, i8 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) { define i8* @drop_result(i8* %arg, i8 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
bb: bb:
%tmp = icmp eq i32 %arg3, 0 %tmp = icmp eq i32 %arg3, 0
br i1 %tmp, label %bb5, label %bb9 br i1 %tmp, label %bb5, label %bb9
bb5: bb5:
Show All 16 Linesbb11:
call void @block_tail_dup() call void @block_tail_dup()
ret i8* %tmp12 ret i8* %tmp12
} }
; This is the same as drop_result, except we let tail dup happen, so the ; This is the same as drop_result, except we let tail dup happen, so the
; result of the memset *is* stackified. ; result of the memset *is* stackified.
; CHECK-LABEL: tail_dup_to_reuse_result: ; CHECK-LABEL: tail_dup_to_reuse_result:
; CHECK: i32.call $push{{[0-9]+}}=, memset@FUNCTION, $0, $1, $2 ; CHECK: i32.call memset@FUNCTION
define i8* @tail_dup_to_reuse_result(i8* %arg, i8 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) { define i8* @tail_dup_to_reuse_result(i8* %arg, i8 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
bb: bb:
%tmp = icmp eq i32 %arg3, 0 %tmp = icmp eq i32 %arg3, 0
br i1 %tmp, label %bb5, label %bb9 br i1 %tmp, label %bb5, label %bb9
bb5: bb5:
%tmp6 = icmp eq i32 %arg4, 0 %tmp6 = icmp eq i32 %arg4, 0
br i1 %tmp6, label %bb7, label %bb8 br i1 %tmp6, label %bb7, label %bb8
Show All 16 Lines

test/CodeGen/WebAssembly/memory-addr32.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that basic memory operations assemble as expected with 32-bit addresses. ; Test that basic memory operations assemble as expected with 32-bit addresses.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare i32 @llvm.wasm.memory.size.i32(i32) nounwind readonly declare i32 @llvm.wasm.memory.size.i32(i32) nounwind readonly
declare i32 @llvm.wasm.memory.grow.i32(i32, i32) nounwind declare i32 @llvm.wasm.memory.grow.i32(i32, i32) nounwind
declare i32 @llvm.wasm.mem.size.i32(i32) nounwind readonly declare i32 @llvm.wasm.mem.size.i32(i32) nounwind readonly
declare i32 @llvm.wasm.mem.grow.i32(i32, i32) nounwind declare i32 @llvm.wasm.mem.grow.i32(i32, i32) nounwind
declare i32 @llvm.wasm.current.memory.i32() nounwind readonly declare i32 @llvm.wasm.current.memory.i32() nounwind readonly
declare i32 @llvm.wasm.grow.memory.i32(i32) nounwind declare i32 @llvm.wasm.grow.memory.i32(i32) nounwind
; CHECK-LABEL: memory_size: ; CHECK-LABEL: memory_size:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: memory.size $push0=, 0{{$}} ; CHECK-NEXT: memory.size 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @memory_size() { define i32 @memory_size() {
%a = call i32 @llvm.wasm.memory.size.i32(i32 0) %a = call i32 @llvm.wasm.memory.size.i32(i32 0)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: memory_grow: ; CHECK-LABEL: memory_grow:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK: memory.grow $push0=, 0, $0{{$}} ; CHECK: memory.grow 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @memory_grow(i32 %n) { define i32 @memory_grow(i32 %n) {
%a = call i32 @llvm.wasm.memory.grow.i32(i32 0, i32 %n) %a = call i32 @llvm.wasm.memory.grow.i32(i32 0, i32 %n)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: mem_size: ; CHECK-LABEL: mem_size:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: mem.size $push0=, 0{{$}} ; CHECK-NEXT: mem.size 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @mem_size() { define i32 @mem_size() {
%a = call i32 @llvm.wasm.mem.size.i32(i32 0) %a = call i32 @llvm.wasm.mem.size.i32(i32 0)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: mem_grow: ; CHECK-LABEL: mem_grow:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK: mem.grow $push0=, 0, $0{{$}} ; CHECK: mem.grow 0{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @mem_grow(i32 %n) { define i32 @mem_grow(i32 %n) {
%a = call i32 @llvm.wasm.mem.grow.i32(i32 0, i32 %n) %a = call i32 @llvm.wasm.mem.grow.i32(i32 0, i32 %n)
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: current_memory: ; CHECK-LABEL: current_memory:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: current_memory $push0={{$}} ; CHECK-NEXT: current_memory{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @current_memory() { define i32 @current_memory() {
%a = call i32 @llvm.wasm.current.memory.i32() %a = call i32 @llvm.wasm.current.memory.i32()
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: grow_memory: ; CHECK-LABEL: grow_memory:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK: grow_memory $push0=, $0{{$}} ; CHECK: grow_memory
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return{{$}}
define i32 @grow_memory(i32 %n) { define i32 @grow_memory(i32 %n) {
%a = call i32 @llvm.wasm.grow.memory.i32(i32 %n) %a = call i32 @llvm.wasm.grow.memory.i32(i32 %n)
ret i32 %a ret i32 %a
} }

test/CodeGen/WebAssembly/muloti4.ll

; RUN: llc -asm-verbose=false < %s | FileCheck %s ; RUN: llc -asm-verbose=false < %s | FileCheck %s
; Test that 128-bit smul.with.overflow assembles as expected. ; Test that 128-bit smul.with.overflow assembles as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
define i128 @call_muloti4(i128 %a, i128 %b) nounwind { define i128 @call_muloti4(i128 %a, i128 %b) nounwind {
entry: entry:
%smul = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %a, i128 %b) %smul = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %a, i128 %b)
%cmp = extractvalue { i128, i1 } %smul, 1 %cmp = extractvalue { i128, i1 } %smul, 1
%smul.result = extractvalue { i128, i1 } %smul, 0 %smul.result = extractvalue { i128, i1 } %smul, 0
%X = select i1 %cmp, i128 %smul.result, i128 42 %X = select i1 %cmp, i128 %smul.result, i128 42
ret i128 %X ret i128 %X
} }
; CHECK: call __muloti4@FUNCTION, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}{{$}} ; CHECK: call __muloti4@FUNCTION{{$}}
declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone

test/CodeGen/WebAssembly/negative-base-reg.ll

; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
@args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16 @args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16
; Function Attrs: norecurse nounwind ; Function Attrs: norecurse nounwind
define hidden i32 @main() local_unnamed_addr #0 { define hidden i32 @main() local_unnamed_addr #0 {
; If LSR stops selecting a negative base reg value, then this test will no ; If LSR stops selecting a negative base reg value, then this test will no
; longer be useful as written. ; longer be useful as written.
; CHECK: i32.const $push[[L0:[0-9]+]]=, -128 ; CHECK: i32.const -128
; CHECK-NEXT: set_local 0, $pop[[L0]] ; CHECK-NEXT: set_local 0
entry: entry:
br label %for.body br label %for.body
for.body: ; preds = %for.body, %entry for.body: ; preds = %for.body, %entry
%i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
; The offset should not be folded into the store. ; The offset should not be folded into the store.
; CHECK: i32.const $push{{[0-9]+}}=, args+128 ; CHECK: i32.const args+128
; CHECK: i32.add $push[[L1:[0-9]+]]=, ; CHECK: i32.add
; CHECK: i32.store 0($pop[[L1]]) ; CHECK: i32.store 0
%arrayidx = getelementptr inbounds [32 x i32], [32 x i32]* @args, i32 0, i32 %i.04 %arrayidx = getelementptr inbounds [32 x i32], [32 x i32]* @args, i32 0, i32 %i.04
store i32 1, i32* %arrayidx, align 4, !tbaa !1 store i32 1, i32* %arrayidx, align 4, !tbaa !1
%inc = add nuw nsw i32 %i.04, 1 %inc = add nuw nsw i32 %i.04, 1
%exitcond = icmp eq i32 %inc, 32 %exitcond = icmp eq i32 %inc, 32
br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !5 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !5
for.end: ; preds = %for.body for.end: ; preds = %for.body
ret i32 0 ret i32 0
Show All 13 Lines

test/CodeGen/WebAssembly/offset-atomics.ll

; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt ; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+atomics,+sign-ext | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=+atomics,+sign-ext | FileCheck %s
; Test that atomic loads are assembled properly. ; Test that atomic loads are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Basic load. ; Basic load.
; CHECK-LABEL: load_i32_no_offset: ; CHECK-LABEL: load_i32_no_offset:
; CHECK: i32.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK: i32.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @load_i32_no_offset(i32 *%p) { define i32 @load_i32_no_offset(i32 *%p) {
%v = load atomic i32, i32* %p seq_cst, align 4 %v = load atomic i32, i32* %p seq_cst, align 4
ret i32 %v ret i32 %v
} }
; With an nuw add, we can fold an offset. ; With an nuw add, we can fold an offset.
; CHECK-LABEL: load_i32_with_folded_offset: ; CHECK-LABEL: load_i32_with_folded_offset:
; CHECK: i32.atomic.load $push0=, 24($0){{$}} ; CHECK: i32.atomic.load 24{{$}}
define i32 @load_i32_with_folded_offset(i32* %p) { define i32 @load_i32_with_folded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; With an inbounds gep, we can fold an offset. ; With an inbounds gep, we can fold an offset.
; CHECK-LABEL: load_i32_with_folded_gep_offset: ; CHECK-LABEL: load_i32_with_folded_gep_offset:
; CHECK: i32.atomic.load $push0=, 24($0){{$}} ; CHECK: i32.atomic.load 24{{$}}
define i32 @load_i32_with_folded_gep_offset(i32* %p) { define i32 @load_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; We can't fold a negative offset though, even with an inbounds gep. ; We can't fold a negative offset though, even with an inbounds gep.
; CHECK-LABEL: load_i32_with_unfolded_gep_negative_offset: ; CHECK-LABEL: load_i32_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i32.atomic.load 0{{$}}
define i32 @load_i32_with_unfolded_gep_negative_offset(i32* %p) { define i32 @load_i32_with_unfolded_gep_negative_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 -6 %s = getelementptr inbounds i32, i32* %p, i32 -6
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; Without nuw, and even with nsw, we can't fold an offset. ; Without nuw, and even with nsw, we can't fold an offset.
; CHECK-LABEL: load_i32_with_unfolded_offset: ; CHECK-LABEL: load_i32_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i32.atomic.load 0{{$}}
define i32 @load_i32_with_unfolded_offset(i32* %p) { define i32 @load_i32_with_unfolded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; Without inbounds, we can't fold a gep offset. ; Without inbounds, we can't fold a gep offset.
; CHECK-LABEL: load_i32_with_unfolded_gep_offset: ; CHECK-LABEL: load_i32_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i32.atomic.load 0{{$}}
define i32 @load_i32_with_unfolded_gep_offset(i32* %p) { define i32 @load_i32_with_unfolded_gep_offset(i32* %p) {
%s = getelementptr i32, i32* %p, i32 6 %s = getelementptr i32, i32* %p, i32 6
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_i64_no_offset: ; CHECK-LABEL: load_i64_no_offset:
; CHECK: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK: i64.atomic.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @load_i64_no_offset(i64 *%p) { define i64 @load_i64_no_offset(i64 *%p) {
%v = load atomic i64, i64* %p seq_cst, align 8 %v = load atomic i64, i64* %p seq_cst, align 8
ret i64 %v ret i64 %v
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_folded_offset: ; CHECK-LABEL: load_i64_with_folded_offset:
; CHECK: i64.atomic.load $push0=, 24($0){{$}} ; CHECK: i64.atomic.load 24{{$}}
define i64 @load_i64_with_folded_offset(i64* %p) { define i64 @load_i64_with_folded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
%t = load atomic i64, i64* %s seq_cst, align 8 %t = load atomic i64, i64* %s seq_cst, align 8
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_folded_gep_offset: ; CHECK-LABEL: load_i64_with_folded_gep_offset:
; CHECK: i64.atomic.load $push0=, 24($0){{$}} ; CHECK: i64.atomic.load 24{{$}}
define i64 @load_i64_with_folded_gep_offset(i64* %p) { define i64 @load_i64_with_folded_gep_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 3 %s = getelementptr inbounds i64, i64* %p, i32 3
%t = load atomic i64, i64* %s seq_cst, align 8 %t = load atomic i64, i64* %s seq_cst, align 8
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_gep_negative_offset: ; CHECK-LABEL: load_i64_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i64.atomic.load 0{{$}}
define i64 @load_i64_with_unfolded_gep_negative_offset(i64* %p) { define i64 @load_i64_with_unfolded_gep_negative_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 -3 %s = getelementptr inbounds i64, i64* %p, i32 -3
%t = load atomic i64, i64* %s seq_cst, align 8 %t = load atomic i64, i64* %s seq_cst, align 8
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_offset: ; CHECK-LABEL: load_i64_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i64.atomic.load 0{{$}}
define i64 @load_i64_with_unfolded_offset(i64* %p) { define i64 @load_i64_with_unfolded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
%t = load atomic i64, i64* %s seq_cst, align 8 %t = load atomic i64, i64* %s seq_cst, align 8
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_gep_offset: ; CHECK-LABEL: load_i64_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.atomic.load $push2=, 0($pop1){{$}} ; CHECK: i64.atomic.load 0{{$}}
define i64 @load_i64_with_unfolded_gep_offset(i64* %p) { define i64 @load_i64_with_unfolded_gep_offset(i64* %p) {
%s = getelementptr i64, i64* %p, i32 3 %s = getelementptr i64, i64* %p, i32 3
%t = load atomic i64, i64* %s seq_cst, align 8 %t = load atomic i64, i64* %s seq_cst, align 8
ret i64 %t ret i64 %t
} }
; CHECK-LABEL: load_i32_with_folded_or_offset: ; CHECK-LABEL: load_i32_with_folded_or_offset:
; CHECK: i32.atomic.load8_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}){{$}} ; CHECK: i32.atomic.load8_u 2{{$}}
; CHECK-NEXT: i32.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}} ; CHECK-NEXT: i32.extend8_s{{$}}
define i32 @load_i32_with_folded_or_offset(i32 %x) { define i32 @load_i32_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%t0 = inttoptr i32 %and to i8* %t0 = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %t0, i32 2 %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
%t1 = load atomic i8, i8* %arrayidx seq_cst, align 8 %t1 = load atomic i8, i8* %arrayidx seq_cst, align 8
%conv = sext i8 %t1 to i32 %conv = sext i8 %t1 to i32
ret i32 %conv ret i32 %conv
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_no_offset: ; CHECK-LABEL: store_i32_no_offset:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.atomic.store 0($0), $1{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_i32_no_offset(i32 *%p, i32 %v) { define void @store_i32_no_offset(i32 *%p, i32 %v) {
store atomic i32 %v, i32* %p seq_cst, align 4 store atomic i32 %v, i32* %p seq_cst, align 4
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_folded_offset: ; CHECK-LABEL: store_i32_with_folded_offset:
; CHECK: i32.atomic.store 24($0), $pop0{{$}} ; CHECK: i32.atomic.store 24{{$}}
define void @store_i32_with_folded_offset(i32* %p) { define void @store_i32_with_folded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_folded_gep_offset: ; CHECK-LABEL: store_i32_with_folded_gep_offset:
; CHECK: i32.atomic.store 24($0), $pop0{{$}} ; CHECK: i32.atomic.store 24{{$}}
define void @store_i32_with_folded_gep_offset(i32* %p) { define void @store_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_gep_negative_offset: ; CHECK-LABEL: store_i32_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: get_local 0{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i32.add {{$}}
; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.store 0{{$}}
define void @store_i32_with_unfolded_gep_negative_offset(i32* %p) { define void @store_i32_with_unfolded_gep_negative_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 -6 %s = getelementptr inbounds i32, i32* %p, i32 -6
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_offset: ; CHECK-LABEL: store_i32_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add {{$}}
; CHECK: i32.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i32.atomic.store 0{{$}}
define void @store_i32_with_unfolded_offset(i32* %p) { define void @store_i32_with_unfolded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_gep_offset: ; CHECK-LABEL: store_i32_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add {{$}}
; CHECK: i32.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i32.atomic.store 0{{$}}
define void @store_i32_with_unfolded_gep_offset(i32* %p) { define void @store_i32_with_unfolded_gep_offset(i32* %p) {
%s = getelementptr i32, i32* %p, i32 6 %s = getelementptr i32, i32* %p, i32 6
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_no_offset: ; CHECK-LABEL: store_i64_no_offset:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}} ; CHECK: get_local 0{{$}}
; CHECK: get_local 1{{$}}
; CHECK-NEXT: i64.atomic.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @store_i64_no_offset(i64 *%p, i64 %v) { define void @store_i64_no_offset(i64 *%p, i64 %v) {
store atomic i64 %v, i64* %p seq_cst, align 8 store atomic i64 %v, i64* %p seq_cst, align 8
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_folded_offset: ; CHECK-LABEL: store_i64_with_folded_offset:
; CHECK: i64.atomic.store 24($0), $pop0{{$}} ; CHECK: i64.atomic.store 24{{$}}
define void @store_i64_with_folded_offset(i64* %p) { define void @store_i64_with_folded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
store atomic i64 0, i64* %s seq_cst, align 8 store atomic i64 0, i64* %s seq_cst, align 8
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_folded_gep_offset: ; CHECK-LABEL: store_i64_with_folded_gep_offset:
; CHECK: i64.atomic.store 24($0), $pop0{{$}} ; CHECK: i64.atomic.store 24{{$}}
define void @store_i64_with_folded_gep_offset(i64* %p) { define void @store_i64_with_folded_gep_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 3 %s = getelementptr inbounds i64, i64* %p, i32 3
store atomic i64 0, i64* %s seq_cst, align 8 store atomic i64 0, i64* %s seq_cst, align 8
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_gep_negative_offset: ; CHECK-LABEL: store_i64_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add {{$}}
; CHECK: i64.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i64.atomic.store 0{{$}}
define void @store_i64_with_unfolded_gep_negative_offset(i64* %p) { define void @store_i64_with_unfolded_gep_negative_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 -3 %s = getelementptr inbounds i64, i64* %p, i32 -3
store atomic i64 0, i64* %s seq_cst, align 8 store atomic i64 0, i64* %s seq_cst, align 8
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_offset: ; CHECK-LABEL: store_i64_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add {{$}}
; CHECK: i64.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i64.atomic.store 0{{$}}
define void @store_i64_with_unfolded_offset(i64* %p) { define void @store_i64_with_unfolded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
store atomic i64 0, i64* %s seq_cst, align 8 store atomic i64 0, i64* %s seq_cst, align 8
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_gep_offset: ; CHECK-LABEL: store_i64_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add {{$}}
; CHECK: i64.atomic.store 0($pop1), $pop2{{$}} ; CHECK: i64.atomic.store 0{{$}}
define void @store_i64_with_unfolded_gep_offset(i64* %p) { define void @store_i64_with_unfolded_gep_offset(i64* %p) {
%s = getelementptr i64, i64* %p, i32 3 %s = getelementptr i64, i64* %p, i32 3
store atomic i64 0, i64* %s seq_cst, align 8 store atomic i64 0, i64* %s seq_cst, align 8
ret void ret void
} }
; When loading from a fixed address, materialize a zero. ; When loading from a fixed address, materialize a zero.
; CHECK-LABEL: load_i32_from_numeric_address ; CHECK-LABEL: load_i32_from_numeric_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.load $push1=, 42($pop0){{$}} ; CHECK: i32.atomic.load 42{{$}}
define i32 @load_i32_from_numeric_address() { define i32 @load_i32_from_numeric_address() {
%s = inttoptr i32 42 to i32* %s = inttoptr i32 42 to i32*
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_i32_from_global_address ; CHECK-LABEL: load_i32_from_global_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.load $push1=, gv($pop0){{$}} ; CHECK: i32.atomic.load gv{{$}}
@gv = global i32 0 @gv = global i32 0
define i32 @load_i32_from_global_address() { define i32 @load_i32_from_global_address() {
%t = load atomic i32, i32* @gv seq_cst, align 4 %t = load atomic i32, i32* @gv seq_cst, align 4
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: store_i32_to_numeric_address: ; CHECK-LABEL: store_i32_to_numeric_address:
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.const $push1=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.atomic.store 42($pop0), $pop1{{$}} ; CHECK-NEXT: i32.atomic.store 42{{$}}
define void @store_i32_to_numeric_address() { define void @store_i32_to_numeric_address() {
%s = inttoptr i32 42 to i32* %s = inttoptr i32 42 to i32*
store atomic i32 0, i32* %s seq_cst, align 4 store atomic i32 0, i32* %s seq_cst, align 4
ret void ret void
} }
; CHECK-LABEL: store_i32_to_global_address: ; CHECK-LABEL: store_i32_to_global_address:
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.const $push1=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.store gv($pop0), $pop1{{$}} ; CHECK: i32.atomic.store gv{{$}}
define void @store_i32_to_global_address() { define void @store_i32_to_global_address() {
store atomic i32 0, i32* @gv seq_cst, align 4 store atomic i32 0, i32* @gv seq_cst, align 4
ret void ret void
} }
; Fold an offset into a sign-extending load. ; Fold an offset into a sign-extending load.
; CHECK-LABEL: load_i8_s_with_folded_offset: ; CHECK-LABEL: load_i8_s_with_folded_offset:
; CHECK: i32.atomic.load8_u $push0=, 24($0){{$}} ; CHECK: i32.atomic.load8_u 24{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0 ; CHECK-NEXT: i32.extend8_s
define i32 @load_i8_s_with_folded_offset(i8* %p) { define i32 @load_i8_s_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = load atomic i8, i8* %s seq_cst, align 1 %t = load atomic i8, i8* %s seq_cst, align 1
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold a gep offset into a sign-extending load. ; Fold a gep offset into a sign-extending load.
; CHECK-LABEL: load_i8_s_with_folded_gep_offset: ; CHECK-LABEL: load_i8_s_with_folded_gep_offset:
; CHECK: i32.atomic.load8_u $push0=, 24($0){{$}} ; CHECK: i32.atomic.load8_u 24{{$}}
; CHECK-NEXT: i32.extend8_s $push1=, $pop0 ; CHECK-NEXT: i32.extend8_s
define i32 @load_i8_s_with_folded_gep_offset(i8* %p) { define i32 @load_i8_s_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
%t = load atomic i8, i8* %s seq_cst, align 1 %t = load atomic i8, i8* %s seq_cst, align 1
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }
; CHECK-LABEL: load_i16_s_i64_with_folded_gep_offset: ; CHECK-LABEL: load_i16_s_i64_with_folded_gep_offset:
; CHECK: i64.atomic.load16_u $push0=, 6($0){{$}} ; CHECK: i64.atomic.load16_u 6{{$}}
define i64 @load_i16_s_i64_with_folded_gep_offset(i16* %p) { define i64 @load_i16_s_i64_with_folded_gep_offset(i16* %p) {
%s = getelementptr inbounds i16, i16* %p, i32 3 %s = getelementptr inbounds i16, i16* %p, i32 3
%t = load atomic i16, i16* %s seq_cst, align 2 %t = load atomic i16, i16* %s seq_cst, align 2
%u = zext i16 %t to i64 %u = zext i16 %t to i64
ret i64 %u ret i64 %u
} }
; CHECK-LABEL: load_i64_with_folded_or_offset: ; CHECK-LABEL: load_i64_with_folded_or_offset:
; CHECK: i64.atomic.load8_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}){{$}} ; CHECK: i64.atomic.load8_u 2{{$}}
; CHECK-NEXT: i64.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}} ; CHECK-NEXT: i64.extend8_s{{$}}
define i64 @load_i64_with_folded_or_offset(i32 %x) { define i64 @load_i64_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%t0 = inttoptr i32 %and to i8* %t0 = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %t0, i32 2 %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
%t1 = load atomic i8, i8* %arrayidx seq_cst, align 8 %t1 = load atomic i8, i8* %arrayidx seq_cst, align 8
%conv = sext i8 %t1 to i64 %conv = sext i8 %t1 to i64
ret i64 %conv ret i64 %conv
} }
; Fold an offset into a zero-extending load. ; Fold an offset into a zero-extending load.
; CHECK-LABEL: load_i16_u_with_folded_offset: ; CHECK-LABEL: load_i16_u_with_folded_offset:
; CHECK: i32.atomic.load16_u $push0=, 24($0){{$}} ; CHECK: i32.atomic.load16_u 24{{$}}
define i32 @load_i16_u_with_folded_offset(i8* %p) { define i32 @load_i16_u_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i16* %s = inttoptr i32 %r to i16*
%t = load atomic i16, i16* %s seq_cst, align 2 %t = load atomic i16, i16* %s seq_cst, align 2
%u = zext i16 %t to i32 %u = zext i16 %t to i32
ret i32 %u ret i32 %u
} }
; Fold a gep offset into a zero-extending load. ; Fold a gep offset into a zero-extending load.
; CHECK-LABEL: load_i8_u_with_folded_gep_offset: ; CHECK-LABEL: load_i8_u_with_folded_gep_offset:
; CHECK: i32.atomic.load8_u $push0=, 24($0){{$}} ; CHECK: i32.atomic.load8_u 24{{$}}
define i32 @load_i8_u_with_folded_gep_offset(i8* %p) { define i32 @load_i8_u_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
%t = load atomic i8, i8* %s seq_cst, align 1 %t = load atomic i8, i8* %s seq_cst, align 1
%u = zext i8 %t to i32 %u = zext i8 %t to i32
ret i32 %u ret i32 %u
} }
; When loading from a fixed address, materialize a zero. ; When loading from a fixed address, materialize a zero.
; As above but with extending load. ; As above but with extending load.
; CHECK-LABEL: load_zext_i32_from_numeric_address ; CHECK-LABEL: load_zext_i32_from_numeric_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.load16_u $push1=, 42($pop0){{$}} ; CHECK: i32.atomic.load16_u 42{{$}}
define i32 @load_zext_i32_from_numeric_address() { define i32 @load_zext_i32_from_numeric_address() {
%s = inttoptr i32 42 to i16* %s = inttoptr i32 42 to i16*
%t = load atomic i16, i16* %s seq_cst, align 2 %t = load atomic i16, i16* %s seq_cst, align 2
%u = zext i16 %t to i32 %u = zext i16 %t to i32
ret i32 %u ret i32 %u
} }
; CHECK-LABEL: load_sext_i32_from_global_address ; CHECK-LABEL: load_sext_i32_from_global_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.atomic.load8_u $push1=, gv8($pop0){{$}} ; CHECK: i32.atomic.load8_u gv8{{$}}
; CHECK-NEXT: i32.extend8_s $push2=, $pop1{{$}} ; CHECK-NEXT: i32.extend8_s{{$}}
@gv8 = global i8 0 @gv8 = global i8 0
define i32 @load_sext_i32_from_global_address() { define i32 @load_sext_i32_from_global_address() {
%t = load atomic i8, i8* @gv8 seq_cst, align 1 %t = load atomic i8, i8* @gv8 seq_cst, align 1
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold an offset into a sign-extending load. ; Fold an offset into a sign-extending load.
; As above but 32 extended to 64 bit. ; As above but 32 extended to 64 bit.
; CHECK-LABEL: load_i32_i64_s_with_folded_offset: ; CHECK-LABEL: load_i32_i64_s_with_folded_offset:
; CHECK: i32.atomic.load $push0=, 24($0){{$}} ; CHECK: i32.atomic.load 24{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push1=, $pop0{{$}} ; CHECK-NEXT: i64.extend_s/i32{{$}}
define i64 @load_i32_i64_s_with_folded_offset(i32* %p) { define i64 @load_i32_i64_s_with_folded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
%u = sext i32 %t to i64 %u = sext i32 %t to i64
ret i64 %u ret i64 %u
} }
; Fold a gep offset into a zero-extending load. ; Fold a gep offset into a zero-extending load.
; As above but 32 extended to 64 bit. ; As above but 32 extended to 64 bit.
; CHECK-LABEL: load_i32_i64_u_with_folded_gep_offset: ; CHECK-LABEL: load_i32_i64_u_with_folded_gep_offset:
; CHECK: i64.atomic.load32_u $push0=, 96($0){{$}} ; CHECK: i64.atomic.load32_u 96{{$}}
define i64 @load_i32_i64_u_with_folded_gep_offset(i32* %p) { define i64 @load_i32_i64_u_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 24 %s = getelementptr inbounds i32, i32* %p, i32 24
%t = load atomic i32, i32* %s seq_cst, align 4 %t = load atomic i32, i32* %s seq_cst, align 4
%u = zext i32 %t to i64 %u = zext i32 %t to i64
ret i64 %u ret i64 %u
} }
; i8 return value should test anyext loads ; i8 return value should test anyext loads
; CHECK-LABEL: ldi8_a1: ; CHECK-LABEL: ldi8_a1:
; CHECK: i32.atomic.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}} ; CHECK: i32.atomic.load8_u 0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i8 @ldi8_a1(i8 *%p) { define i8 @ldi8_a1(i8 *%p) {
%v = load atomic i8, i8* %p seq_cst, align 1 %v = load atomic i8, i8* %p seq_cst, align 1
ret i8 %v ret i8 %v
} }
; Fold an offset into a truncating store. ; Fold an offset into a truncating store.
; CHECK-LABEL: store_i8_with_folded_offset: ; CHECK-LABEL: store_i8_with_folded_offset:
; CHECK: i32.atomic.store8 24($0), $pop0{{$}} ; CHECK: i32.atomic.store8 24{{$}}
define void @store_i8_with_folded_offset(i8* %p) { define void @store_i8_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
store atomic i8 0, i8* %s seq_cst, align 1 store atomic i8 0, i8* %s seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: store_i16_with_folded_offset: ; CHECK-LABEL: store_i16_with_folded_offset:
; CHECK: i32.atomic.store16 24($0), $pop0{{$}} ; CHECK: i32.atomic.store16 24{{$}}
define void @store_i16_with_folded_offset(i16* %p) { define void @store_i16_with_folded_offset(i16* %p) {
%q = ptrtoint i16* %p to i32 %q = ptrtoint i16* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i16* %s = inttoptr i32 %r to i16*
store atomic i16 0, i16* %s seq_cst, align 2 store atomic i16 0, i16* %s seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i8_i64_with_folded_offset: ; CHECK-LABEL: store_i8_i64_with_folded_offset:
; CHECK: i64.atomic.store8 24($0), $1{{$}} ; CHECK: i64.atomic.store8 24{{$}}
define void @store_i8_i64_with_folded_offset(i8* %p, i64 %v) { define void @store_i8_i64_with_folded_offset(i8* %p, i64 %v) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = trunc i64 %v to i8 %t = trunc i64 %v to i8
store atomic i8 %t, i8* %s seq_cst, align 1 store atomic i8 %t, i8* %s seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: store_i16_i64_with_folded_offset: ; CHECK-LABEL: store_i16_i64_with_folded_offset:
; CHECK: i64.atomic.store16 24($0), $1{{$}} ; CHECK: i64.atomic.store16 24{{$}}
define void @store_i16_i64_with_folded_offset(i16* %p, i64 %v) { define void @store_i16_i64_with_folded_offset(i16* %p, i64 %v) {
%q = ptrtoint i16* %p to i32 %q = ptrtoint i16* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i16* %s = inttoptr i32 %r to i16*
%t = trunc i64 %v to i16 %t = trunc i64 %v to i16
store atomic i16 %t, i16* %s seq_cst, align 2 store atomic i16 %t, i16* %s seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i32_i64_with_folded_offset: ; CHECK-LABEL: store_i32_i64_with_folded_offset:
; CHECK: i64.atomic.store32 24($0), $1{{$}} ; CHECK: i64.atomic.store32 24{{$}}
define void @store_i32_i64_with_folded_offset(i32* %p, i64 %v) { define void @store_i32_i64_with_folded_offset(i32* %p, i64 %v) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = trunc i64 %v to i32 %t = trunc i64 %v to i32
store atomic i32 %t, i32* %s seq_cst, align 4 store atomic i32 %t, i32* %s seq_cst, align 4
ret void ret void
} }
; Fold a gep offset into a truncating store. ; Fold a gep offset into a truncating store.
; CHECK-LABEL: store_i8_with_folded_gep_offset: ; CHECK-LABEL: store_i8_with_folded_gep_offset:
; CHECK: i32.atomic.store8 24($0), $pop0{{$}} ; CHECK: i32.atomic.store8 24{{$}}
define void @store_i8_with_folded_gep_offset(i8* %p) { define void @store_i8_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
store atomic i8 0, i8* %s seq_cst, align 1 store atomic i8 0, i8* %s seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: store_i16_with_folded_gep_offset: ; CHECK-LABEL: store_i16_with_folded_gep_offset:
; CHECK: i32.atomic.store16 48($0), $pop0{{$}} ; CHECK: i32.atomic.store16 48{{$}}
define void @store_i16_with_folded_gep_offset(i16* %p) { define void @store_i16_with_folded_gep_offset(i16* %p) {
%s = getelementptr inbounds i16, i16* %p, i32 24 %s = getelementptr inbounds i16, i16* %p, i32 24
store atomic i16 0, i16* %s seq_cst, align 2 store atomic i16 0, i16* %s seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i8_i64_with_folded_gep_offset: ; CHECK-LABEL: store_i8_i64_with_folded_gep_offset:
; CHECK: i64.atomic.store8 24($0), $1{{$}} ; CHECK: i64.atomic.store8 24{{$}}
define void @store_i8_i64_with_folded_gep_offset(i8* %p, i64 %v) { define void @store_i8_i64_with_folded_gep_offset(i8* %p, i64 %v) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
%t = trunc i64 %v to i8 %t = trunc i64 %v to i8
store atomic i8 %t, i8* %s seq_cst, align 2 store atomic i8 %t, i8* %s seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i16_i64_with_folded_gep_offset: ; CHECK-LABEL: store_i16_i64_with_folded_gep_offset:
; CHECK: i64.atomic.store16 48($0), $1{{$}} ; CHECK: i64.atomic.store16 48{{$}}
define void @store_i16_i64_with_folded_gep_offset(i16* %p, i64 %v) { define void @store_i16_i64_with_folded_gep_offset(i16* %p, i64 %v) {
%s = getelementptr inbounds i16, i16* %p, i32 24 %s = getelementptr inbounds i16, i16* %p, i32 24
%t = trunc i64 %v to i16 %t = trunc i64 %v to i16
store atomic i16 %t, i16* %s seq_cst, align 2 store atomic i16 %t, i16* %s seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i32_i64_with_folded_gep_offset: ; CHECK-LABEL: store_i32_i64_with_folded_gep_offset:
; CHECK: i64.atomic.store32 96($0), $1{{$}} ; CHECK: i64.atomic.store32 96{{$}}
define void @store_i32_i64_with_folded_gep_offset(i32* %p, i64 %v) { define void @store_i32_i64_with_folded_gep_offset(i32* %p, i64 %v) {
%s = getelementptr inbounds i32, i32* %p, i32 24 %s = getelementptr inbounds i32, i32* %p, i32 24
%t = trunc i64 %v to i32 %t = trunc i64 %v to i32
store atomic i32 %t, i32* %s seq_cst, align 4 store atomic i32 %t, i32* %s seq_cst, align 4
ret void ret void
} }
; Fold an or_is_add pattern based offset into a truncating store. ; Fold an or_is_add pattern based offset into a truncating store.
; CHECK-LABEL: store_i8_with_folded_or_offset: ; CHECK-LABEL: store_i8_with_folded_or_offset:
; CHECK: i32.atomic.store8 2($pop{{[0-9]+}}), $pop{{[0-9]+}}{{$}} ; CHECK: i32.atomic.store8 2{{$}}
define void @store_i8_with_folded_or_offset(i32 %x) { define void @store_i8_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%p = inttoptr i32 %and to i8* %p = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %p, i32 2 %arrayidx = getelementptr inbounds i8, i8* %p, i32 2
store atomic i8 0, i8* %arrayidx seq_cst, align 1 store atomic i8 0, i8* %arrayidx seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: store_i16_with_folded_or_offset: ; CHECK-LABEL: store_i16_with_folded_or_offset:
; CHECK: i32.atomic.store16 4($pop{{[0-9]+}}), $pop{{[0-9]+}}{{$}} ; CHECK: i32.atomic.store16 4{{$}}
define void @store_i16_with_folded_or_offset(i32 %x) { define void @store_i16_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%p = inttoptr i32 %and to i16* %p = inttoptr i32 %and to i16*
%arrayidx = getelementptr inbounds i16, i16* %p, i32 2 %arrayidx = getelementptr inbounds i16, i16* %p, i32 2
store atomic i16 0, i16* %arrayidx seq_cst, align 2 store atomic i16 0, i16* %arrayidx seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i8_i64_with_folded_or_offset: ; CHECK-LABEL: store_i8_i64_with_folded_or_offset:
; CHECK: i64.atomic.store8 2($pop{{[0-9]+}}), $1{{$}} ; CHECK: i64.atomic.store8 2{{$}}
define void @store_i8_i64_with_folded_or_offset(i32 %x, i64 %v) { define void @store_i8_i64_with_folded_or_offset(i32 %x, i64 %v) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%p = inttoptr i32 %and to i8* %p = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %p, i32 2 %arrayidx = getelementptr inbounds i8, i8* %p, i32 2
%t = trunc i64 %v to i8 %t = trunc i64 %v to i8
store atomic i8 %t, i8* %arrayidx seq_cst, align 1 store atomic i8 %t, i8* %arrayidx seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: store_i16_i64_with_folded_or_offset: ; CHECK-LABEL: store_i16_i64_with_folded_or_offset:
; CHECK: i64.atomic.store16 4($pop{{[0-9]+}}), $1{{$}} ; CHECK: i64.atomic.store16 4{{$}}
define void @store_i16_i64_with_folded_or_offset(i32 %x, i64 %v) { define void @store_i16_i64_with_folded_or_offset(i32 %x, i64 %v) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%p = inttoptr i32 %and to i16* %p = inttoptr i32 %and to i16*
%arrayidx = getelementptr inbounds i16, i16* %p, i32 2 %arrayidx = getelementptr inbounds i16, i16* %p, i32 2
%t = trunc i64 %v to i16 %t = trunc i64 %v to i16
store atomic i16 %t, i16* %arrayidx seq_cst, align 2 store atomic i16 %t, i16* %arrayidx seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: store_i32_i64_with_folded_or_offset: ; CHECK-LABEL: store_i32_i64_with_folded_or_offset:
; CHECK: i64.atomic.store32 8($pop{{[0-9]+}}), $1{{$}} ; CHECK: i64.atomic.store32 8{{$}}
define void @store_i32_i64_with_folded_or_offset(i32 %x, i64 %v) { define void @store_i32_i64_with_folded_or_offset(i32 %x, i64 %v) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%p = inttoptr i32 %and to i32* %p = inttoptr i32 %and to i32*
%arrayidx = getelementptr inbounds i32, i32* %p, i32 2 %arrayidx = getelementptr inbounds i32, i32* %p, i32 2
%t = trunc i64 %v to i32 %t = trunc i64 %v to i32
store atomic i32 %t, i32* %arrayidx seq_cst, align 4 store atomic i32 %t, i32* %arrayidx seq_cst, align 4
ret void ret void
} }

test/CodeGen/WebAssembly/offset-fastisel.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s
; TODO: Merge this with offset.ll when fast-isel matches better. ; TODO: Merge this with offset.ll when fast-isel matches better.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: store_i8_with_variable_gep_offset: ; CHECK-LABEL: store_i8_with_variable_gep_offset:
; CHECK: i32.add $push[[L0:[0-9]+]]=, $0, $1{{$}} ; CHECK: i32.add
; CHECK: i32.const $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store8 0($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK: i32.store8 0{{$}}
define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) { define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) {
%s = getelementptr inbounds i8, i8* %p, i32 %idx %s = getelementptr inbounds i8, i8* %p, i32 %idx
store i8 0, i8* %s store i8 0, i8* %s
ret void ret void
} }
; CHECK-LABEL: store_i8_with_array_alloca_gep: ; CHECK-LABEL: store_i8_with_array_alloca_gep:
; CHECK: get_global $push[[L0:[0-9]+]]=, __stack_pointer ; CHECK: get_global __stack_pointer
; CHECK: i32.const $push[[L1:[0-9]+]]=, 32{{$}} ; CHECK: i32.const 32{{$}}
; CHECK: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK: i32.sub{{$}}
; CHECK: copy_local $push[[L3:[0-9]+]]=, $pop[[L2]] ; CHECK: copy_local
; CHECK: i32.add $push[[L4:[0-9]+]]=, $pop[[L3]], $0{{$}} ; CHECK: i32.add
; CHECK: i32.const $push[[L5:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store8 0($pop[[L4]]), $pop[[L5]]{{$}} ; CHECK: i32.store8 0{{$}}
define hidden void @store_i8_with_array_alloca_gep(i32 %idx) { define hidden void @store_i8_with_array_alloca_gep(i32 %idx) {
%A = alloca [30 x i8], align 16 %A = alloca [30 x i8], align 16
%s = getelementptr inbounds [30 x i8], [30 x i8]* %A, i32 0, i32 %idx %s = getelementptr inbounds [30 x i8], [30 x i8]* %A, i32 0, i32 %idx
store i8 0, i8* %s, align 1 store i8 0, i8* %s, align 1
ret void ret void
} }
; CHECK-LABEL: store_i32_with_unfolded_gep_offset: ; CHECK-LABEL: store_i32_with_unfolded_gep_offset:
; CHECK: i32.const $push[[L0:[0-9]+]]=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} ; CHECK: i32.add
; CHECK: i32.const $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store 0($pop[[L1]]), $pop[[L2]]{{$}} ; CHECK: i32.store 0{{$}}
define void @store_i32_with_unfolded_gep_offset(i32* %p) { define void @store_i32_with_unfolded_gep_offset(i32* %p) {
%s = getelementptr i32, i32* %p, i32 6 %s = getelementptr i32, i32* %p, i32 6
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; CHECK-LABEL: store_i32_with_folded_gep_offset: ; CHECK-LABEL: store_i32_with_folded_gep_offset:
; CHECK: i32.store 24($0), $pop{{[0-9]+$}} ; CHECK: i32.store 24
define void @store_i32_with_folded_gep_offset(i32* %p) { define void @store_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; CHECK-LABEL: load_i32_with_folded_gep_offset: ; CHECK-LABEL: load_i32_with_folded_gep_offset:
; CHECK: i32.load $push{{[0-9]+}}=, 24($0){{$}} ; CHECK: i32.load 24{{$}}
define i32 @load_i32_with_folded_gep_offset(i32* %p) { define i32 @load_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: store_i64_with_unfolded_gep_offset: ; CHECK-LABEL: store_i64_with_unfolded_gep_offset:
; CHECK: i32.const $push[[L0:[0-9]+]]=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}} ; CHECK: i32.add
; CHECK: i64.const $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK: i64.const 0{{$}}
; CHECK: i64.store 0($pop[[L1]]), $pop[[L2]]{{$}} ; CHECK: i64.store 0{{$}}
define void @store_i64_with_unfolded_gep_offset(i64* %p) { define void @store_i64_with_unfolded_gep_offset(i64* %p) {
%s = getelementptr i64, i64* %p, i32 3 %s = getelementptr i64, i64* %p, i32 3
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; CHECK-LABEL: store_i8_with_folded_gep_offset: ; CHECK-LABEL: store_i8_with_folded_gep_offset:
; CHECK: i32.store8 24($0), $pop{{[0-9]+$}} ; CHECK: i32.store8 24
define void @store_i8_with_folded_gep_offset(i8* %p) { define void @store_i8_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
store i8 0, i8* %s store i8 0, i8* %s
ret void ret void
} }
; CHECK-LABEL: load_i8_u_with_folded_offset: ; CHECK-LABEL: load_i8_u_with_folded_offset:
; CHECK: i32.load8_u $push{{[0-9]+}}=, 24($0){{$}} ; CHECK: i32.load8_u 24{{$}}
define i32 @load_i8_u_with_folded_offset(i8* %p) { define i32 @load_i8_u_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = load i8, i8* %s %t = load i8, i8* %s
%u = zext i8 %t to i32 %u = zext i8 %t to i32
ret i32 %u ret i32 %u
} }
; TODO: this should be load8_s, need to fold sign-/zero-extend in fast-isel ; TODO: this should be load8_s, need to fold sign-/zero-extend in fast-isel
; CHECK-LABEL: load_i8_s_with_folded_offset: ; CHECK-LABEL: load_i8_s_with_folded_offset:
; CHECK: i32.load8_u $push{{[0-9]+}}=, 24($0){{$}} ; CHECK: i32.load8_u 24{{$}}
define i32 @load_i8_s_with_folded_offset(i8* %p) { define i32 @load_i8_s_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = load i8, i8* %s %t = load i8, i8* %s
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }

test/CodeGen/WebAssembly/offset-folding.ll

; RUN: llc < %s -asm-verbose=false | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that constant offsets can be folded into global addresses. ; Test that constant offsets can be folded into global addresses.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
@x = external global [0 x i32] @x = external global [0 x i32]
@y = global [50 x i32] zeroinitializer @y = global [50 x i32] zeroinitializer
; Test basic constant offsets of both defined and external symbols. ; Test basic constant offsets of both defined and external symbols.
; CHECK-LABEL: test0: ; CHECK-LABEL: test0:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, x+188{{$}} ; CHECK-NEXT: i32.const x+188{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test0() { define i32* @test0() {
ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 47) ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 47)
} }
; CHECK-LABEL: test1: ; CHECK-LABEL: test1:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, y+188{{$}} ; CHECK-NEXT: i32.const y+188{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test1() { define i32* @test1() {
ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 47) ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 47)
} }
; Test zero offsets. ; Test zero offsets.
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, x{{$}} ; CHECK-NEXT: i32.const x{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test2() { define i32* @test2() {
ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 0) ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 0)
} }
; CHECK-LABEL: test3: ; CHECK-LABEL: test3:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, y{{$}} ; CHECK-NEXT: i32.const y{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test3() { define i32* @test3() {
ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 0) ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 0)
} }
; Test negative offsets. ; Test negative offsets.
; CHECK-LABEL: test4: ; CHECK-LABEL: test4:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, x-188{{$}} ; CHECK-NEXT: i32.const x-188{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test4() { define i32* @test4() {
ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 -47) ret i32* getelementptr ([0 x i32], [0 x i32]* @x, i32 0, i32 -47)
} }
; CHECK-LABEL: test5: ; CHECK-LABEL: test5:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, y-188{{$}} ; CHECK-NEXT: i32.const y-188{{$}}
; CHECK=NEXT: return $pop0{{$}} ; CHECK=NEXT: return{{$}}
define i32* @test5() { define i32* @test5() {
ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 -47) ret i32* getelementptr ([50 x i32], [50 x i32]* @y, i32 0, i32 -47)
} }

test/CodeGen/WebAssembly/offset.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test constant load and store address offsets. ; Test constant load and store address offsets.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; With an nuw add, we can fold an offset. ; With an nuw add, we can fold an offset.
; CHECK-LABEL: load_i32_with_folded_offset: ; CHECK-LABEL: load_i32_with_folded_offset:
; CHECK: i32.load $push0=, 24($0){{$}} ; CHECK: i32.load 24{{$}}
define i32 @load_i32_with_folded_offset(i32* %p) { define i32 @load_i32_with_folded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; With an inbounds gep, we can fold an offset. ; With an inbounds gep, we can fold an offset.
; CHECK-LABEL: load_i32_with_folded_gep_offset: ; CHECK-LABEL: load_i32_with_folded_gep_offset:
; CHECK: i32.load $push0=, 24($0){{$}} ; CHECK: i32.load 24{{$}}
define i32 @load_i32_with_folded_gep_offset(i32* %p) { define i32 @load_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; We can't fold a negative offset though, even with an inbounds gep. ; We can't fold a negative offset though, even with an inbounds gep.
; CHECK-LABEL: load_i32_with_unfolded_gep_negative_offset: ; CHECK-LABEL: load_i32_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.load $push2=, 0($pop1){{$}} ; CHECK: i32.load 0{{$}}
define i32 @load_i32_with_unfolded_gep_negative_offset(i32* %p) { define i32 @load_i32_with_unfolded_gep_negative_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 -6 %s = getelementptr inbounds i32, i32* %p, i32 -6
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; Without nuw, and even with nsw, we can't fold an offset. ; Without nuw, and even with nsw, we can't fold an offset.
; CHECK-LABEL: load_i32_with_unfolded_offset: ; CHECK-LABEL: load_i32_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.load $push2=, 0($pop1){{$}} ; CHECK: i32.load 0{{$}}
define i32 @load_i32_with_unfolded_offset(i32* %p) { define i32 @load_i32_with_unfolded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; Without inbounds, we can't fold a gep offset. ; Without inbounds, we can't fold a gep offset.
; CHECK-LABEL: load_i32_with_unfolded_gep_offset: ; CHECK-LABEL: load_i32_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.load $push2=, 0($pop1){{$}} ; CHECK: i32.load 0{{$}}
define i32 @load_i32_with_unfolded_gep_offset(i32* %p) { define i32 @load_i32_with_unfolded_gep_offset(i32* %p) {
%s = getelementptr i32, i32* %p, i32 6 %s = getelementptr i32, i32* %p, i32 6
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_folded_offset: ; CHECK-LABEL: load_i64_with_folded_offset:
; CHECK: i64.load $push0=, 24($0){{$}} ; CHECK: i64.load 24{{$}}
define i64 @load_i64_with_folded_offset(i64* %p) { define i64 @load_i64_with_folded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
%t = load i64, i64* %s %t = load i64, i64* %s
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_folded_gep_offset: ; CHECK-LABEL: load_i64_with_folded_gep_offset:
; CHECK: i64.load $push0=, 24($0){{$}} ; CHECK: i64.load 24{{$}}
define i64 @load_i64_with_folded_gep_offset(i64* %p) { define i64 @load_i64_with_folded_gep_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 3 %s = getelementptr inbounds i64, i64* %p, i32 3
%t = load i64, i64* %s %t = load i64, i64* %s
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_gep_negative_offset: ; CHECK-LABEL: load_i64_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.load $push2=, 0($pop1){{$}} ; CHECK: i64.load 0{{$}}
define i64 @load_i64_with_unfolded_gep_negative_offset(i64* %p) { define i64 @load_i64_with_unfolded_gep_negative_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 -3 %s = getelementptr inbounds i64, i64* %p, i32 -3
%t = load i64, i64* %s %t = load i64, i64* %s
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_offset: ; CHECK-LABEL: load_i64_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.load $push2=, 0($pop1){{$}} ; CHECK: i64.load 0{{$}}
define i64 @load_i64_with_unfolded_offset(i64* %p) { define i64 @load_i64_with_unfolded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
%t = load i64, i64* %s %t = load i64, i64* %s
ret i64 %t ret i64 %t
} }
; Same as above but with i64. ; Same as above but with i64.
; CHECK-LABEL: load_i64_with_unfolded_gep_offset: ; CHECK-LABEL: load_i64_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.load $push2=, 0($pop1){{$}} ; CHECK: i64.load 0{{$}}
define i64 @load_i64_with_unfolded_gep_offset(i64* %p) { define i64 @load_i64_with_unfolded_gep_offset(i64* %p) {
%s = getelementptr i64, i64* %p, i32 3 %s = getelementptr i64, i64* %p, i32 3
%t = load i64, i64* %s %t = load i64, i64* %s
ret i64 %t ret i64 %t
} }
; CHECK-LABEL: load_i32_with_folded_or_offset: ; CHECK-LABEL: load_i32_with_folded_or_offset:
; CHECK: i32.load8_s $push{{[0-9]+}}=, 2($pop{{[0-9]+}}){{$}} ; CHECK: i32.load8_s 2{{$}}
define i32 @load_i32_with_folded_or_offset(i32 %x) { define i32 @load_i32_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%t0 = inttoptr i32 %and to i8* %t0 = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %t0, i32 2 %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
%t1 = load i8, i8* %arrayidx, align 1 %t1 = load i8, i8* %arrayidx, align 1
%conv = sext i8 %t1 to i32 %conv = sext i8 %t1 to i32
ret i32 %conv ret i32 %conv
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_folded_offset: ; CHECK-LABEL: store_i32_with_folded_offset:
; CHECK: i32.store 24($0), $pop0{{$}} ; CHECK: i32.store 24{{$}}
define void @store_i32_with_folded_offset(i32* %p) { define void @store_i32_with_folded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_folded_gep_offset: ; CHECK-LABEL: store_i32_with_folded_gep_offset:
; CHECK: i32.store 24($0), $pop0{{$}} ; CHECK: i32.store 24{{$}}
define void @store_i32_with_folded_gep_offset(i32* %p) { define void @store_i32_with_folded_gep_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 6 %s = getelementptr inbounds i32, i32* %p, i32 6
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_gep_negative_offset: ; CHECK-LABEL: store_i32_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.store 0($pop1), $pop2{{$}} ; CHECK: i32.store 0{{$}}
define void @store_i32_with_unfolded_gep_negative_offset(i32* %p) { define void @store_i32_with_unfolded_gep_negative_offset(i32* %p) {
%s = getelementptr inbounds i32, i32* %p, i32 -6 %s = getelementptr inbounds i32, i32* %p, i32 -6
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_offset: ; CHECK-LABEL: store_i32_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.store 0($pop1), $pop2{{$}} ; CHECK: i32.store 0{{$}}
define void @store_i32_with_unfolded_offset(i32* %p) { define void @store_i32_with_unfolded_offset(i32* %p) {
%q = ptrtoint i32* %p to i32 %q = ptrtoint i32* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i32* %s = inttoptr i32 %r to i32*
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; Same as above but with store. ; Same as above but with store.
; CHECK-LABEL: store_i32_with_unfolded_gep_offset: ; CHECK-LABEL: store_i32_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i32.store 0($pop1), $pop2{{$}} ; CHECK: i32.store 0{{$}}
define void @store_i32_with_unfolded_gep_offset(i32* %p) { define void @store_i32_with_unfolded_gep_offset(i32* %p) {
%s = getelementptr i32, i32* %p, i32 6 %s = getelementptr i32, i32* %p, i32 6
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_folded_offset: ; CHECK-LABEL: store_i64_with_folded_offset:
; CHECK: i64.store 24($0), $pop0{{$}} ; CHECK: i64.store 24{{$}}
define void @store_i64_with_folded_offset(i64* %p) { define void @store_i64_with_folded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_folded_gep_offset: ; CHECK-LABEL: store_i64_with_folded_gep_offset:
; CHECK: i64.store 24($0), $pop0{{$}} ; CHECK: i64.store 24{{$}}
define void @store_i64_with_folded_gep_offset(i64* %p) { define void @store_i64_with_folded_gep_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 3 %s = getelementptr inbounds i64, i64* %p, i32 3
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_gep_negative_offset: ; CHECK-LABEL: store_i64_with_unfolded_gep_negative_offset:
; CHECK: i32.const $push0=, -24{{$}} ; CHECK: i32.const -24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.store 0($pop1), $pop2{{$}} ; CHECK: i64.store 0{{$}}
define void @store_i64_with_unfolded_gep_negative_offset(i64* %p) { define void @store_i64_with_unfolded_gep_negative_offset(i64* %p) {
%s = getelementptr inbounds i64, i64* %p, i32 -3 %s = getelementptr inbounds i64, i64* %p, i32 -3
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_offset: ; CHECK-LABEL: store_i64_with_unfolded_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.store 0($pop1), $pop2{{$}} ; CHECK: i64.store 0{{$}}
define void @store_i64_with_unfolded_offset(i64* %p) { define void @store_i64_with_unfolded_offset(i64* %p) {
%q = ptrtoint i64* %p to i32 %q = ptrtoint i64* %p to i32
%r = add nsw i32 %q, 24 %r = add nsw i32 %q, 24
%s = inttoptr i32 %r to i64* %s = inttoptr i32 %r to i64*
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; Same as above but with store with i64. ; Same as above but with store with i64.
; CHECK-LABEL: store_i64_with_unfolded_gep_offset: ; CHECK-LABEL: store_i64_with_unfolded_gep_offset:
; CHECK: i32.const $push0=, 24{{$}} ; CHECK: i32.const 24{{$}}
; CHECK: i32.add $push1=, $0, $pop0{{$}} ; CHECK: i32.add
; CHECK: i64.store 0($pop1), $pop2{{$}} ; CHECK: i64.store 0{{$}}
define void @store_i64_with_unfolded_gep_offset(i64* %p) { define void @store_i64_with_unfolded_gep_offset(i64* %p) {
%s = getelementptr i64, i64* %p, i32 3 %s = getelementptr i64, i64* %p, i32 3
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
; CHECK-LABEL: store_i32_with_folded_or_offset: ; CHECK-LABEL: store_i32_with_folded_or_offset:
; CHECK: i32.store8 2($pop{{[0-9]+}}), $pop{{[0-9]+}}{{$}} ; CHECK: i32.store8 2{{$}}
define void @store_i32_with_folded_or_offset(i32 %x) { define void @store_i32_with_folded_or_offset(i32 %x) {
%and = and i32 %x, -4 %and = and i32 %x, -4
%t0 = inttoptr i32 %and to i8* %t0 = inttoptr i32 %and to i8*
%arrayidx = getelementptr inbounds i8, i8* %t0, i32 2 %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
store i8 0, i8* %arrayidx, align 1 store i8 0, i8* %arrayidx, align 1
ret void ret void
} }
; When loading from a fixed address, materialize a zero. ; When loading from a fixed address, materialize a zero.
; CHECK-LABEL: load_i32_from_numeric_address ; CHECK-LABEL: load_i32_from_numeric_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.load $push1=, 42($pop0){{$}} ; CHECK: i32.load 42{{$}}
define i32 @load_i32_from_numeric_address() { define i32 @load_i32_from_numeric_address() {
%s = inttoptr i32 42 to i32* %s = inttoptr i32 42 to i32*
%t = load i32, i32* %s %t = load i32, i32* %s
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: load_i32_from_global_address ; CHECK-LABEL: load_i32_from_global_address
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.load $push1=, gv($pop0){{$}} ; CHECK: i32.load gv{{$}}
@gv = global i32 0 @gv = global i32 0
define i32 @load_i32_from_global_address() { define i32 @load_i32_from_global_address() {
%t = load i32, i32* @gv %t = load i32, i32* @gv
ret i32 %t ret i32 %t
} }
; CHECK-LABEL: store_i32_to_numeric_address: ; CHECK-LABEL: store_i32_to_numeric_address:
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.const $push1=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store 42($pop0), $pop1{{$}} ; CHECK-NEXT: i32.store 42{{$}}
define void @store_i32_to_numeric_address() { define void @store_i32_to_numeric_address() {
%s = inttoptr i32 42 to i32* %s = inttoptr i32 42 to i32*
store i32 0, i32* %s store i32 0, i32* %s
ret void ret void
} }
; CHECK-LABEL: store_i32_to_global_address: ; CHECK-LABEL: store_i32_to_global_address:
; CHECK: i32.const $push0=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.const $push1=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store gv($pop0), $pop1{{$}} ; CHECK: i32.store gv{{$}}
define void @store_i32_to_global_address() { define void @store_i32_to_global_address() {
store i32 0, i32* @gv store i32 0, i32* @gv
ret void ret void
} }
; Fold an offset into a sign-extending load. ; Fold an offset into a sign-extending load.
; CHECK-LABEL: load_i8_s_with_folded_offset: ; CHECK-LABEL: load_i8_s_with_folded_offset:
; CHECK: i32.load8_s $push0=, 24($0){{$}} ; CHECK: i32.load8_s 24{{$}}
define i32 @load_i8_s_with_folded_offset(i8* %p) { define i32 @load_i8_s_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = load i8, i8* %s %t = load i8, i8* %s
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold a gep offset into a sign-extending load. ; Fold a gep offset into a sign-extending load.
; CHECK-LABEL: load_i8_s_with_folded_gep_offset: ; CHECK-LABEL: load_i8_s_with_folded_gep_offset:
; CHECK: i32.load8_s $push0=, 24($0){{$}} ; CHECK: i32.load8_s 24{{$}}
define i32 @load_i8_s_with_folded_gep_offset(i8* %p) { define i32 @load_i8_s_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
%t = load i8, i8* %s %t = load i8, i8* %s
%u = sext i8 %t to i32 %u = sext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold an offset into a zero-extending load. ; Fold an offset into a zero-extending load.
; CHECK-LABEL: load_i8_u_with_folded_offset: ; CHECK-LABEL: load_i8_u_with_folded_offset:
; CHECK: i32.load8_u $push0=, 24($0){{$}} ; CHECK: i32.load8_u 24{{$}}
define i32 @load_i8_u_with_folded_offset(i8* %p) { define i32 @load_i8_u_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
%t = load i8, i8* %s %t = load i8, i8* %s
%u = zext i8 %t to i32 %u = zext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold a gep offset into a zero-extending load. ; Fold a gep offset into a zero-extending load.
; CHECK-LABEL: load_i8_u_with_folded_gep_offset: ; CHECK-LABEL: load_i8_u_with_folded_gep_offset:
; CHECK: i32.load8_u $push0=, 24($0){{$}} ; CHECK: i32.load8_u 24{{$}}
define i32 @load_i8_u_with_folded_gep_offset(i8* %p) { define i32 @load_i8_u_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
%t = load i8, i8* %s %t = load i8, i8* %s
%u = zext i8 %t to i32 %u = zext i8 %t to i32
ret i32 %u ret i32 %u
} }
; Fold an offset into a truncating store. ; Fold an offset into a truncating store.
; CHECK-LABEL: store_i8_with_folded_offset: ; CHECK-LABEL: store_i8_with_folded_offset:
; CHECK: i32.store8 24($0), $pop0{{$}} ; CHECK: i32.store8 24{{$}}
define void @store_i8_with_folded_offset(i8* %p) { define void @store_i8_with_folded_offset(i8* %p) {
%q = ptrtoint i8* %p to i32 %q = ptrtoint i8* %p to i32
%r = add nuw i32 %q, 24 %r = add nuw i32 %q, 24
%s = inttoptr i32 %r to i8* %s = inttoptr i32 %r to i8*
store i8 0, i8* %s store i8 0, i8* %s
ret void ret void
} }
; Fold a gep offset into a truncating store. ; Fold a gep offset into a truncating store.
; CHECK-LABEL: store_i8_with_folded_gep_offset: ; CHECK-LABEL: store_i8_with_folded_gep_offset:
; CHECK: i32.store8 24($0), $pop0{{$}} ; CHECK: i32.store8 24{{$}}
define void @store_i8_with_folded_gep_offset(i8* %p) { define void @store_i8_with_folded_gep_offset(i8* %p) {
%s = getelementptr inbounds i8, i8* %p, i32 24 %s = getelementptr inbounds i8, i8* %p, i32 24
store i8 0, i8* %s store i8 0, i8* %s
ret void ret void
} }
; Fold the offsets when lowering aggregate loads and stores. ; Fold the offsets when lowering aggregate loads and stores.
; CHECK-LABEL: aggregate_load_store: ; CHECK-LABEL: aggregate_load_store:
; CHECK: i32.load $2=, 0($0){{$}} ; CHECK: i32.load $2=, 0{{$}}
; CHECK: i32.load $3=, 4($0){{$}} ; CHECK: i32.load $3=, 4{{$}}
; CHECK: i32.load $4=, 8($0){{$}} ; CHECK: i32.load $4=, 8{{$}}
; CHECK: i32.load $push0=, 12($0){{$}} ; CHECK: i32.load 12{{$}}
; CHECK: i32.store 12($1), $pop0{{$}} ; CHECK: i32.store 12{{$}}
; CHECK: i32.store 8($1), $4{{$}} ; CHECK: i32.store 8{{$}}
; CHECK: i32.store 4($1), $3{{$}} ; CHECK: i32.store 4{{$}}
; CHECK: i32.store 0($1), $2{{$}} ; CHECK: i32.store 0{{$}}
define void @aggregate_load_store({i32,i32,i32,i32}* %p, {i32,i32,i32,i32}* %q) { define void @aggregate_load_store({i32,i32,i32,i32}* %p, {i32,i32,i32,i32}* %q) {
; volatile so that things stay in order for the tests above ; volatile so that things stay in order for the tests above
%t = load volatile {i32,i32,i32,i32}, {i32, i32,i32,i32}* %p %t = load volatile {i32,i32,i32,i32}, {i32, i32,i32,i32}* %p
store volatile {i32,i32,i32,i32} %t, {i32, i32,i32,i32}* %q store volatile {i32,i32,i32,i32} %t, {i32, i32,i32,i32}* %q
ret void ret void
} }
; Fold the offsets when lowering aggregate return values. The stores get ; Fold the offsets when lowering aggregate return values. The stores get
; merged into i64 stores. ; merged into i64 stores.
; CHECK-LABEL: aggregate_return: ; CHECK-LABEL: aggregate_return:
; CHECK: i64.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK: i64.const 0{{$}}
; CHECK: i64.store 8($0):p2align=2, $pop[[L0]]{{$}} ; CHECK: i64.store 8:p2align=2{{$}}
; CHECK: i64.const $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK: i64.const 0{{$}}
; CHECK: i64.store 0($0):p2align=2, $pop[[L1]]{{$}} ; CHECK: i64.store 0:p2align=2{{$}}
define {i32,i32,i32,i32} @aggregate_return() { define {i32,i32,i32,i32} @aggregate_return() {
ret {i32,i32,i32,i32} zeroinitializer ret {i32,i32,i32,i32} zeroinitializer
} }
; Fold the offsets when lowering aggregate return values. The stores are not ; Fold the offsets when lowering aggregate return values. The stores are not
; merged. ; merged.
; CHECK-LABEL: aggregate_return_without_merge: ; CHECK-LABEL: aggregate_return_without_merge:
; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store8 14($0), $pop[[L0]]{{$}} ; CHECK: i32.store8 14{{$}}
; CHECK: i32.const $push[[L1:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store16 12($0), $pop[[L1]]{{$}} ; CHECK: i32.store16 12{{$}}
; CHECK: i32.const $push[[L2:[0-9]+]]=, 0{{$}} ; CHECK: i32.const 0{{$}}
; CHECK: i32.store 8($0), $pop[[L2]]{{$}} ; CHECK: i32.store 8{{$}}
; CHECK: i64.const $push[[L3:[0-9]+]]=, 0{{$}} ; CHECK: i64.const 0{{$}}
; CHECK: i64.store 0($0), $pop[[L3]]{{$}} ; CHECK: i64.store 0{{$}}
define {i64,i32,i16,i8} @aggregate_return_without_merge() { define {i64,i32,i16,i8} @aggregate_return_without_merge() {
ret {i64,i32,i16,i8} zeroinitializer ret {i64,i32,i16,i8} zeroinitializer
} }

test/CodeGen/WebAssembly/phi.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
; Test that phis are lowered. ; Test that phis are lowered.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Basic phi triangle. ; Basic phi triangle.
; CHECK-LABEL: test0: ; CHECK-LABEL: test0:
; CHECK: return $0 ; CHECK: return $0
; CHECK: div_s $push[[NUM0:[0-9]+]]=, $0, $pop[[NUM1:[0-9]+]]{{$}} ; CHECK: div_s
; CHECK: return $pop[[NUM0]]{{$}} ; CHECK: return{{$}}
define i32 @test0(i32 %p) { define i32 @test0(i32 %p) {
entry: entry:
%t = icmp slt i32 %p, 0 %t = icmp slt i32 %p, 0
br i1 %t, label %true, label %done br i1 %t, label %true, label %done
true: true:
%a = sdiv i32 %p, 3 %a = sdiv i32 %p, 3
br label %done br label %done
done: done:
Show All 27 Lines

test/CodeGen/WebAssembly/reg-stackify.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
; Test the register stackifier pass. ; Test the register stackifier pass.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; No because of pointer aliasing. ; No because of pointer aliasing.
; CHECK-LABEL: no0: ; CHECK-LABEL: no0:
; CHECK: return $1{{$}} ; CHECK: return
define i32 @no0(i32* %p, i32* %q) { define i32 @no0(i32* %p, i32* %q) {
%t = load i32, i32* %q %t = load i32, i32* %q
store i32 0, i32* %p store i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; No because of side effects. ; No because of side effects.
; CHECK-LABEL: no1: ; CHECK-LABEL: no1:
; CHECK: return $1{{$}} ; CHECK: return
define i32 @no1(i32* %p, i32* dereferenceable(4) %q) { define i32 @no1(i32* %p, i32* dereferenceable(4) %q) {
%t = load volatile i32, i32* %q, !invariant.load !0 %t = load volatile i32, i32* %q, !invariant.load !0
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; Yes because of invariant load and no side effects. ; Yes because of invariant load and no side effects.
; CHECK-LABEL: yes0: ; CHECK-LABEL: yes0:
; CHECK: return $pop{{[0-9]+}}{{$}} ; CHECK: return{{$}}
define i32 @yes0(i32* %p, i32* dereferenceable(4) %q) { define i32 @yes0(i32* %p, i32* dereferenceable(4) %q) {
%t = load i32, i32* %q, !invariant.load !0 %t = load i32, i32* %q, !invariant.load !0
store i32 0, i32* %p store i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; Yes because of no intervening side effects. ; Yes because of no intervening side effects.
; CHECK-LABEL: yes1: ; CHECK-LABEL: yes1:
; CHECK: return $pop0{{$}} ; CHECK: return{{$}}
define i32 @yes1(i32* %q) { define i32 @yes1(i32* %q) {
%t = load volatile i32, i32* %q %t = load volatile i32, i32* %q
ret i32 %t ret i32 %t
} }
; Yes because undefined behavior can be sunk past a store. ; Yes because undefined behavior can be sunk past a store.
; CHECK-LABEL: sink_trap: ; CHECK-LABEL: sink_trap:
; CHECK: return $pop{{[0-9]+}}{{$}} ; CHECK: return{{$}}
define i32 @sink_trap(i32 %x, i32 %y, i32* %p) { define i32 @sink_trap(i32 %x, i32 %y, i32* %p) {
%t = sdiv i32 %x, %y %t = sdiv i32 %x, %y
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; Yes because the call is readnone. ; Yes because the call is readnone.
; CHECK-LABEL: sink_readnone_call: ; CHECK-LABEL: sink_readnone_call:
; CHECK: return $pop0{{$}} ; CHECK: return{{$}}
declare i32 @readnone_callee() readnone nounwind declare i32 @readnone_callee() readnone nounwind
define i32 @sink_readnone_call(i32 %x, i32 %y, i32* %p) { define i32 @sink_readnone_call(i32 %x, i32 %y, i32* %p) {
%t = call i32 @readnone_callee() %t = call i32 @readnone_callee()
store volatile i32 0, i32* %p store volatile i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; No because the call is readonly and there's an intervening store. ; No because the call is readonly and there's an intervening store.
; CHECK-LABEL: no_sink_readonly_call: ; CHECK-LABEL: no_sink_readonly_call:
; CHECK: return ${{[0-9]+}}{{$}} ; CHECK: return{{$}}
declare i32 @readonly_callee() readonly nounwind declare i32 @readonly_callee() readonly nounwind
define i32 @no_sink_readonly_call(i32 %x, i32 %y, i32* %p) { define i32 @no_sink_readonly_call(i32 %x, i32 %y, i32* %p) {
%t = call i32 @readonly_callee() %t = call i32 @readonly_callee()
store i32 0, i32* %p store i32 0, i32* %p
ret i32 %t ret i32 %t
} }
; Don't schedule stack uses into the stack. To reduce register pressure, the ; Don't schedule stack uses into the stack. To reduce register pressure, the
; scheduler might be tempted to move the definition of $2 down. However, this ; scheduler might be tempted to move the definition of $2 down. However, this
; would risk getting incorrect liveness if the instructions are later ; would risk getting incorrect liveness if the instructions are later
; rearranged to make the stack contiguous. ; rearranged to make the stack contiguous.
; CHECK-LABEL: stack_uses: ; CHECK-LABEL: stack_uses:
; CHECK: .param i32, i32, i32, i32{{$}} ; CHECK: .param i32, i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: i32.const $push[[L13:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.lt_s $push[[L0:[0-9]+]]=, $0, $pop[[L13]]{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 2{{$}} ; CHECK-NEXT: i32.lt_s
; CHECK-NEXT: i32.lt_s $push[[L2:[0-9]+]]=, $1, $pop[[L1]]{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.xor $push[[L5:[0-9]+]]=, $pop[[L0]], $pop[[L2]]{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.const $push[[L12:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: i32.lt_s
; CHECK-NEXT: i32.lt_s $push[[L3:[0-9]+]]=, $2, $pop[[L12]]{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: i32.const $push[[L11:[0-9]+]]=, 2{{$}} ; CHECK-NEXT: get_local 2{{$}}
; CHECK-NEXT: i32.lt_s $push[[L4:[0-9]+]]=, $3, $pop[[L11]]{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.xor $push[[L6:[0-9]+]]=, $pop[[L3]], $pop[[L4]]{{$}} ; CHECK-NEXT: i32.lt_s
; CHECK-NEXT: i32.xor $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}} ; CHECK-NEXT: get_local 3{{$}}
; CHECK-NEXT: i32.const $push10=, 1{{$}} ; CHECK-NEXT: i32.const 2{{$}}
; CHECK-NEXT: i32.ne $push8=, $pop7, $pop10{{$}} ; CHECK-NEXT: i32.lt_s
; CHECK-NEXT: br_if 0, $pop8{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: i32.const $push9=, 0{{$}} ; CHECK-NEXT: i32.xor {{$}}
; CHECK-NEXT: return $pop9{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.ne {{$}}
; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: return{{$}}
; CHECK-NEXT: .LBB7_2: ; CHECK-NEXT: .LBB7_2:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: i32.const $push14=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: return $pop14{{$}} ; CHECK-NEXT: return{{$}}
define i32 @stack_uses(i32 %x, i32 %y, i32 %z, i32 %w) { define i32 @stack_uses(i32 %x, i32 %y, i32 %z, i32 %w) {
entry: entry:
%c = icmp sle i32 %x, 0 %c = icmp sle i32 %x, 0
%d = icmp sle i32 %y, 1 %d = icmp sle i32 %y, 1
%e = icmp sle i32 %z, 0 %e = icmp sle i32 %z, 0
%f = icmp sle i32 %w, 1 %f = icmp sle i32 %w, 1
%g = xor i1 %c, %d %g = xor i1 %c, %d
%h = xor i1 %e, %f %h = xor i1 %e, %f
%i = xor i1 %g, %h %i = xor i1 %g, %h
br i1 %i, label %true, label %false br i1 %i, label %true, label %false
true: true:
ret i32 0 ret i32 0
false: false:
ret i32 1 ret i32 1
} }
; Test an interesting case where the load has multiple uses and cannot ; Test an interesting case where the load has multiple uses and cannot
; be trivially stackified. However, it can be stackified with a tee_local. ; be trivially stackified. However, it can be stackified with a tee_local.
; CHECK-LABEL: multiple_uses: ; CHECK-LABEL: multiple_uses:
; CHECK: .param i32, i32, i32{{$}} ; CHECK: .param i32, i32, i32{{$}}
; CHECK: .local i32{{$}}
; CHECK-NEXT: block {{$}} ; CHECK-NEXT: block {{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($2){{$}} ; CHECK-NEXT: get_local 2{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $3=, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: i32.ge_u $push[[NUM2:[0-9]+]]=, $pop[[NUM1]], $1{{$}} ; CHECK-NEXT: tee_local 3{{$}}
; CHECK-NEXT: br_if 0, $pop[[NUM2]]{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.lt_u $push[[NUM3:[0-9]+]]=, $3, $0{{$}} ; CHECK-NEXT: i32.ge_u
; CHECK-NEXT: br_if 0, $pop[[NUM3]]{{$}} ; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: i32.store 0($2), $3{{$}} ; CHECK-NEXT: get_local 3{{$}}
; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.lt_u
; CHECK-NEXT: br_if 0{{$}}
; CHECK-NEXT: get_local 2{{$}}
; CHECK-NEXT: get_local 3{{$}}
; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: .LBB8_3: ; CHECK-NEXT: .LBB8_3:
; CHECK-NEXT: end_block{{$}} ; CHECK-NEXT: end_block{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @multiple_uses(i32* %arg0, i32* %arg1, i32* %arg2) nounwind { define void @multiple_uses(i32* %arg0, i32* %arg1, i32* %arg2) nounwind {
bb: bb:
br label %loop br label %loop
loop: loop:
Show All 34 Lines
; Div instructions have side effects and can't be reordered, but this entire ; Div instructions have side effects and can't be reordered, but this entire
; function should still be able to be stackified because it's already in ; function should still be able to be stackified because it's already in
; tree order. ; tree order.
; CHECK-LABEL: div_tree: ; CHECK-LABEL: div_tree:
; CHECK: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}} ; CHECK: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.div_s $push[[L0:[0-9]+]]=, $0, $1{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.div_s $push[[L1:[0-9]+]]=, $2, $3{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.div_s $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L3:[0-9]+]]=, $4, $5{{$}} ; CHECK-NEXT: get_local 2{{$}}
; CHECK-NEXT: i32.div_s $push[[L4:[0-9]+]]=, $6, $7{{$}} ; CHECK-NEXT: get_local 3{{$}}
; CHECK-NEXT: i32.div_s $push[[L5:[0-9]+]]=, $pop[[L3]], $pop[[L4]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L6:[0-9]+]]=, $pop[[L2]], $pop[[L5]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L7:[0-9]+]]=, $8, $9{{$}} ; CHECK-NEXT: get_local 4{{$}}
; CHECK-NEXT: i32.div_s $push[[L8:[0-9]+]]=, $10, $11{{$}} ; CHECK-NEXT: get_local 5{{$}}
; CHECK-NEXT: i32.div_s $push[[L9:[0-9]+]]=, $pop[[L7]], $pop[[L8]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L10:[0-9]+]]=, $12, $13{{$}} ; CHECK-NEXT: get_local 6{{$}}
; CHECK-NEXT: i32.div_s $push[[L11:[0-9]+]]=, $14, $15{{$}} ; CHECK-NEXT: get_local 7{{$}}
; CHECK-NEXT: i32.div_s $push[[L12:[0-9]+]]=, $pop[[L10]], $pop[[L11]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L13:[0-9]+]]=, $pop[[L9]], $pop[[L12]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s $push[[L14:[0-9]+]]=, $pop[[L6]], $pop[[L13]]{{$}} ; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: return $pop[[L14]]{{$}} ; CHECK-NEXT: get_local 8{{$}}
; CHECK-NEXT: get_local 9{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: get_local 10{{$}}
; CHECK-NEXT: get_local 11{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: get_local 12{{$}}
; CHECK-NEXT: get_local 13{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: get_local 14{{$}}
; CHECK-NEXT: get_local 15{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: i32.div_s{{$}}
; CHECK-NEXT: return{{$}}
define i32 @div_tree(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n, i32 %o, i32 %p) { define i32 @div_tree(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n, i32 %o, i32 %p) {
entry: entry:
%div = sdiv i32 %a, %b %div = sdiv i32 %a, %b
%div1 = sdiv i32 %c, %d %div1 = sdiv i32 %c, %d
%div2 = sdiv i32 %div, %div1 %div2 = sdiv i32 %div, %div1
%div3 = sdiv i32 %e, %f %div3 = sdiv i32 %e, %f
%div4 = sdiv i32 %g, %h %div4 = sdiv i32 %g, %h
%div5 = sdiv i32 %div3, %div4 %div5 = sdiv i32 %div3, %div4
%div6 = sdiv i32 %div2, %div5 %div6 = sdiv i32 %div2, %div5
%div7 = sdiv i32 %i, %j %div7 = sdiv i32 %i, %j
%div8 = sdiv i32 %k, %l %div8 = sdiv i32 %k, %l
%div9 = sdiv i32 %div7, %div8 %div9 = sdiv i32 %div7, %div8
%div10 = sdiv i32 %m, %n %div10 = sdiv i32 %m, %n
%div11 = sdiv i32 %o, %p %div11 = sdiv i32 %o, %p
%div12 = sdiv i32 %div10, %div11 %div12 = sdiv i32 %div10, %div11
%div13 = sdiv i32 %div9, %div12 %div13 = sdiv i32 %div9, %div12
%div14 = sdiv i32 %div6, %div13 %div14 = sdiv i32 %div6, %div13
ret i32 %div14 ret i32 %div14
} }
; A simple multiple-use case. ; A simple multiple-use case.
; CHECK-LABEL: simple_multiple_use: ; CHECK-LABEL: simple_multiple_use:
; CHECK: .param i32, i32{{$}} ; CHECK: .param i32, i32{{$}}
; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: call use_a@FUNCTION, $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.mul
; CHECK-NEXT: call use_b@FUNCTION, $[[NUM2]]{{$}} ; CHECK-NEXT: tee_local 1{{$}}
; CHECK-NEXT: call use_a@FUNCTION{{$}}
; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: call use_b@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
declare void @use_a(i32) declare void @use_a(i32)
declare void @use_b(i32) declare void @use_b(i32)
define void @simple_multiple_use(i32 %x, i32 %y) { define void @simple_multiple_use(i32 %x, i32 %y) {
%mul = mul i32 %y, %x %mul = mul i32 %y, %x
call void @use_a(i32 %mul) call void @use_a(i32 %mul)
call void @use_b(i32 %mul) call void @use_b(i32 %mul)
ret void ret void
} }
; Multiple uses of the same value in one instruction. ; Multiple uses of the same value in one instruction.
; CHECK-LABEL: multiple_uses_in_same_insn: ; CHECK-LABEL: multiple_uses_in_same_insn:
; CHECK: .param i32, i32{{$}} ; CHECK: .param i32, i32{{$}}
; CHECK-NEXT: i32.mul $push[[NUM0:[0-9]+]]=, $1, $0{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: call use_2@FUNCTION, $pop[[NUM1]], $[[NUM2]]{{$}} ; CHECK-NEXT: i32.mul
; CHECK-NEXT: tee_local 1{{$}}
; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: call use_2@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
declare void @use_2(i32, i32) declare void @use_2(i32, i32)
define void @multiple_uses_in_same_insn(i32 %x, i32 %y) { define void @multiple_uses_in_same_insn(i32 %x, i32 %y) {
%mul = mul i32 %y, %x %mul = mul i32 %y, %x
call void @use_2(i32 %mul, i32 %mul) call void @use_2(i32 %mul, i32 %mul)
ret void ret void
} }
; Commute operands to achieve better stackifying. ; Commute operands to achieve better stackifying.
; CHECK-LABEL: commute: ; CHECK-LABEL: commute:
; CHECK-NOT: param ; CHECK-NOT: param
; CHECK: .result i32{{$}} ; CHECK: .result i32{{$}}
; CHECK-NEXT: i32.call $push0=, red@FUNCTION{{$}} ; CHECK-NEXT: i32.call red@FUNCTION{{$}}
; CHECK-NEXT: i32.call $push1=, green@FUNCTION{{$}} ; CHECK-NEXT: i32.call green@FUNCTION{{$}}
; CHECK-NEXT: i32.add $push2=, $pop0, $pop1{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.call $push3=, blue@FUNCTION{{$}} ; CHECK-NEXT: i32.call blue@FUNCTION{{$}}
; CHECK-NEXT: i32.add $push4=, $pop2, $pop3{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: return $pop4{{$}} ; CHECK-NEXT: return{{$}}
declare i32 @red() declare i32 @red()
declare i32 @green() declare i32 @green()
declare i32 @blue() declare i32 @blue()
define i32 @commute() { define i32 @commute() {
%call = call i32 @red() %call = call i32 @red()
%call1 = call i32 @green() %call1 = call i32 @green()
%add = add i32 %call1, %call %add = add i32 %call1, %call
%call2 = call i32 @blue() %call2 = call i32 @blue()
%add3 = add i32 %add, %call2 %add3 = add i32 %add, %call2
ret i32 %add3 ret i32 %add3
} }
; Don't stackify a register when it would move a the def of the register past ; Don't stackify a register when it would move a the def of the register past
; an implicit get_local for the register. ; an implicit get_local for the register.
; CHECK-LABEL: no_stackify_past_use: ; CHECK-LABEL: no_stackify_past_use:
; CHECK: i32.call $1=, callee@FUNCTION, $0 ; CHECK: get_local 0{{$}}
; CHECK-NEXT: i32.const $push0=, 1 ; CHECK-NEXT: i32.call callee@FUNCTION
; CHECK-NEXT: i32.add $push1=, $0, $pop0 ; CHECK-NEXT: set_local 1{{$}}
; CHECK-NEXT: i32.call $push2=, callee@FUNCTION, $pop1 ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.sub $push3=, $pop2, $1 ; CHECK-NEXT: i32.const 1
; CHECK-NEXT: i32.div_s $push4=, $pop3, $1 ; CHECK-NEXT: i32.add
; CHECK-NEXT: return $pop4 ; CHECK-NEXT: i32.call callee@FUNCTION
; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.sub
; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.div_s
; CHECK-NEXT: return
declare i32 @callee(i32) declare i32 @callee(i32)
define i32 @no_stackify_past_use(i32 %arg) { define i32 @no_stackify_past_use(i32 %arg) {
%tmp1 = call i32 @callee(i32 %arg) %tmp1 = call i32 @callee(i32 %arg)
%tmp2 = add i32 %arg, 1 %tmp2 = add i32 %arg, 1
%tmp3 = call i32 @callee(i32 %tmp2) %tmp3 = call i32 @callee(i32 %tmp2)
%tmp5 = sub i32 %tmp3, %tmp1 %tmp5 = sub i32 %tmp3, %tmp1
%tmp6 = sdiv i32 %tmp5, %tmp1 %tmp6 = sdiv i32 %tmp5, %tmp1
ret i32 %tmp6 ret i32 %tmp6
} }
; This is the same as no_stackify_past_use, except using a commutative operator, ; This is the same as no_stackify_past_use, except using a commutative operator,
; so we can reorder the operands and stackify. ; so we can reorder the operands and stackify.
; CHECK-LABEL: commute_to_fix_ordering: ; CHECK-LABEL: commute_to_fix_ordering:
; CHECK: i32.call $push[[L0:.+]]=, callee@FUNCTION, $0 ; CHECK: get_local 0{{$}}
; CHECK: tee_local $push[[L1:.+]]=, $1=, $pop[[L0]] ; CHECK: i32.call callee@FUNCTION
; CHECK: i32.const $push0=, 1 ; CHECK: tee_local 1
; CHECK: i32.add $push1=, $0, $pop0 ; CHECK: get_local 1{{$}}
; CHECK: i32.call $push2=, callee@FUNCTION, $pop1 ; CHECK: get_local 0{{$}}
; CHECK: i32.add $push3=, $1, $pop2 ; CHECK: i32.const 1
; CHECK: i32.mul $push4=, $pop[[L1]], $pop3 ; CHECK: i32.add
; CHECK: return $pop4 ; CHECK: i32.call callee@FUNCTION
; CHECK: i32.add
; CHECK: i32.mul
; CHECK: return
define i32 @commute_to_fix_ordering(i32 %arg) { define i32 @commute_to_fix_ordering(i32 %arg) {
%tmp1 = call i32 @callee(i32 %arg) %tmp1 = call i32 @callee(i32 %arg)
%tmp2 = add i32 %arg, 1 %tmp2 = add i32 %arg, 1
%tmp3 = call i32 @callee(i32 %tmp2) %tmp3 = call i32 @callee(i32 %tmp2)
%tmp5 = add i32 %tmp3, %tmp1 %tmp5 = add i32 %tmp3, %tmp1
%tmp6 = mul i32 %tmp5, %tmp1 %tmp6 = mul i32 %tmp5, %tmp1
ret i32 %tmp6 ret i32 %tmp6
} }
; Stackify individual defs of virtual registers with multiple defs. ; Stackify individual defs of virtual registers with multiple defs.
; CHECK-LABEL: multiple_defs: ; CHECK-LABEL: multiple_defs:
; CHECK: f64.add $push[[NUM0:[0-9]+]]=, ${{[0-9]+}}, $pop{{[0-9]+}}{{$}} ; CHECK: f64.add
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}} ; CHECK: tee_local
; CHECK-NEXT: f64.select $push{{[0-9]+}}=, $pop{{[0-9]+}}, $pop[[NUM1]], ${{[0-9]+}}{{$}} ; CHECK: f64.select
; CHECK: $[[NUM2]]=,
define void @multiple_defs(i32 %arg, i32 %arg1, i1 %arg2, i1 %arg3, i1 %arg4) { define void @multiple_defs(i32 %arg, i32 %arg1, i1 %arg2, i1 %arg3, i1 %arg4) {
bb: bb:
br label %bb5 br label %bb5
bb5: ; preds = %bb21, %bb bb5: ; preds = %bb21, %bb
%tmp = phi double [ 0.000000e+00, %bb ], [ %tmp22, %bb21 ] %tmp = phi double [ 0.000000e+00, %bb ], [ %tmp22, %bb21 ]
%tmp6 = phi double [ 0.000000e+00, %bb ], [ %tmp23, %bb21 ] %tmp6 = phi double [ 0.000000e+00, %bb ], [ %tmp23, %bb21 ]
%tmp7 = fcmp olt double %tmp6, 2.323450e+01 %tmp7 = fcmp olt double %tmp6, 2.323450e+01
Show All 23 Linesbb21: ; preds = %bb17, %bb5
%tmp23 = fadd double %tmp6, 1.000000e+00 %tmp23 = fadd double %tmp6, 1.000000e+00
br i1 %arg4, label %exit, label %bb5 br i1 %arg4, label %exit, label %bb5
exit: exit:
ret void ret void
} }
; Don't move calls past loads ; Don't move calls past loads
; CHECK-LABEL: no_stackify_call_past_load: ; CHECK-LABEL: no_stackify_call_past_load:
; CHECK: i32.call $0=, red ; CHECK: i32.call red
; CHECK: i32.const $push0=, 0 ; CHECK: i32.const 0
; CHECK: i32.load $1=, count($pop0) ; CHECK: i32.load count
@count = hidden global i32 0, align 4 @count = hidden global i32 0, align 4
define i32 @no_stackify_call_past_load() { define i32 @no_stackify_call_past_load() {
%a = call i32 @red() %a = call i32 @red()
%b = load i32, i32* @count, align 4 %b = load i32, i32* @count, align 4
call i32 @callee(i32 %a) call i32 @callee(i32 %a)
ret i32 %b ret i32 %b
; use of a ; use of a
} }
; Don't move stores past loads if there may be aliasing ; Don't move stores past loads if there may be aliasing
; CHECK-LABEL: no_stackify_store_past_load ; CHECK-LABEL: no_stackify_store_past_load
; CHECK: i32.store 0($1), $0 ; CHECK: i32.store 0
; CHECK: i32.load {{.*}}, 0($2) ; CHECK: i32.load 0
; CHECK: i32.call {{.*}}, callee@FUNCTION, $0{{$}} ; CHECK: i32.call callee@FUNCTION{{$}}
define i32 @no_stackify_store_past_load(i32 %a, i32* %p1, i32* %p2) { define i32 @no_stackify_store_past_load(i32 %a, i32* %p1, i32* %p2) {
store i32 %a, i32* %p1 store i32 %a, i32* %p1
%b = load i32, i32* %p2, align 4 %b = load i32, i32* %p2, align 4
call i32 @callee(i32 %a) call i32 @callee(i32 %a)
ret i32 %b ret i32 %b
} }
; Can still stackify past invariant loads. ; Can still stackify past invariant loads.
; CHECK-LABEL: store_past_invar_load ; CHECK-LABEL: store_past_invar_load
; CHECK: i32.store 0($1), $0 ; CHECK: i32.store 0
; CHECK: i32.call {{.*}}, callee@FUNCTION, $0 ; CHECK: i32.call callee@FUNCTION
; CHECK: i32.load $push{{.*}}, 0($2) ; CHECK: i32.load 0
; CHECK: return $pop ; CHECK: return
define i32 @store_past_invar_load(i32 %a, i32* %p1, i32* dereferenceable(4) %p2) { define i32 @store_past_invar_load(i32 %a, i32* %p1, i32* dereferenceable(4) %p2) {
store i32 %a, i32* %p1 store i32 %a, i32* %p1
%b = load i32, i32* %p2, !invariant.load !0 %b = load i32, i32* %p2, !invariant.load !0
call i32 @callee(i32 %a) call i32 @callee(i32 %a)
ret i32 %b ret i32 %b
} }
; CHECK-LABEL: ignore_dbg_value: ; CHECK-LABEL: ignore_dbg_value:
; CHECK-NEXT: .Lfunc_begin ; CHECK-NEXT: .Lfunc_begin
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
define void @ignore_dbg_value() { define void @ignore_dbg_value() {
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !9), !dbg !10 call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !9), !dbg !10
unreachable unreachable
} }
; Don't stackify an expression that might use the stack into a return, since we ; Don't stackify an expression that might use the stack into a return, since we
; might insert a prologue before the return. ; might insert a prologue before the return.
; CHECK-LABEL: no_stackify_past_epilogue: ; CHECK-LABEL: no_stackify_past_epilogue:
; CHECK: return ${{[0-9]+}}{{$}} ; CHECK: return{{$}}
declare i32 @use_memory(i32*) declare i32 @use_memory(i32*)
define i32 @no_stackify_past_epilogue() { define i32 @no_stackify_past_epilogue() {
%x = alloca i32 %x = alloca i32
%call = call i32 @use_memory(i32* %x) %call = call i32 @use_memory(i32* %x)
ret i32 %call ret i32 %call
} }
; Stackify a loop induction variable into a loop comparison. ; Stackify a loop induction variable into a loop comparison.
; CHECK-LABEL: stackify_indvar: ; CHECK-LABEL: stackify_indvar:
; CHECK: i32.const $push[[L5:.+]]=, 1{{$}} ; CHECK: i32.const 1{{$}}
; CHECK-NEXT: i32.add $push[[L4:.+]]=, $[[R0:.+]], $pop[[L5]]{{$}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: tee_local $push[[L3:.+]]=, $[[R0]]=, $pop[[L4]]{{$}} ; CHECK-NEXT: tee_local 2{{$}}
; CHECK-NEXT: i32.ne $push[[L2:.+]]=, $0, $pop[[L3]]{{$}} ; CHECK-NEXT: i32.ne
define void @stackify_indvar(i32 %tmp, i32* %v) #0 { define void @stackify_indvar(i32 %tmp, i32* %v) #0 {
bb: bb:
br label %bb3 br label %bb3
bb3: ; preds = %bb3, %bb2 bb3: ; preds = %bb3, %bb2
%tmp4 = phi i32 [ %tmp7, %bb3 ], [ 0, %bb ] %tmp4 = phi i32 [ %tmp7, %bb3 ], [ 0, %bb ]
%tmp5 = load volatile i32, i32* %v, align 4 %tmp5 = load volatile i32, i32* %v, align 4
%tmp6 = add nsw i32 %tmp5, %tmp4 %tmp6 = add nsw i32 %tmp5, %tmp4
store volatile i32 %tmp6, i32* %v, align 4 store volatile i32 %tmp6, i32* %v, align 4
%tmp7 = add nuw nsw i32 %tmp4, 1 %tmp7 = add nuw nsw i32 %tmp4, 1
%tmp8 = icmp eq i32 %tmp7, %tmp %tmp8 = icmp eq i32 %tmp7, %tmp
br i1 %tmp8, label %bb10, label %bb3 br i1 %tmp8, label %bb10, label %bb3
bb10: ; preds = %bb9, %bb bb10: ; preds = %bb9, %bb
ret void ret void
} }
; Don't stackify a call past a __stack_pointer store. ; Don't stackify a call past a __stack_pointer store.
; CHECK-LABEL: stackpointer_dependency: ; CHECK-LABEL: stackpointer_dependency:
; CHECK: call {{.+}}, stackpointer_callee@FUNCTION, ; CHECK: call stackpointer_callee@FUNCTION
; CHECK-NEXT: set_global __stack_pointer, ; CHECK: set_global __stack_pointer
declare i32 @stackpointer_callee(i8* readnone, i8* readnone) declare i32 @stackpointer_callee(i8* readnone, i8* readnone)
declare i8* @llvm.frameaddress(i32) declare i8* @llvm.frameaddress(i32)
define i32 @stackpointer_dependency(i8* readnone) { define i32 @stackpointer_dependency(i8* readnone) {
%2 = tail call i8* @llvm.frameaddress(i32 0) %2 = tail call i8* @llvm.frameaddress(i32 0)
%3 = tail call i32 @stackpointer_callee(i8* %0, i8* %2) %3 = tail call i32 @stackpointer_callee(i8* %0, i8* %2)
ret i32 %3 ret i32 %3
} }
; Stackify a call_indirect with respect to its ordering ; Stackify a call_indirect with respect to its ordering
; CHECK-LABEL: call_indirect_stackify: ; CHECK-LABEL: call_indirect_stackify:
; CHECK: i32.load $push[[L4:.+]]=, 0($0) ; CHECK: i32.load 0
; CHECK-NEXT: tee_local $push[[L3:.+]]=, $0=, $pop[[L4]] ; CHECK-NEXT: tee_local 0
; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0) ; CHECK: i32.load 0
; CHECK-NEXT: i32.load $push[[L1:.+]]=, 0($pop[[L0]]) ; CHECK-NEXT: i32.load 0
; CHECK-NEXT: i32.call_indirect $push{{.+}}=, $pop[[L3]], $1, $pop[[L1]] ; CHECK-NEXT: i32.call_indirect
%class.call_indirect = type { i32 (...)** } %class.call_indirect = type { i32 (...)** }
define i32 @call_indirect_stackify(%class.call_indirect** %objptr, i32 %arg) { define i32 @call_indirect_stackify(%class.call_indirect** %objptr, i32 %arg) {
%obj = load %class.call_indirect*, %class.call_indirect** %objptr %obj = load %class.call_indirect*, %class.call_indirect** %objptr
%addr = bitcast %class.call_indirect* %obj to i32(%class.call_indirect*, i32)*** %addr = bitcast %class.call_indirect* %obj to i32(%class.call_indirect*, i32)***
%vtable = load i32(%class.call_indirect*, i32)**, i32(%class.call_indirect*, i32)*** %addr %vtable = load i32(%class.call_indirect*, i32)**, i32(%class.call_indirect*, i32)*** %addr
%vfn = getelementptr inbounds i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vtable, i32 0 %vfn = getelementptr inbounds i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vtable, i32 0
%f = load i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vfn %f = load i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vfn
%ret = call i32 %f(%class.call_indirect* %obj, i32 %arg) %ret = call i32 %f(%class.call_indirect* %obj, i32 %arg)
Show All 16 Lines

test/CodeGen/WebAssembly/return-int32.ll

; RUN: llc < %s -asm-verbose=false | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_i32: ; CHECK-LABEL: return_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: get_local $push0=, 0 ; CHECK-NEXT: get_local 0
; CHECK-NEXT: end_function{{$}} ; CHECK-NEXT: end_function{{$}}
define i32 @return_i32(i32 %p) { define i32 @return_i32(i32 %p) {
ret i32 %p ret i32 %p
} }
; CHECK-LABEL: return_i32_twice: ; CHECK-LABEL: return_i32_twice:
; CHECK: store ; CHECK: store
; CHECK-NEXT: i32.const $push[[L0:[^,]+]]=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: return $pop[[L0]]{{$}} ; CHECK-NEXT: return{{$}}
; CHECK: store ; CHECK: store
; CHECK-NEXT: i32.const $push{{[^,]+}}=, 3{{$}} ; CHECK-NEXT: i32.const 3{{$}}
; CHECK-NEXT: end_function{{$}} ; CHECK-NEXT: end_function{{$}}
define i32 @return_i32_twice(i32 %a) { define i32 @return_i32_twice(i32 %a) {
%b = icmp ne i32 %a, 0 %b = icmp ne i32 %a, 0
br i1 %b, label %true, label %false br i1 %b, label %true, label %false
true: true:
store i32 0, i32* null store i32 0, i32* null
ret i32 1 ret i32 1
false: false:
store i32 2, i32* null store i32 2, i32* null
ret i32 3 ret i32 3
} }

test/CodeGen/WebAssembly/returned.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test that the "returned" attribute is optimized effectively. ; Test that the "returned" attribute is optimized effectively.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _Z3foov: ; CHECK-LABEL: _Z3foov:
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push0=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: {{^}} i32.call $push1=, _Znwm@FUNCTION, $pop0{{$}} ; CHECK-NEXT: {{^}} i32.call _Znwm@FUNCTION{{$}}
; CHECK-NEXT: {{^}} i32.call $push2=, _ZN5AppleC1Ev@FUNCTION, $pop1{{$}} ; CHECK-NEXT: {{^}} i32.call _ZN5AppleC1Ev@FUNCTION{{$}}
; CHECK-NEXT: return $pop2{{$}} ; CHECK-NEXT: return {{$}}
%class.Apple = type { i8 } %class.Apple = type { i8 }
declare noalias i8* @_Znwm(i32) declare noalias i8* @_Znwm(i32)
declare %class.Apple* @_ZN5AppleC1Ev(%class.Apple* returned) declare %class.Apple* @_ZN5AppleC1Ev(%class.Apple* returned)
define %class.Apple* @_Z3foov() { define %class.Apple* @_Z3foov() {
entry: entry:
%call = tail call noalias i8* @_Znwm(i32 1) %call = tail call noalias i8* @_Znwm(i32 1)
%0 = bitcast i8* %call to %class.Apple* %0 = bitcast i8* %call to %class.Apple*
%call1 = tail call %class.Apple* @_ZN5AppleC1Ev(%class.Apple* %0) %call1 = tail call %class.Apple* @_ZN5AppleC1Ev(%class.Apple* %0)
ret %class.Apple* %0 ret %class.Apple* %0
} }
; CHECK-LABEL: _Z3barPvS_l: ; CHECK-LABEL: _Z3barPvS_l:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: {{^}} i32.call $push0=, memcpy@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: {{^}} i32.call memcpy@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
declare i8* @memcpy(i8* returned, i8*, i32) declare i8* @memcpy(i8* returned, i8*, i32)
define i8* @_Z3barPvS_l(i8* %p, i8* %s, i32 %n) { define i8* @_Z3barPvS_l(i8* %p, i8* %s, i32 %n) {
entry: entry:
%call = tail call i8* @memcpy(i8* %p, i8* %s, i32 %n) %call = tail call i8* @memcpy(i8* %p, i8* %s, i32 %n)
ret i8* %p ret i8* %p
} }
; Test that the optimization isn't performed on constant arguments. ; Test that the optimization isn't performed on constant arguments.
; CHECK-LABEL: test_constant_arg: ; CHECK-LABEL: test_constant_arg:
; CHECK-NEXT: i32.const $push0=, global{{$}} ; CHECK-NEXT: i32.const global{{$}}
; CHECK-NEXT: {{^}} i32.call $drop=, returns_arg@FUNCTION, $pop0{{$}} ; CHECK-NEXT: {{^}} i32.call returns_arg@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
@global = external global i32 @global = external global i32
@addr = global i32* @global @addr = global i32* @global
define void @test_constant_arg() { define void @test_constant_arg() {
%call = call i32* @returns_arg(i32* @global) %call = call i32* @returns_arg(i32* @global)
ret void ret void
} }
declare i32* @returns_arg(i32* returned) declare i32* @returns_arg(i32* returned)
; Test that the optimization isn't performed on arguments without the ; Test that the optimization isn't performed on arguments without the
; "returned" attribute. ; "returned" attribute.
; CHECK-LABEL: test_other_skipped: ; CHECK-LABEL: test_other_skipped:
; CHECK-NEXT: .param i32, i32, f64{{$}} ; CHECK-NEXT: .param i32, i32, f64{{$}}
; CHECK-NEXT: {{^}} i32.call $drop=, do_something@FUNCTION, $0, $1, $2{{$}} ; CHECK-NEXT: {{^}} i32.call do_something@FUNCTION{{$}}
; CHECK-NEXT: {{^}} call do_something_with_i32@FUNCTION, $1{{$}} ; CHECK-NEXT: {{^}} call do_something_with_i32@FUNCTION{{$}}
; CHECK-NEXT: {{^}} call do_something_with_double@FUNCTION, $2{{$}} ; CHECK-NEXT: {{^}} call do_something_with_double@FUNCTION{{$}}
declare i32 @do_something(i32 returned, i32, double) declare i32 @do_something(i32 returned, i32, double)
declare void @do_something_with_i32(i32) declare void @do_something_with_i32(i32)
declare void @do_something_with_double(double) declare void @do_something_with_double(double)
define void @test_other_skipped(i32 %a, i32 %b, double %c) { define void @test_other_skipped(i32 %a, i32 %b, double %c) {
%call = call i32 @do_something(i32 %a, i32 %b, double %c) %call = call i32 @do_something(i32 %a, i32 %b, double %c)
call void @do_something_with_i32(i32 %b) call void @do_something_with_i32(i32 %b)
call void @do_something_with_double(double %c) call void @do_something_with_double(double %c)
ret void ret void
} }
; Test that the optimization is performed on arguments other than the first. ; Test that the optimization is performed on arguments other than the first.
; CHECK-LABEL: test_second_arg: ; CHECK-LABEL: test_second_arg:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: {{^}} i32.call $push0=, do_something_else@FUNCTION, $0, $1{{$}} ; CHECK-NEXT: {{^}} i32.call do_something_else@FUNCTION{{$}}
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
declare i32 @do_something_else(i32, i32 returned) declare i32 @do_something_else(i32, i32 returned)
define i32 @test_second_arg(i32 %a, i32 %b) { define i32 @test_second_arg(i32 %a, i32 %b) {
%call = call i32 @do_something_else(i32 %a, i32 %b) %call = call i32 @do_something_else(i32 %a, i32 %b)
ret i32 %b ret i32 %b
} }

test/CodeGen/WebAssembly/select.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that wasm select instruction is selected from LLVM select instruction. ; Test that wasm select instruction is selected from LLVM select instruction.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: select_i32_bool: ; CHECK-LABEL: select_i32_bool:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: i32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) { define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) {
%cond = select i1 %a, i32 %b, i32 %c %cond = select i1 %a, i32 %b, i32 %c
ret i32 %cond ret i32 %cond
} }
; CHECK-LABEL: select_i32_eq: ; CHECK-LABEL: select_i32_eq:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.select $push0=, $2, $1, $0{{$}} ; CHECK-NEXT: i32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i32 @select_i32_eq(i32 %a, i32 %b, i32 %c) { define i32 @select_i32_eq(i32 %a, i32 %b, i32 %c) {
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
%cond = select i1 %cmp, i32 %b, i32 %c %cond = select i1 %cmp, i32 %b, i32 %c
ret i32 %cond ret i32 %cond
} }
; CHECK-LABEL: select_i32_ne: ; CHECK-LABEL: select_i32_ne:
; CHECK-NEXT: .param i32, i32, i32{{$}} ; CHECK-NEXT: .param i32, i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: i32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i32 @select_i32_ne(i32 %a, i32 %b, i32 %c) { define i32 @select_i32_ne(i32 %a, i32 %b, i32 %c) {
%cmp = icmp ne i32 %a, 0 %cmp = icmp ne i32 %a, 0
%cond = select i1 %cmp, i32 %b, i32 %c %cond = select i1 %cmp, i32 %b, i32 %c
ret i32 %cond ret i32 %cond
} }
; CHECK-LABEL: select_i64_bool: ; CHECK-LABEL: select_i64_bool:
; CHECK-NEXT: .param i32, i64, i64{{$}} ; CHECK-NEXT: .param i32, i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: i64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i64 @select_i64_bool(i1 zeroext %a, i64 %b, i64 %c) { define i64 @select_i64_bool(i1 zeroext %a, i64 %b, i64 %c) {
%cond = select i1 %a, i64 %b, i64 %c %cond = select i1 %a, i64 %b, i64 %c
ret i64 %cond ret i64 %cond
} }
; CHECK-LABEL: select_i64_eq: ; CHECK-LABEL: select_i64_eq:
; CHECK-NEXT: .param i32, i64, i64{{$}} ; CHECK-NEXT: .param i32, i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.select $push0=, $2, $1, $0{{$}} ; CHECK-NEXT: i64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i64 @select_i64_eq(i32 %a, i64 %b, i64 %c) { define i64 @select_i64_eq(i32 %a, i64 %b, i64 %c) {
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
%cond = select i1 %cmp, i64 %b, i64 %c %cond = select i1 %cmp, i64 %b, i64 %c
ret i64 %cond ret i64 %cond
} }
; CHECK-LABEL: select_i64_ne: ; CHECK-LABEL: select_i64_ne:
; CHECK-NEXT: .param i32, i64, i64{{$}} ; CHECK-NEXT: .param i32, i64, i64{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: i64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define i64 @select_i64_ne(i32 %a, i64 %b, i64 %c) { define i64 @select_i64_ne(i32 %a, i64 %b, i64 %c) {
%cmp = icmp ne i32 %a, 0 %cmp = icmp ne i32 %a, 0
%cond = select i1 %cmp, i64 %b, i64 %c %cond = select i1 %cmp, i64 %b, i64 %c
ret i64 %cond ret i64 %cond
} }
; CHECK-LABEL: select_f32_bool: ; CHECK-LABEL: select_f32_bool:
; CHECK-NEXT: .param i32, f32, f32{{$}} ; CHECK-NEXT: .param i32, f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: f32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define float @select_f32_bool(i1 zeroext %a, float %b, float %c) { define float @select_f32_bool(i1 zeroext %a, float %b, float %c) {
%cond = select i1 %a, float %b, float %c %cond = select i1 %a, float %b, float %c
ret float %cond ret float %cond
} }
; CHECK-LABEL: select_f32_eq: ; CHECK-LABEL: select_f32_eq:
; CHECK-NEXT: .param i32, f32, f32{{$}} ; CHECK-NEXT: .param i32, f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.select $push0=, $2, $1, $0{{$}} ; CHECK-NEXT: f32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define float @select_f32_eq(i32 %a, float %b, float %c) { define float @select_f32_eq(i32 %a, float %b, float %c) {
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
%cond = select i1 %cmp, float %b, float %c %cond = select i1 %cmp, float %b, float %c
ret float %cond ret float %cond
} }
; CHECK-LABEL: select_f32_ne: ; CHECK-LABEL: select_f32_ne:
; CHECK-NEXT: .param i32, f32, f32{{$}} ; CHECK-NEXT: .param i32, f32, f32{{$}}
; CHECK-NEXT: .result f32{{$}} ; CHECK-NEXT: .result f32{{$}}
; CHECK-NEXT: f32.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: f32.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define float @select_f32_ne(i32 %a, float %b, float %c) { define float @select_f32_ne(i32 %a, float %b, float %c) {
%cmp = icmp ne i32 %a, 0 %cmp = icmp ne i32 %a, 0
%cond = select i1 %cmp, float %b, float %c %cond = select i1 %cmp, float %b, float %c
ret float %cond ret float %cond
} }
; CHECK-LABEL: select_f64_bool: ; CHECK-LABEL: select_f64_bool:
; CHECK-NEXT: .param i32, f64, f64{{$}} ; CHECK-NEXT: .param i32, f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: f64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define double @select_f64_bool(i1 zeroext %a, double %b, double %c) { define double @select_f64_bool(i1 zeroext %a, double %b, double %c) {
%cond = select i1 %a, double %b, double %c %cond = select i1 %a, double %b, double %c
ret double %cond ret double %cond
} }
; CHECK-LABEL: select_f64_eq: ; CHECK-LABEL: select_f64_eq:
; CHECK-NEXT: .param i32, f64, f64{{$}} ; CHECK-NEXT: .param i32, f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.select $push0=, $2, $1, $0{{$}} ; CHECK-NEXT: f64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define double @select_f64_eq(i32 %a, double %b, double %c) { define double @select_f64_eq(i32 %a, double %b, double %c) {
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
%cond = select i1 %cmp, double %b, double %c %cond = select i1 %cmp, double %b, double %c
ret double %cond ret double %cond
} }
; CHECK-LABEL: select_f64_ne: ; CHECK-LABEL: select_f64_ne:
; CHECK-NEXT: .param i32, f64, f64{{$}} ; CHECK-NEXT: .param i32, f64, f64{{$}}
; CHECK-NEXT: .result f64{{$}} ; CHECK-NEXT: .result f64{{$}}
; CHECK-NEXT: f64.select $push0=, $1, $2, $0{{$}} ; CHECK-NEXT: f64.select
; CHECK-NEXT: return $pop0{{$}} ; CHECK-NEXT: return {{$}}
define double @select_f64_ne(i32 %a, double %b, double %c) { define double @select_f64_ne(i32 %a, double %b, double %c) {
%cmp = icmp ne i32 %a, 0 %cmp = icmp ne i32 %a, 0
%cond = select i1 %cmp, double %b, double %c %cond = select i1 %cmp, double %b, double %c
ret double %cond ret double %cond
} }

test/CodeGen/WebAssembly/signext-arg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare i32 @get_int(i16 %arg) declare i32 @get_int(i16 %arg)
define i32 @func_1(i16 %arg1 , i32 %arg2) #0 { define i32 @func_1(i16 %arg1 , i32 %arg2) #0 {
; CHECK-LABEL: func_1: ; CHECK-LABEL: func_1:
; CHECK: i32.const $push1=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.shl $push2=, $0, $pop1 ; CHECK-NEXT: i32.shl $0
; CHECK-NEXT: i32.const $push4=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.shr_s $push3=, $pop2, $pop4 ; CHECK-NEXT: i32.shr_s
; CHECK-NEXT: i32.call $push0=, get_int@FUNCTION, $pop3 ; CHECK-NEXT: i32.call get_int@FUNCTION
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
entry: entry:
%retval = call i32 @get_int(i16 signext %arg1) %retval = call i32 @get_int(i16 signext %arg1)
ret i32 %retval ret i32 %retval
} }
attributes #0 = {noinline nounwind optnone} attributes #0 = {noinline nounwind optnone}

test/CodeGen/WebAssembly/signext-inreg.ll

; RUN: llc < %s -mattr=+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -mattr=+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s --check-prefix=NOSIGNEXT ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s --check-prefix=NOSIGNEXT
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: i32_extend8_s: ; CHECK-LABEL: i32_extend8_s:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.extend8_s $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.extend8_s
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
; NOSIGNEXT-LABEL: i32_extend8_s ; NOSIGNEXT-LABEL: i32_extend8_s
; NOSIGNEXT-NOT: i32.extend8_s ; NOSIGNEXT-NOT: i32.extend8_s
define i32 @i32_extend8_s(i8 %x) { define i32 @i32_extend8_s(i8 %x) {
%a = sext i8 %x to i32 %a = sext i8 %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i32_extend16_s: ; CHECK-LABEL: i32_extend16_s:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.extend16_s $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i32.extend16_s
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
; NOSIGNEXT-LABEL: i32_extend16_s ; NOSIGNEXT-LABEL: i32_extend16_s
; NOSIGNEXT-NOT: i32.extend16_s ; NOSIGNEXT-NOT: i32.extend16_s
define i32 @i32_extend16_s(i16 %x) { define i32 @i32_extend16_s(i16 %x) {
%a = sext i16 %x to i32 %a = sext i16 %x to i32
ret i32 %a ret i32 %a
} }
; CHECK-LABEL: i64_extend8_s: ; CHECK-LABEL: i64_extend8_s:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.extend_u/i32
; CHECK-NEXT: i64.extend8_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}} ; CHECK-NEXT: i64.extend8_s{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
; NOSIGNEXT-LABEL: i64_extend8_s ; NOSIGNEXT-LABEL: i64_extend8_s
; NOSIGNEXT-NOT: i64.extend8_s ; NOSIGNEXT-NOT: i64.extend8_s
define i64 @i64_extend8_s(i8 %x) { define i64 @i64_extend8_s(i8 %x) {
%a = sext i8 %x to i64 %a = sext i8 %x to i64
ret i64 %a ret i64 %a
} }
; CHECK-LABEL: i64_extend16_s: ; CHECK-LABEL: i64_extend16_s:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.extend_u/i32
; CHECK-NEXT: i64.extend16_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}} ; CHECK-NEXT: i64.extend16_s{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
; NOSIGNEXT-LABEL: i64_extend16_s ; NOSIGNEXT-LABEL: i64_extend16_s
; NOSIGNEXT-NOT: i16.extend16_s ; NOSIGNEXT-NOT: i16.extend16_s
define i64 @i64_extend16_s(i16 %x) { define i64 @i64_extend16_s(i16 %x) {
%a = sext i16 %x to i64 %a = sext i16 %x to i64
ret i64 %a ret i64 %a
} }
; No SIGN_EXTEND_INREG is needed for 32->64 extension. ; No SIGN_EXTEND_INREG is needed for 32->64 extension.
; CHECK-LABEL: i64_extend32_s: ; CHECK-LABEL: i64_extend32_s:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i64{{$}} ; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}} ; CHECK-NEXT: i64.extend_s/i32
; CHECK-NEXT: return $pop[[NUM]]{{$}} ; CHECK-NEXT: return{{$}}
define i64 @i64_extend32_s(i32 %x) { define i64 @i64_extend32_s(i32 %x) {
%a = sext i32 %x to i64 %a = sext i32 %x to i64
ret i64 %a ret i64 %a
} }

test/CodeGen/WebAssembly/signext-zeroext.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Test zeroext and signext ABI keywords ; Test zeroext and signext ABI keywords
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: z2s_func: ; CHECK-LABEL: z2s_func:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shl $push[[NUM2:[0-9]+]]=, $0, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shr_s $push[[NUM3:[0-9]+]]=, $pop[[NUM2]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.shr_s{{$}}
; CHECK-NEXT: return $pop[[NUM3]]{{$}} ; CHECK-NEXT: return{{$}}
define signext i8 @z2s_func(i8 zeroext %t) { define signext i8 @z2s_func(i8 zeroext %t) {
ret i8 %t ret i8 %t
} }
; CHECK-LABEL: s2z_func: ; CHECK-LABEL: s2z_func:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 255{{$}} ; CHECK-NEXT: i32.const 255{{$}}
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.and
; CHECK-NEXT: return $pop[[NUM1]]{{$}} ; CHECK-NEXT: return{{$}}
define zeroext i8 @s2z_func(i8 signext %t) { define zeroext i8 @s2z_func(i8 signext %t) {
ret i8 %t ret i8 %t
} }
; CHECK-LABEL: z2s_call: ; CHECK-LABEL: z2s_call:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 255{{$}} ; CHECK-NEXT: i32.const 255{{$}}
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.and
; CHECK-NEXT: call $push[[NUM2:[0-9]+]]=, z2s_func@FUNCTION, $pop[[NUM1]]{{$}} ; CHECK-NEXT: call z2s_func@FUNCTION{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @z2s_call(i32 %t) { define i32 @z2s_call(i32 %t) {
%s = trunc i32 %t to i8 %s = trunc i32 %t to i8
%u = call signext i8 @z2s_func(i8 zeroext %s) %u = call signext i8 @z2s_func(i8 zeroext %s)
%v = sext i8 %u to i32 %v = sext i8 %u to i32
ret i32 %v ret i32 %v
} }
; CHECK-LABEL: s2z_call: ; CHECK-LABEL: s2z_call:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shl $push[[NUM1:[0-9]+]]=, $0, $pop[[NUM0]]{{$}} ; CHECK-NEXT: i32.shl
; CHECK-NEXT: i32.const $push[[NUM6:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shr_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM6]]{{$}} ; CHECK-NEXT: i32.shr_s{{$}}
; CHECK-NEXT: call $push[[NUM3:[0-9]]]=, s2z_func@FUNCTION, $pop[[NUM2]]{{$}} ; CHECK-NEXT: call s2z_func@FUNCTION{{$}}
; CHECK-NEXT: i32.const $push[[NUM7:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shl $push[[NUM4:[0-9]+]]=, $pop[[NUM3]], $pop[[NUM7]]{{$}} ; CHECK-NEXT: i32.shl{{$}}
; CHECK-NEXT: i32.const $push[[NUM8:[0-9]+]]=, 24{{$}} ; CHECK-NEXT: i32.const 24{{$}}
; CHECK-NEXT: i32.shr_s $push[[NUM5:[0-9]+]]=, $pop[[NUM4]], $pop[[NUM8]]{{$}} ; CHECK-NEXT: i32.shr_s{{$}}
; CHECK-NEXT: return $pop[[NUM5]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @s2z_call(i32 %t) { define i32 @s2z_call(i32 %t) {
%s = trunc i32 %t to i8 %s = trunc i32 %t to i8
%u = call zeroext i8 @s2z_func(i8 signext %s) %u = call zeroext i8 @s2z_func(i8 signext %s)
%v = sext i8 %u to i32 %v = sext i8 %u to i32
ret i32 %v ret i32 %v
} }

test/CodeGen/WebAssembly/simd-arith.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 | FileCheck %s --check-prefixes CHECK,NO-SIMD128 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=-simd128 | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -mattr=-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; Test that basic SIMD128 arithmetic operations assemble as expected. ; Test that basic SIMD128 arithmetic operations assemble as expected.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare i32 @llvm.ctlz.i32(i32, i1) declare i32 @llvm.ctlz.i32(i32, i1)
declare i32 @llvm.cttz.i32(i32, i1) declare i32 @llvm.cttz.i32(i32, i1)
declare i32 @llvm.ctpop.i32(i32) declare i32 @llvm.ctpop.i32(i32)
; ============================================================================== ; ==============================================================================
; 16 x i8 ; 16 x i8
; ============================================================================== ; ==============================================================================
; CHECK-LABEL: add_v16i8 ; CHECK-LABEL: add_v16i8
; NO-SIMD128-NOT: i8x16 ; NO-SIMD128-NOT: i8x16
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i8x16.add $push0=, $0, $1{{$}} ; SIMD128: i8x16.add
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) { define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) {
%a = add <16 x i8> %x, %y %a = add <16 x i8> %x, %y
ret <16 x i8> %a ret <16 x i8> %a
} }
; CHECK-LABEL: sub_v16i8 ; CHECK-LABEL: sub_v16i8
; NO-SIMD128-NOT: i8x16 ; NO-SIMD128-NOT: i8x16
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i8x16.sub $push0=, $0, $1{{$}} ; SIMD128: i8x16.sub
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) { define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
%a = sub <16 x i8> %x, %y %a = sub <16 x i8> %x, %y
ret <16 x i8> %a ret <16 x i8> %a
} }
; CHECK-LABEL: mul_v16i8 ; CHECK-LABEL: mul_v16i8
; NO-SIMD128-NOT: i8x16 ; NO-SIMD128-NOT: i8x16
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i8x16.mul $push0=, $0, $1{{$}} ; SIMD128: i8x16.mul
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) { define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
%a = mul <16 x i8> %x, %y %a = mul <16 x i8> %x, %y
ret <16 x i8> %a ret <16 x i8> %a
} }
; ============================================================================== ; ==============================================================================
; 8 x i16 ; 8 x i16
; ============================================================================== ; ==============================================================================
; CHECK-LABEL: add_v8i16 ; CHECK-LABEL: add_v8i16
; NO-SIMD128-NOT: i16x8 ; NO-SIMD128-NOT: i16x8
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i16x8.add $push0=, $0, $1{{$}} ; SIMD128: i16x8.add
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) { define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) {
%a = add <8 x i16> %x, %y %a = add <8 x i16> %x, %y
ret <8 x i16> %a ret <8 x i16> %a
} }
; CHECK-LABEL: sub_v8i16 ; CHECK-LABEL: sub_v8i16
; NO-SIMD128-NOT: i16x8 ; NO-SIMD128-NOT: i16x8
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i16x8.sub $push0=, $0, $1{{$}} ; SIMD128: i16x8.sub
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) { define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) {
%a = sub <8 x i16> %x, %y %a = sub <8 x i16> %x, %y
ret <8 x i16> %a ret <8 x i16> %a
} }
; CHECK-LABEL: mul_v8i16 ; CHECK-LABEL: mul_v8i16
; NO-SIMD128-NOT: i16x8 ; NO-SIMD128-NOT: i16x8
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i16x8.mul $push0=, $0, $1{{$}} ; SIMD128: i16x8.mul
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) { define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) {
%a = mul <8 x i16> %x, %y %a = mul <8 x i16> %x, %y
ret <8 x i16> %a ret <8 x i16> %a
} }
; ============================================================================== ; ==============================================================================
; 4 x i32 ; 4 x i32
; ============================================================================== ; ==============================================================================
; CHECK-LABEL: add_v4i32 ; CHECK-LABEL: add_v4i32
; NO-SIMD128-NOT: i32x4 ; NO-SIMD128-NOT: i32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i32x4.add $push0=, $0, $1{{$}} ; SIMD128: i32x4.add
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) { define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) {
%a = add <4 x i32> %x, %y %a = add <4 x i32> %x, %y
ret <4 x i32> %a ret <4 x i32> %a
} }
; CHECK-LABEL: sub_v4i32 ; CHECK-LABEL: sub_v4i32
; NO-SIMD128-NOT: i32x4 ; NO-SIMD128-NOT: i32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i32x4.sub $push0=, $0, $1{{$}} ; SIMD128: i32x4.sub
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) { define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) {
%a = sub <4 x i32> %x, %y %a = sub <4 x i32> %x, %y
ret <4 x i32> %a ret <4 x i32> %a
} }
; CHECK-LABEL: mul_v4i32 ; CHECK-LABEL: mul_v4i32
; NO-SIMD128-NOT: i32x4 ; NO-SIMD128-NOT: i32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: i32x4.mul $push0=, $0, $1{{$}} ; SIMD128: i32x4.mul
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) { define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) {
%a = mul <4 x i32> %x, %y %a = mul <4 x i32> %x, %y
ret <4 x i32> %a ret <4 x i32> %a
} }
; ============================================================================== ; ==============================================================================
; 4 x float ; 4 x float
; ============================================================================== ; ==============================================================================
; CHECK-LABEL: add_v4f32 ; CHECK-LABEL: add_v4f32
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: f32x4.add $push0=, $0, $1{{$}} ; SIMD128: f32x4.add
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) { define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
%a = fadd <4 x float> %x, %y %a = fadd <4 x float> %x, %y
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: sub_v4f32 ; CHECK-LABEL: sub_v4f32
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: f32x4.sub $push0=, $0, $1{{$}} ; SIMD128: f32x4.sub
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) { define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) {
%a = fsub <4 x float> %x, %y %a = fsub <4 x float> %x, %y
ret <4 x float> %a ret <4 x float> %a
} }
; CHECK-LABEL: mul_v4f32 ; CHECK-LABEL: mul_v4f32
; NO-SIMD128-NOT: f32x4 ; NO-SIMD128-NOT: f32x4
; SIMD128: .param v128, v128{{$}} ; SIMD128: .param v128, v128{{$}}
; SIMD128: .result v128{{$}} ; SIMD128: .result v128{{$}}
; SIMD128: f32x4.mul $push0=, $0, $1{{$}} ; SIMD128: f32x4.mul
; SIMD128: return $pop0{{$}} ; SIMD128: return{{$}}
define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) { define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
%a = fmul <4 x float> %x, %y %a = fmul <4 x float> %x, %y
ret <4 x float> %a ret <4 x float> %a
} }

test/CodeGen/WebAssembly/stack-alignment.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare void @somefunc(i32*) declare void @somefunc(i32*)
; CHECK-LABEL: underalign: ; CHECK-LABEL: underalign:
; CHECK: get_global $push[[L1:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L2:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.sub $push[[L10:.+]]=, $pop[[L1]], $pop[[L2]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L10]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK: get_local $push[[L3:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: i32.add $push[[underaligned:.+]]=, $pop[[L3]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[underaligned]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[M4:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: i32.add $push[[L5:.+]]=, $pop[[M4]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: set_global __stack_pointer, $pop[[L5]] ; CHECK-NEXT: set_global __stack_pointer
define void @underalign() { define void @underalign() {
entry: entry:
%underaligned = alloca i32, align 8 %underaligned = alloca i32, align 8
call void @somefunc(i32* %underaligned) call void @somefunc(i32* %underaligned)
ret void ret void
} }
; CHECK-LABEL: overalign: ; CHECK-LABEL: overalign:
; CHECK: get_global $push[[L10:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L9:.+]]=, [[BP:.+]], $pop[[L10]] ; CHECK-NEXT: tee_local [[BP:.+]]
; CHECK-NEXT: i32.const $push[[L2:.+]]=, 32 ; CHECK-NEXT: i32.const 32
; CHECK-NEXT: i32.sub $push[[L8:.+]]=, $pop[[L9]], $pop[[L2]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: i32.const $push[[L3:.+]]=, -32 ; CHECK-NEXT: i32.const -32
; CHECK-NEXT: i32.and $push[[L7:.+]]=, $pop[[L8]], $pop[[L3]] ; CHECK-NEXT: i32.and
; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L7]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK: get_local $push[[M5:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: call somefunc@FUNCTION, $pop[[M5]]{{$}} ; CHECK: call somefunc@FUNCTION{{$}}
; CHECK: get_local $push[[M6:.+]]=, [[BP]]{{$}} ; CHECK: get_local [[BP]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[M6]] ; CHECK-NEXT: set_global __stack_pointer
define void @overalign() { define void @overalign() {
entry: entry:
%overaligned = alloca i32, align 32 %overaligned = alloca i32, align 32
call void @somefunc(i32* %overaligned) call void @somefunc(i32* %overaligned)
ret void ret void
} }
; CHECK-LABEL: over_and_normal_align: ; CHECK-LABEL: over_and_normal_align:
; CHECK: get_global $push[[L14:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L13:.+]]=, [[BP:.+]], $pop[[L14]] ; CHECK-NEXT: tee_local [[BP:.+]]
; CHECK: i32.sub $push[[L12:.+]]=, $pop[[L13]], $pop{{.+}} ; CHECK: i32.sub
; CHECK: i32.and $push[[L11:.+]]=, $pop[[L12]], $pop{{.+}} ; CHECK: i32.and
; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L11]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK: get_local $push[[M6:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: i32.add $push[[L6:.+]]=, $pop[[M6]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[L6]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[M7:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: i32.add $push[[L8:.+]]=, $pop[[M7]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[L8]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[L6:.+]]=, [[BP]]{{$}} ; CHECK: get_local [[BP]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L6]] ; CHECK-NEXT: set_global __stack_pointer
define void @over_and_normal_align() { define void @over_and_normal_align() {
entry: entry:
%over = alloca i32, align 32 %over = alloca i32, align 32
%normal = alloca i32 %normal = alloca i32
call void @somefunc(i32* %over) call void @somefunc(i32* %over)
call void @somefunc(i32* %normal) call void @somefunc(i32* %normal)
ret void ret void
} }
; CHECK-LABEL: dynamic_overalign: ; CHECK-LABEL: dynamic_overalign:
; CHECK: get_global $push[[L18:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L17:.+]]=, [[SP:.+]], $pop[[L18]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK-NEXT: set_local [[BP:.+]], $pop[[L17]] ; CHECK-NEXT: set_local [[BP:.+]]
; CHECK: tee_local $push{{.+}}=, [[SP_2:.+]], $pop{{.+}} ; CHECK: tee_local [[SP_2:.+]]
; CHECK: get_local $push[[M8:.+]]=, [[SP_2]]{{$}} ; CHECK: get_local [[SP_2]]{{$}}
; CHECK: call somefunc@FUNCTION, $pop[[M8]] ; CHECK: call somefunc@FUNCTION
; CHECK: get_local $push[[M9:.+]]=, [[BP]]{{$}} ; CHECK: get_local [[BP]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[M9]] ; CHECK-NEXT: set_global __stack_pointer
define void @dynamic_overalign(i32 %num) { define void @dynamic_overalign(i32 %num) {
entry: entry:
%dynamic = alloca i32, i32 %num, align 32 %dynamic = alloca i32, i32 %num, align 32
call void @somefunc(i32* %dynamic) call void @somefunc(i32* %dynamic)
ret void ret void
} }
; CHECK-LABEL: overalign_and_dynamic: ; CHECK-LABEL: overalign_and_dynamic:
; CHECK: get_global $push[[L21:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L20:.+]]=, [[BP:.+]], $pop[[L21]] ; CHECK-NEXT: tee_local [[BP:.+]]
; CHECK: i32.sub $push[[L19:.+]]=, $pop[[L20]], $pop{{.+}} ; CHECK: i32.sub
; CHECK: i32.and $push[[L18:.+]]=, $pop[[L19]], $pop{{.+}} ; CHECK: i32.and
; CHECK: tee_local $push{{.+}}=, [[FP:.+]], $pop[[L18]] ; CHECK: tee_local [[FP:.+]]
; CHECK: get_local $push[[M10:.+]]=, [[FP]]{{$}} ; CHECK: get_local [[FP]]{{$}}
; CHECK: i32.sub $push[[L16:.+]]=, $pop[[M10]], $pop{{.+}} ; CHECK: i32.sub
; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L16]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK: get_local $push[[over:.+]]=, [[FP]] ; CHECK: get_local [[FP]]
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[over]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[another:.+]]=, [[SP]] ; CHECK: get_local [[SP]]
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[another]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[M11:.+]]=, [[BP]]{{$}} ; CHECK: get_local [[BP]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[M11]] ; CHECK-NEXT: set_global __stack_pointer
define void @overalign_and_dynamic(i32 %num) { define void @overalign_and_dynamic(i32 %num) {
entry: entry:
%over = alloca i32, align 32 %over = alloca i32, align 32
%dynamic = alloca i32, i32 %num %dynamic = alloca i32, i32 %num
call void @somefunc(i32* %over) call void @somefunc(i32* %over)
call void @somefunc(i32* %dynamic) call void @somefunc(i32* %dynamic)
ret void ret void
} }
; CHECK-LABEL: overalign_static_and_dynamic: ; CHECK-LABEL: overalign_static_and_dynamic:
; CHECK: get_global $push[[L26:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L25:.+]]=, [[BP:.+]], $pop[[L26]] ; CHECK-NEXT: tee_local [[BP:.+]]
; CHECK: i32.sub $push[[L24:.+]]=, $pop[[L25]], $pop{{.+}} ; CHECK: i32.sub
; CHECK: i32.and $push[[L23:.+]]=, $pop[[L24]], $pop{{.+}} ; CHECK: i32.and
; CHECK: tee_local $push{{.+}}=, [[FP:.+]], $pop[[L23]] ; CHECK: tee_local [[FP:.+]]
; CHECK: get_local $push[[M12:.+]]=, [[FP]]{{$}} ; CHECK: get_local [[FP]]{{$}}
; CHECK: i32.sub $push[[L21:.+]]=, $pop[[M12]], $pop{{.+}} ; CHECK: i32.sub
; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L21]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK: get_local $push[[L19:.+]]=, [[FP]] ; CHECK: get_local [[FP]]
; CHECK: tee_local $push[[L18:.+]]=, [[FP_2:.+]], $pop[[L19]] ; CHECK: tee_local [[FP_2:.+]]
; CHECK: i32.add $push[[over:.+]]=, $pop[[L18]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[over]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[M12:.+]]=, [[SP]] ; CHECK: get_local [[SP]]
; CHECK: call somefunc@FUNCTION, $pop[[M12]] ; CHECK: call somefunc@FUNCTION
; CHECK: get_local $push[[M13:.+]]=, [[FP_2]] ; CHECK: get_local [[FP_2]]
; CHECK: i32.add $push[[static:.+]]=, $pop[[M13]], $pop{{.+}} ; CHECK: i32.add
; CHECK-NEXT: call somefunc@FUNCTION, $pop[[static]] ; CHECK-NEXT: call somefunc@FUNCTION
; CHECK: get_local $push[[M14:.+]]=, [[BP]]{{$}} ; CHECK: get_local [[BP]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[M14]] ; CHECK-NEXT: set_global __stack_pointer
define void @overalign_static_and_dynamic(i32 %num) { define void @overalign_static_and_dynamic(i32 %num) {
entry: entry:
%over = alloca i32, align 32 %over = alloca i32, align 32
%dynamic = alloca i32, i32 %num %dynamic = alloca i32, i32 %num
%static = alloca i32 %static = alloca i32
call void @somefunc(i32* %over) call void @somefunc(i32* %over)
call void @somefunc(i32* %dynamic) call void @somefunc(i32* %dynamic)
call void @somefunc(i32* %static) call void @somefunc(i32* %static)
ret void ret void
} }

test/CodeGen/WebAssembly/store-trunc-atomic.ll

; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s
; Test that truncating stores are assembled properly. ; Test that truncating stores are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: trunc_i8_i32: ; CHECK-LABEL: trunc_i8_i32:
; CHECK: i32.atomic.store8 0($0), $1{{$}} ; CHECK: i32.atomic.store8 0{{$}}
define void @trunc_i8_i32(i8 *%p, i32 %v) { define void @trunc_i8_i32(i8 *%p, i32 %v) {
%t = trunc i32 %v to i8 %t = trunc i32 %v to i8
store atomic i8 %t, i8* %p seq_cst, align 1 store atomic i8 %t, i8* %p seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: trunc_i16_i32: ; CHECK-LABEL: trunc_i16_i32:
; CHECK: i32.atomic.store16 0($0), $1{{$}} ; CHECK: i32.atomic.store16 0{{$}}
define void @trunc_i16_i32(i16 *%p, i32 %v) { define void @trunc_i16_i32(i16 *%p, i32 %v) {
%t = trunc i32 %v to i16 %t = trunc i32 %v to i16
store atomic i16 %t, i16* %p seq_cst, align 2 store atomic i16 %t, i16* %p seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: trunc_i8_i64: ; CHECK-LABEL: trunc_i8_i64:
; CHECK: i64.atomic.store8 0($0), $1{{$}} ; CHECK: i64.atomic.store8 0{{$}}
define void @trunc_i8_i64(i8 *%p, i64 %v) { define void @trunc_i8_i64(i8 *%p, i64 %v) {
%t = trunc i64 %v to i8 %t = trunc i64 %v to i8
store atomic i8 %t, i8* %p seq_cst, align 1 store atomic i8 %t, i8* %p seq_cst, align 1
ret void ret void
} }
; CHECK-LABEL: trunc_i16_i64: ; CHECK-LABEL: trunc_i16_i64:
; CHECK: i64.atomic.store16 0($0), $1{{$}} ; CHECK: i64.atomic.store16 0{{$}}
define void @trunc_i16_i64(i16 *%p, i64 %v) { define void @trunc_i16_i64(i16 *%p, i64 %v) {
%t = trunc i64 %v to i16 %t = trunc i64 %v to i16
store atomic i16 %t, i16* %p seq_cst, align 2 store atomic i16 %t, i16* %p seq_cst, align 2
ret void ret void
} }
; CHECK-LABEL: trunc_i32_i64: ; CHECK-LABEL: trunc_i32_i64:
; CHECK: i64.atomic.store32 0($0), $1{{$}} ; CHECK: i64.atomic.store32 0{{$}}
define void @trunc_i32_i64(i32 *%p, i64 %v) { define void @trunc_i32_i64(i32 *%p, i64 %v) {
%t = trunc i64 %v to i32 %t = trunc i64 %v to i32
store atomic i32 %t, i32* %p seq_cst, align 4 store atomic i32 %t, i32* %p seq_cst, align 4
ret void ret void
} }

test/CodeGen/WebAssembly/store-trunc.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that truncating stores are assembled properly. ; Test that truncating stores are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: trunc_i8_i32: ; CHECK-LABEL: trunc_i8_i32:
; CHECK: i32.store8 0($0), $1{{$}} ; CHECK: i32.store8 0{{$}}
define void @trunc_i8_i32(i8 *%p, i32 %v) { define void @trunc_i8_i32(i8 *%p, i32 %v) {
%t = trunc i32 %v to i8 %t = trunc i32 %v to i8
store i8 %t, i8* %p store i8 %t, i8* %p
ret void ret void
} }
; CHECK-LABEL: trunc_i16_i32: ; CHECK-LABEL: trunc_i16_i32:
; CHECK: i32.store16 0($0), $1{{$}} ; CHECK: i32.store16 0{{$}}
define void @trunc_i16_i32(i16 *%p, i32 %v) { define void @trunc_i16_i32(i16 *%p, i32 %v) {
%t = trunc i32 %v to i16 %t = trunc i32 %v to i16
store i16 %t, i16* %p store i16 %t, i16* %p
ret void ret void
} }
; CHECK-LABEL: trunc_i8_i64: ; CHECK-LABEL: trunc_i8_i64:
; CHECK: i64.store8 0($0), $1{{$}} ; CHECK: i64.store8 0{{$}}
define void @trunc_i8_i64(i8 *%p, i64 %v) { define void @trunc_i8_i64(i8 *%p, i64 %v) {
%t = trunc i64 %v to i8 %t = trunc i64 %v to i8
store i8 %t, i8* %p store i8 %t, i8* %p
ret void ret void
} }
; CHECK-LABEL: trunc_i16_i64: ; CHECK-LABEL: trunc_i16_i64:
; CHECK: i64.store16 0($0), $1{{$}} ; CHECK: i64.store16 0{{$}}
define void @trunc_i16_i64(i16 *%p, i64 %v) { define void @trunc_i16_i64(i16 *%p, i64 %v) {
%t = trunc i64 %v to i16 %t = trunc i64 %v to i16
store i16 %t, i16* %p store i16 %t, i16* %p
ret void ret void
} }
; CHECK-LABEL: trunc_i32_i64: ; CHECK-LABEL: trunc_i32_i64:
; CHECK: i64.store32 0($0), $1{{$}} ; CHECK: i64.store32 0{{$}}
define void @trunc_i32_i64(i32 *%p, i64 %v) { define void @trunc_i32_i64(i32 *%p, i64 %v) {
%t = trunc i64 %v to i32 %t = trunc i64 %v to i32
store i32 %t, i32* %p store i32 %t, i32* %p
ret void ret void
} }

test/CodeGen/WebAssembly/store.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that basic stores are assembled properly. ; Test that basic stores are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: sti32: ; CHECK-LABEL: sti32:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i32.store 0($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti32(i32 *%p, i32 %v) { define void @sti32(i32 *%p, i32 %v) {
store i32 %v, i32* %p store i32 %v, i32* %p
ret void ret void
} }
; CHECK-LABEL: sti64: ; CHECK-LABEL: sti64:
; CHECK-NEXT: .param i32, i64{{$}} ; CHECK-NEXT: .param i32, i64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: i64.store 0($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK-NEXT: i64.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @sti64(i64 *%p, i64 %v) { define void @sti64(i64 *%p, i64 %v) {
store i64 %v, i64* %p store i64 %v, i64* %p
ret void ret void
} }
; CHECK-LABEL: stf32: ; CHECK-LABEL: stf32:
; CHECK-NEXT: .param i32, f32{{$}} ; CHECK-NEXT: .param i32, f32{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f32.store 0($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK-NEXT: f32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @stf32(float *%p, float %v) { define void @stf32(float *%p, float %v) {
store float %v, float* %p store float %v, float* %p
ret void ret void
} }
; CHECK-LABEL: stf64: ; CHECK-LABEL: stf64:
; CHECK-NEXT: .param i32, f64{{$}} ; CHECK-NEXT: .param i32, f64{{$}}
; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}} ; CHECK-NEXT: get_local 1{{$}}
; CHECK-NEXT: f64.store 0($pop[[L0]]), $pop[[L1]]{{$}} ; CHECK-NEXT: f64.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @stf64(double *%p, double %v) { define void @stf64(double *%p, double %v) {
store double %v, double* %p store double %v, double* %p
ret void ret void
} }

test/CodeGen/WebAssembly/switch.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs | FileCheck %s
; Test switch instructions. Block placement is disabled because it reorders ; Test switch instructions. Block placement is disabled because it reorders
; the blocks in a way that isn't interesting here. ; the blocks in a way that isn't interesting here.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare void @foo0() declare void @foo0()
declare void @foo1() declare void @foo1()
declare void @foo2() declare void @foo2()
declare void @foo3() declare void @foo3()
declare void @foo4() declare void @foo4()
declare void @foo5() declare void @foo5()
; CHECK-LABEL: bar32: ; CHECK-LABEL: bar32:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}} ; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
; CHECK: .LBB0_2: ; CHECK: .LBB0_2:
; CHECK: call foo0@FUNCTION{{$}} ; CHECK: call foo0@FUNCTION{{$}}
; CHECK: .LBB0_3: ; CHECK: .LBB0_3:
; CHECK: call foo1@FUNCTION{{$}} ; CHECK: call foo1@FUNCTION{{$}}
; CHECK: .LBB0_4: ; CHECK: .LBB0_4:
; CHECK: call foo2@FUNCTION{{$}} ; CHECK: call foo2@FUNCTION{{$}}
; CHECK: .LBB0_5: ; CHECK: .LBB0_5:
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Linessw.bb.5: ; preds = %entry
tail call void @foo5() tail call void @foo5()
br label %sw.epilog br label %sw.epilog
sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb sw.epilog: ; preds = %entry, %sw.bb.5, %sw.bb.4, %sw.bb.3, %sw.bb.2, %sw.bb.1, %sw.bb
ret void ret void
} }
; CHECK-LABEL: bar64: ; CHECK-LABEL: bar64:
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: block {{$}} ; CHECK: block {{$}}
; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}} ; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
; CHECK: .LBB1_2: ; CHECK: .LBB1_2:
; CHECK: call foo0@FUNCTION{{$}} ; CHECK: call foo0@FUNCTION{{$}}
; CHECK: .LBB1_3: ; CHECK: .LBB1_3:
; CHECK: call foo1@FUNCTION{{$}} ; CHECK: call foo1@FUNCTION{{$}}
; CHECK: .LBB1_4: ; CHECK: .LBB1_4:
; CHECK: call foo2@FUNCTION{{$}} ; CHECK: call foo2@FUNCTION{{$}}
; CHECK: .LBB1_5: ; CHECK: .LBB1_5:
▲ Show 20 Lines • Show All 63 Lines • Show Last 20 Lines

test/CodeGen/WebAssembly/tls.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -thread-model=single | FileCheck --check-prefix=SINGLE %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -thread-model=single | FileCheck --check-prefix=SINGLE %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; SINGLE-LABEL: address_of_tls: ; SINGLE-LABEL: address_of_tls:
define i32 @address_of_tls() { define i32 @address_of_tls() {
; SINGLE: i32.const $push0=, tls ; SINGLE: i32.const tls
; SINGLE-NEXT: return $pop0 ; SINGLE-NEXT: return
ret i32 ptrtoint(i32* @tls to i32) ret i32 ptrtoint(i32* @tls to i32)
} }
; SINGLE: .type tls,@object ; SINGLE: .type tls,@object
; SINGLE-NEXT: .section .bss.tls,"",@ ; SINGLE-NEXT: .section .bss.tls,"",@
; SINGLE-NEXT: .p2align 2 ; SINGLE-NEXT: .p2align 2
; SINGLE-NEXT: tls: ; SINGLE-NEXT: tls:
; SINGLE-NEXT: .int32 0 ; SINGLE-NEXT: .int32 0
@tls = internal thread_local global i32 0 @tls = internal thread_local global i32 0

test/CodeGen/WebAssembly/umulo-i64.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that UMULO works correctly on 64-bit operands. ; Test that UMULO works correctly on 64-bit operands.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE: ; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
; CHECK: __multi3 ; CHECK: __multi3
; Function Attrs: inlinehint ; Function Attrs: inlinehint
define void @"_ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE"(i64, i64) unnamed_addr #0 { define void @"_ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE"(i64, i64) unnamed_addr #0 {
start: start:
%2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1) %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
%3 = extractvalue { i64, i1 } %2, 0 %3 = extractvalue { i64, i1 } %2, 0
store i64 %3, i64* undef store i64 %3, i64* undef
unreachable unreachable
} }
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1 declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
attributes #0 = { inlinehint } attributes #0 = { inlinehint }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
; CHECK-LABEL: wut: ; CHECK-LABEL: wut:
; CHECK: call __multi3@FUNCTION, $2, $0, $pop0, $1, $pop7 ; CHECK: call __multi3@FUNCTION
; CHECK: i64.load $0=, 8($2) ; CHECK: i64.load $0=, 8
define i1 @wut(i64, i64) { define i1 @wut(i64, i64) {
start: start:
%2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1) %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
%3 = extractvalue { i64, i1 } %2, 1 %3 = extractvalue { i64, i1 } %2, 1
ret i1 %3 ret i1 %3
} }

test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll

; RUN: llc < %s -asm-verbose=false | FileCheck %s ; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that function pointer casts that require conversions are not converted ; Test that function pointer casts that require conversions are not converted
; to wrappers. In theory some conversions could be supported, but currently no ; to wrappers. In theory some conversions could be supported, but currently no
; conversions are implemented. ; conversions are implemented.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: test: ; CHECK-LABEL: test:
; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: call has_i64_arg@FUNCTION, $pop[[L0]]{{$}} ; CHECK-NEXT: call has_i64_arg@FUNCTION{{$}}
; CHECK-NEXT: i32.call $push{{[0-9]+}}=, has_i64_ret@FUNCTION{{$}} ; CHECK-NEXT: i32.call has_i64_ret@FUNCTION{{$}}
; CHECK-NEXT: drop ; CHECK-NEXT: drop
; CHECK-NEXT: end_function ; CHECK-NEXT: end_function
; CHECK-NOT: .Lbitcast ; CHECK-NOT: .Lbitcast
declare void @has_i64_arg(i64) declare void @has_i64_arg(i64)
declare i64 @has_i64_ret() declare i64 @has_i64_ret()
define void @test() { define void @test() {
entry: entry:
call void bitcast (void (i64)* @has_i64_arg to void (i32)*)(i32 0) call void bitcast (void (i64)* @has_i64_arg to void (i32)*)(i32 0)
%t = call i32 bitcast (i64 ()* @has_i64_ret to i32 ()*)() %t = call i32 bitcast (i64 ()* @has_i64_ret to i32 ()*)()
ret void ret void
} }

test/CodeGen/WebAssembly/unused-argument.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
; Make sure that argument offsets are correct even if some arguments are unused. ; Make sure that argument offsets are correct even if some arguments are unused.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: unused_first: ; CHECK-LABEL: unused_first:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: return $1{{$}} ; CHECK-NEXT: return
define i32 @unused_first(i32 %x, i32 %y) { define i32 @unused_first(i32 %x, i32 %y) {
ret i32 %y ret i32 %y
} }
; CHECK-LABEL: unused_second: ; CHECK-LABEL: unused_second:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: return $0{{$}} ; CHECK-NEXT: return
define i32 @unused_second(i32 %x, i32 %y) { define i32 @unused_second(i32 %x, i32 %y) {
ret i32 %x ret i32 %x
} }
; CHECK-LABEL: call_something: ; CHECK-LABEL: call_something:
; CHECK-NEXT: {{^}} i32.call $drop=, return_something@FUNCTION{{$}} ; CHECK-NEXT: {{^}} i32.call return_something@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
declare i32 @return_something() declare i32 @return_something()
define void @call_something() { define void @call_something() {
call i32 @return_something() call i32 @return_something()
ret void ret void
} }

test/CodeGen/WebAssembly/userstack.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
declare void @ext_func(i64* %ptr) declare void @ext_func(i64* %ptr)
declare void @ext_func_i32(i32* %ptr) declare void @ext_func_i32(i32* %ptr)
; CHECK-LABEL: alloca32: ; CHECK-LABEL: alloca32:
; Check that there is an extra local for the stack pointer. ; Check that there is an extra local for the stack pointer.
; CHECK: .local i32{{$}} ; CHECK: .local i32{{$}}
define void @alloca32() noredzone { define void @alloca32() noredzone {
; CHECK-NEXT: get_global $push[[L2:.+]]=, __stack_pointer{{$}} ; CHECK-NEXT: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L3:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.sub $push[[L9:.+]]=, $pop[[L2]], $pop[[L3]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L8:.+]]=, [[SP:.+]], $pop[[L9]]{{$}} ; CHECK-NEXT: tee_local [[SP:.+]]{{$}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L8]]{{$}} ; CHECK-NEXT: set_global __stack_pointer{{$}}
%retval = alloca i32 %retval = alloca i32
; CHECK: get_local $push[[L4:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK: i32.const $push[[L0:.+]]=, 0 ; CHECK: i32.const 0
; CHECK: i32.store 12($pop[[L4]]), $pop[[L0]] ; CHECK: i32.store 12
store i32 0, i32* %retval store i32 0, i32* %retval
; CHECK: get_local $push[[L6:.+]]=, [[SP]]{{$}} ; CHECK: get_local [[SP]]{{$}}
; CHECK-NEXT: i32.const $push[[L5:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.add $push[[L7:.+]]=, $pop[[L6]], $pop[[L5]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: set_global __stack_pointer, $pop[[L7]] ; CHECK-NEXT: set_global __stack_pointer
ret void ret void
} }
; CHECK-LABEL: alloca3264: ; CHECK-LABEL: alloca3264:
; CHECK: .local i32{{$}} ; CHECK: .local i32{{$}}
define void @alloca3264() { define void @alloca3264() {
; CHECK: get_global $push[[L3:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L4:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.sub $push[[L6:.+]]=, $pop[[L3]], $pop[[L4]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L5:.+]]=, [[SP:.+]], $pop[[L6]] ; CHECK-NEXT: tee_local [[SP:.+]]
%r1 = alloca i32 %r1 = alloca i32
%r2 = alloca double %r2 = alloca double
store i32 0, i32* %r1 store i32 0, i32* %r1
store double 0.0, double* %r2 store double 0.0, double* %r2
; CHECK-NEXT: i64.const $push[[L1:.+]]=, 0 ; CHECK-NEXT: i64.const 0
; CHECK-NEXT: i64.store 0($pop[[L5]]), $pop[[L1]] ; CHECK-NEXT: i64.store 0
; CHECK-NEXT: get_local $push[[L2:.+]]=, [[SP]]{{$}} ; CHECK-NEXT: get_local [[SP]]{{$}}
; CHECK-NEXT: i32.const $push[[L0:.+]]=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: i32.store 12($pop[[L2]]), $pop[[L0]] ; CHECK-NEXT: i32.store 12
; CHECK-NEXT: return ; CHECK-NEXT: return
ret void ret void
} }
; CHECK-LABEL: allocarray: ; CHECK-LABEL: allocarray:
; CHECK: .local i32{{$}} ; CHECK: .local i32{{$}}
define void @allocarray() { define void @allocarray() {
; CHECK-NEXT: get_global $push[[L4:.+]]=, __stack_pointer{{$}} ; CHECK-NEXT: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L5:.+]]=, 144{{$}} ; CHECK-NEXT: i32.const 144{{$}}
; CHECK-NEXT: i32.sub $push[[L12:.+]]=, $pop[[L4]], $pop[[L5]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L11:.+]]=, 0, $pop[[L12]] ; CHECK-NEXT: tee_local 0
; CHECK-NEXT: set_global __stack_pointer, $pop[[L11]] ; CHECK-NEXT: set_global __stack_pointer
%r = alloca [33 x i32] %r = alloca [33 x i32]
; CHECK: i32.const $push{{.+}}=, 24 ; CHECK: i32.const 24
; CHECK-NEXT: i32.add $push[[L3:.+]]=, $pop{{.+}}, $pop{{.+}} ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.const $push[[L1:.+]]=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.store 0($pop[[L3]]), $pop[[L1]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: get_local $push[[L4:.+]]=, 0{{$}} ; CHECK-NEXT: get_local 0{{$}}
; CHECK-NEXT: i32.const $push[[L10:.+]]=, 1{{$}} ; CHECK-NEXT: i32.const 1{{$}}
; CHECK-NEXT: i32.store 12($pop[[L4]]), $pop[[L10]]{{$}} ; CHECK-NEXT: i32.store 12{{$}}
%p = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 0 %p = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 0
store i32 1, i32* %p store i32 1, i32* %p
%p2 = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 3 %p2 = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 3
store i32 1, i32* %p2 store i32 1, i32* %p2
; CHECK-NEXT: get_local $push[[L2:.+]]=, [[SP]]{{$}} ; CHECK-NEXT: get_local [[SP]]{{$}}
; CHECK-NEXT: i32.const $push[[L7:.+]]=, 144 ; CHECK-NEXT: i32.const 144
; CHECK-NEXT: i32.add $push[[L8:.+]]=, $pop[[L2]], $pop[[L7]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: set_global __stack_pointer, $pop[[L8]] ; CHECK-NEXT: set_global __stack_pointer
ret void ret void
} }
; CHECK-LABEL: non_mem_use ; CHECK-LABEL: non_mem_use
define void @non_mem_use(i8** %addr) { define void @non_mem_use(i8** %addr) {
; CHECK: i32.const $push[[L2:.+]]=, 48 ; CHECK: i32.const 48
; CHECK-NEXT: i32.sub $push[[L12:.+]]=, {{.+}}, $pop[[L2]] ; CHECK-NEXT: i32.sub {{.+}}
; CHECK-NEXT: tee_local $push[[L11:.+]]=, [[SP:.+]], $pop[[L12]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L11]] ; CHECK-NEXT: set_global __stack_pointer
%buf = alloca [27 x i8], align 16 %buf = alloca [27 x i8], align 16
%r = alloca i64 %r = alloca i64
%r2 = alloca i64 %r2 = alloca i64
; %r is at SP+8 ; %r is at SP+8
; CHECK: get_local $push[[L3:.+]]=, [[SP]] ; CHECK: get_local [[SP]]
; CHECK: i32.const $push[[OFF:.+]]=, 8 ; CHECK: i32.const 8
; CHECK-NEXT: i32.add $push[[ARG1:.+]]=, $pop[[L3]], $pop[[OFF]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: call ext_func@FUNCTION, $pop[[ARG1]] ; CHECK-NEXT: call ext_func@FUNCTION
call void @ext_func(i64* %r) call void @ext_func(i64* %r)
; %r2 is at SP+0, no add needed ; %r2 is at SP+0, no add needed
; CHECK: get_local $push[[L4:.+]]=, [[SP]] ; CHECK: get_local [[SP]]
; CHECK-NEXT: call ext_func@FUNCTION, $pop[[L4]] ; CHECK-NEXT: call ext_func@FUNCTION
call void @ext_func(i64* %r2) call void @ext_func(i64* %r2)
; Use as a value, but in a store ; Use as a value, but in a store
; %buf is at SP+16 ; %buf is at SP+16
; CHECK: get_local $push[[L5:.+]]=, [[SP]] ; CHECK: get_local [[SP]]
; CHECK: i32.const $push[[OFF:.+]]=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.add $push[[VAL:.+]]=, $pop[[L5]], $pop[[OFF]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: i32.store 0($pop{{.+}}), $pop[[VAL]] ; CHECK-NEXT: i32.store 0
%gep = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0 %gep = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0
store i8* %gep, i8** %addr store i8* %gep, i8** %addr
ret void ret void
} }
; CHECK-LABEL: allocarray_inbounds: ; CHECK-LABEL: allocarray_inbounds:
; CHECK: .local i32{{$}} ; CHECK: .local i32{{$}}
define void @allocarray_inbounds() { define void @allocarray_inbounds() {
; CHECK: get_global $push[[L3:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L4:.+]]=, 32{{$}} ; CHECK-NEXT: i32.const 32{{$}}
; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L3]], $pop[[L4]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L10:.+]]=, [[SP:.+]], $pop[[L11]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L10]]{{$}} ; CHECK-NEXT: set_global __stack_pointer{{$}}
%r = alloca [5 x i32] %r = alloca [5 x i32]
; CHECK: i32.const $push[[L3:.+]]=, 1 ; CHECK: i32.const 1
; CHECK-DAG: i32.store 24(${{.+}}), $pop[[L3]] ; CHECK-DAG: i32.store 24(${{.+}})
%p = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 0 %p = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 0
store i32 1, i32* %p store i32 1, i32* %p
; This store should have both the GEP and the FI folded into it. ; This store should have both the GEP and the FI folded into it.
; CHECK-DAG: i32.store 12(${{.+}}), $pop ; CHECK-DAG: i32.store 12(${{.+}})
%p2 = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 3 %p2 = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 3
store i32 1, i32* %p2 store i32 1, i32* %p2
call void @ext_func(i64* null); call void @ext_func(i64* null);
; CHECK: call ext_func ; CHECK: call ext_func
; CHECK: i32.const $push[[L5:.+]]=, 32{{$}} ; CHECK: i32.const 32{{$}}
; CHECK-NEXT: i32.add $push[[L7:.+]]=, ${{.+}}, $pop[[L5]] ; CHECK-NEXT: i32.add ${{.+}}
; CHECK-NEXT: set_global __stack_pointer, $pop[[L7]] ; CHECK-NEXT: set_global __stack_pointer
ret void ret void
} }
; CHECK-LABEL: dynamic_alloca: ; CHECK-LABEL: dynamic_alloca:
define void @dynamic_alloca(i32 %alloc) { define void @dynamic_alloca(i32 %alloc) {
; CHECK: get_global $push[[L13:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}} ; CHECK-NEXT: tee_local [[SP:.+]]{{$}}
; Target independent codegen bumps the stack pointer. ; Target independent codegen bumps the stack pointer.
; CHECK: i32.sub ; CHECK: i32.sub
; Check that SP is written back to memory after decrement ; Check that SP is written back to memory after decrement
; CHECK: set_global __stack_pointer, ; CHECK: set_global __stack_pointer,
%r = alloca i32, i32 %alloc %r = alloca i32, i32 %alloc
; Target-independent codegen also calculates the store addr ; Target-independent codegen also calculates the store addr
; CHECK: call ext_func_i32@FUNCTION ; CHECK: call ext_func_i32@FUNCTION
call void @ext_func_i32(i32* %r) call void @ext_func_i32(i32* %r)
; CHECK: set_global __stack_pointer, $pop{{.+}} ; CHECK: set_global __stack_pointer
ret void ret void
} }
; CHECK-LABEL: dynamic_alloca_redzone: ; CHECK-LABEL: dynamic_alloca_redzone:
define void @dynamic_alloca_redzone(i32 %alloc) { define void @dynamic_alloca_redzone(i32 %alloc) {
; CHECK: get_global $push[[L13:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}} ; CHECK-NEXT: tee_local [[SP:.+]]{{$}}
; Target independent codegen bumps the stack pointer ; Target independent codegen bumps the stack pointer
; CHECK: i32.sub ; CHECK: i32.sub
%r = alloca i32, i32 %alloc %r = alloca i32, i32 %alloc
; CHECK-NEXT: tee_local $push[[L8:.+]]=, {{.+}}, $pop ; CHECK-NEXT: tee_local {{.+}}
; CHECK: get_local $push[[L7:.+]]=, 0{{$}} ; CHECK: get_local 0{{$}}
; CHECK-NEXT: i32.const $push[[L6:.+]]=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: i32.store 0($pop[[L7]]), $pop[[L6]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
store i32 0, i32* %r store i32 0, i32* %r
; CHECK-NEXT: return ; CHECK-NEXT: return
ret void ret void
} }
; CHECK-LABEL: dynamic_static_alloca: ; CHECK-LABEL: dynamic_static_alloca:
define void @dynamic_static_alloca(i32 %alloc) noredzone { define void @dynamic_static_alloca(i32 %alloc) noredzone {
; Decrement SP in the prolog by the static amount and writeback to memory. ; Decrement SP in the prolog by the static amount and writeback to memory.
; CHECK: get_global $push[[L11:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: i32.const $push[[L12:.+]]=, 16 ; CHECK-NEXT: i32.const 16
; CHECK-NEXT: i32.sub $push[[L23:.+]]=, $pop[[L11]], $pop[[L12]] ; CHECK-NEXT: i32.sub
; CHECK-NEXT: tee_local $push[[L22:.+]]=, [[SP:.+]], $pop[[L23]] ; CHECK-NEXT: tee_local [[SP:.+]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L22]] ; CHECK-NEXT: set_global __stack_pointer
; Alloc and write to a static alloca ; Alloc and write to a static alloca
; CHECK: get_local $push[[L21:.+]]=, [[SP:.+]] ; CHECK: get_local [[SP:.+]]
; CHECK-NEXT: tee_local $push[[pushedFP:.+]]=, [[FP:.+]], $pop[[L21]] ; CHECK-NEXT: tee_local [[FP:.+]]
; CHECK-NEXT: i32.const $push[[L0:.+]]=, 101 ; CHECK-NEXT: i32.const 101
; CHECK-NEXT: i32.store [[static_offset:.+]]($pop[[pushedFP]]), $pop[[L0]] ; CHECK-NEXT: i32.store [[static_offset:.+]]
%static = alloca i32 %static = alloca i32
store volatile i32 101, i32* %static store volatile i32 101, i32* %static
; Decrement SP in the body by the dynamic amount. ; Decrement SP in the body by the dynamic amount.
; CHECK: i32.sub ; CHECK: i32.sub
; CHECK: tee_local $push[[L16:.+]]=, [[dynamic_local:.+]], $pop{{.+}} ; CHECK: tee_local [[dynamic_local:.+]]
; CHECK: tee_local $push[[L15:.+]]=, [[other:.+]], $pop[[L16]]{{$}} ; CHECK: tee_local [[other:.+]]{{$}}
; CHECK: set_global __stack_pointer, $pop[[L15]]{{$}} ; CHECK: set_global __stack_pointer{{$}}
%dynamic = alloca i32, i32 %alloc %dynamic = alloca i32, i32 %alloc
; Ensure we don't modify the frame pointer after assigning it. ; Ensure we don't modify the frame pointer after assigning it.
; CHECK-NOT: $[[FP]]= ; CHECK-NOT: $[[FP]]=
; Ensure the static address doesn't change after modifying the stack pointer. ; Ensure the static address doesn't change after modifying the stack pointer.
; CHECK: get_local $push[[L17:.+]]=, [[FP]] ; CHECK: get_local [[FP]]
; CHECK: i32.const $push[[L7:.+]]=, 102 ; CHECK: i32.const 102
; CHECK-NEXT: i32.store [[static_offset]]($pop[[L17]]), $pop[[L7]] ; CHECK-NEXT: i32.store [[static_offset]]
; CHECK-NEXT: get_local $push[[L9:.+]]=, [[dynamic_local]]{{$}} ; CHECK-NEXT: get_local [[dynamic_local]]{{$}}
; CHECK-NEXT: i32.const $push[[L8:.+]]=, 103 ; CHECK-NEXT: i32.const 103
; CHECK-NEXT: i32.store 0($pop[[L9]]), $pop[[L8]] ; CHECK-NEXT: i32.store 0
store volatile i32 102, i32* %static store volatile i32 102, i32* %static
store volatile i32 103, i32* %dynamic store volatile i32 103, i32* %dynamic
; Decrement SP in the body by the dynamic amount. ; Decrement SP in the body by the dynamic amount.
; CHECK: i32.sub ; CHECK: i32.sub
; CHECK: tee_local $push{{.+}}=, [[dynamic2_local:.+]], $pop{{.+}} ; CHECK: tee_local [[dynamic2_local:.+]]
%dynamic.2 = alloca i32, i32 %alloc %dynamic.2 = alloca i32, i32 %alloc
; CHECK-NOT: $[[FP]]= ; CHECK-NOT: $[[FP]]=
; Ensure neither the static nor dynamic address changes after the second ; Ensure neither the static nor dynamic address changes after the second
; modification of the stack pointer. ; modification of the stack pointer.
; CHECK: get_local $push[[L22:.+]]=, [[FP]] ; CHECK: get_local [[FP]]
; CHECK: i32.const $push[[L9:.+]]=, 104 ; CHECK: i32.const 104
; CHECK-NEXT: i32.store [[static_offset]]($pop[[L22]]), $pop[[L9]] ; CHECK-NEXT: i32.store [[static_offset]]
; CHECK-NEXT: get_local $push[[L23:.+]]=, [[dynamic_local]] ; CHECK-NEXT: get_local [[dynamic_local]]
; CHECK-NEXT: i32.const $push[[L10:.+]]=, 105 ; CHECK-NEXT: i32.const 105
; CHECK-NEXT: i32.store 0($pop[[L23]]), $pop[[L10]] ; CHECK-NEXT: i32.store 0
; CHECK-NEXT: get_local $push[[L23:.+]]=, [[dynamic2_local]] ; CHECK-NEXT: get_local [[dynamic2_local]]
; CHECK-NEXT: i32.const $push[[L11:.+]]=, 106 ; CHECK-NEXT: i32.const 106
; CHECK-NEXT: i32.store 0($pop[[L23]]), $pop[[L11]] ; CHECK-NEXT: i32.store 0
store volatile i32 104, i32* %static store volatile i32 104, i32* %static
store volatile i32 105, i32* %dynamic store volatile i32 105, i32* %dynamic
store volatile i32 106, i32* %dynamic.2 store volatile i32 106, i32* %dynamic.2
; Writeback to memory. ; Writeback to memory.
; CHECK: get_local $push[[L24:.+]]=, [[FP]]{{$}} ; CHECK: get_local [[FP]]{{$}}
; CHECK: i32.const $push[[L18:.+]]=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.add $push[[L19:.+]]=, $pop[[L24]], $pop[[L18]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: set_global __stack_pointer, $pop[[L19]] ; CHECK-NEXT: set_global __stack_pointer
ret void ret void
} }
declare i8* @llvm.stacksave() declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*) declare void @llvm.stackrestore(i8*)
; CHECK-LABEL: llvm_stack_builtins: ; CHECK-LABEL: llvm_stack_builtins:
define void @llvm_stack_builtins(i32 %alloc) noredzone { define void @llvm_stack_builtins(i32 %alloc) noredzone {
; CHECK: get_global $push[[L11:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L10:.+]]=, {{.+}}, $pop[[L11]] ; CHECK-NEXT: tee_local {{.+}}
; CHECK-NEXT: set_local [[STACK:.+]], $pop[[L10]] ; CHECK-NEXT: set_local [[STACK:.+]]
%stack = call i8* @llvm.stacksave() %stack = call i8* @llvm.stacksave()
; Ensure we don't reassign the stacksave local ; Ensure we don't reassign the stacksave local
; CHECK-NOT: set_local [[STACK]], ; CHECK-NOT: set_local [[STACK]],
%dynamic = alloca i32, i32 %alloc %dynamic = alloca i32, i32 %alloc
; CHECK: get_local $push[[L12:.+]]=, [[STACK]] ; CHECK: get_local [[STACK]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L12]] ; CHECK-NEXT: set_global __stack_pointer
call void @llvm.stackrestore(i8* %stack) call void @llvm.stackrestore(i8* %stack)
ret void ret void
} }
; Not actually using the alloca'd variables exposed an issue with register ; Not actually using the alloca'd variables exposed an issue with register
; stackification, where copying the stack pointer into the frame pointer was ; stackification, where copying the stack pointer into the frame pointer was
; moved after the stack pointer was updated for the dynamic alloca. ; moved after the stack pointer was updated for the dynamic alloca.
; CHECK-LABEL: dynamic_alloca_nouse: ; CHECK-LABEL: dynamic_alloca_nouse:
define void @dynamic_alloca_nouse(i32 %alloc) noredzone { define void @dynamic_alloca_nouse(i32 %alloc) noredzone {
; CHECK: get_global $push[[L11:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L10:.+]]=, {{.+}}, $pop[[L11]] ; CHECK-NEXT: tee_local {{.+}}
; CHECK-NEXT: set_local [[FP:.+]], $pop[[L10]] ; CHECK-NEXT: set_local [[FP:.+]]
%dynamic = alloca i32, i32 %alloc %dynamic = alloca i32, i32 %alloc
; CHECK-NOT: set_local [[FP]], ; CHECK-NOT: set_local [[FP]],
; CHECK: get_local $push[[L12:.+]]=, [[FP]] ; CHECK: get_local [[FP]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L12]] ; CHECK-NEXT: set_global __stack_pointer
ret void ret void
} }
; The use of the alloca in a phi causes a CopyToReg DAG node to be generated, ; The use of the alloca in a phi causes a CopyToReg DAG node to be generated,
; which has to have special handling because CopyToReg can't have a FI operand ; which has to have special handling because CopyToReg can't have a FI operand
; CHECK-LABEL: copytoreg_fi: ; CHECK-LABEL: copytoreg_fi:
define void @copytoreg_fi(i1 %cond, i32* %b) { define void @copytoreg_fi(i1 %cond, i32* %b) {
entry: entry:
; CHECK: i32.const $push[[L1:.+]]=, 16 ; CHECK: i32.const 16
; CHECK-NEXT: i32.sub $push[[L3:.+]]=, {{.+}}, $pop[[L1]] ; CHECK-NEXT: i32.sub {{.+}}
%addr = alloca i32 %addr = alloca i32
; CHECK: i32.const $push[[OFF:.+]]=, 12 ; CHECK: i32.const 12
; CHECK-NEXT: i32.add $push[[ADDR:.+]]=, $pop[[L3]], $pop[[OFF]] ; CHECK-NEXT: i32.add
; CHECK-NEXT: set_local [[COPY:.+]], $pop[[ADDR]] ; CHECK-NEXT: set_local [[COPY:.+]]
br label %body br label %body
body: body:
%a = phi i32* [%addr, %entry], [%b, %body] %a = phi i32* [%addr, %entry], [%b, %body]
store i32 1, i32* %a store i32 1, i32* %a
; CHECK: get_local $push[[L12:.+]]=, [[COPY]] ; CHECK: get_local [[COPY]]
; CHECK: i32.store 0($pop[[L12]]), ; CHECK: i32.store 0,
br i1 %cond, label %body, label %exit br i1 %cond, label %body, label %exit
exit: exit:
ret void ret void
} }
declare void @use_i8_star(i8*) declare void @use_i8_star(i8*)
declare i8* @llvm.frameaddress(i32) declare i8* @llvm.frameaddress(i32)
; Test __builtin_frame_address(0). ; Test __builtin_frame_address(0).
; CHECK-LABEL: frameaddress_0: ; CHECK-LABEL: frameaddress_0:
; CHECK: get_global $push[[L3:.+]]=, __stack_pointer{{$}} ; CHECK: get_global __stack_pointer{{$}}
; CHECK-NEXT: tee_local $push[[L2:.+]]=, [[FP:.+]], $pop[[L3]]{{$}} ; CHECK-NEXT: tee_local [[FP:.+]]{{$}}
; CHECK-NEXT: call use_i8_star@FUNCTION, $pop[[L2]] ; CHECK-NEXT: call use_i8_star@FUNCTION
; CHECK-NEXT: get_local $push[[L5:.+]]=, [[FP]] ; CHECK-NEXT: get_local [[FP]]
; CHECK-NEXT: set_global __stack_pointer, $pop[[L5]] ; CHECK-NEXT: set_global __stack_pointer
define void @frameaddress_0() { define void @frameaddress_0() {
%t = call i8* @llvm.frameaddress(i32 0) %t = call i8* @llvm.frameaddress(i32 0)
call void @use_i8_star(i8* %t) call void @use_i8_star(i8* %t)
ret void ret void
} }
; Test __builtin_frame_address(1). ; Test __builtin_frame_address(1).
; CHECK-LABEL: frameaddress_1: ; CHECK-LABEL: frameaddress_1:
; CHECK-NEXT: i32.const $push0=, 0{{$}} ; CHECK-NEXT: i32.const 0{{$}}
; CHECK-NEXT: call use_i8_star@FUNCTION, $pop0{{$}} ; CHECK-NEXT: call use_i8_star@FUNCTION{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @frameaddress_1() { define void @frameaddress_1() {
%t = call i8* @llvm.frameaddress(i32 1) %t = call i8* @llvm.frameaddress(i32 1)
call void @use_i8_star(i8* %t) call void @use_i8_star(i8* %t)
ret void ret void
} }
; Test a stack address passed to an inline asm. ; Test a stack address passed to an inline asm.
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test/CodeGen/WebAssembly/varargs.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s
; Test varargs constructs. ; Test varargs constructs.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; Test va_start. ; Test va_start.
; TODO: Test va_start. ; TODO: Test va_start.
; CHECK-LABEL: start: ; CHECK-LABEL: start:
; CHECK-NEXT: .param i32, i32 ; CHECK-NEXT: .param i32, i32
; CHECK-NOT: __stack_pointer ; CHECK-NOT: __stack_pointer
define void @start(i8** %ap, ...) { define void @start(i8** %ap, ...) {
entry: entry:
%0 = bitcast i8** %ap to i8* %0 = bitcast i8** %ap to i8*
; Store the second argument (the hidden vararg buffer pointer) into ap ; Store the second argument (the hidden vararg buffer pointer) into ap
; CHECK: i32.store 0($0), $1 ; CHECK: i32.store 0
call void @llvm.va_start(i8* %0) call void @llvm.va_start(i8* %0)
ret void ret void
} }
; Test va_end. ; Test va_end.
; CHECK-LABEL: end: ; CHECK-LABEL: end:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @end(i8** %ap) { define void @end(i8** %ap) {
entry: entry:
%0 = bitcast i8** %ap to i8* %0 = bitcast i8** %ap to i8*
call void @llvm.va_end(i8* %0) call void @llvm.va_end(i8* %0)
ret void ret void
} }
; Test va_copy. ; Test va_copy.
; CHECK-LABEL: copy: ; CHECK-LABEL: copy:
; CHECK-NEXT: .param i32, i32{{$}} ; CHECK-NEXT: .param i32, i32{{$}}
; CHECK-NEXT: i32.load $push0=, 0($1){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: i32.store 0($0), $pop0{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @copy(i8** %ap, i8** %bp) { define void @copy(i8** %ap, i8** %bp) {
entry: entry:
%0 = bitcast i8** %ap to i8* %0 = bitcast i8** %ap to i8*
%1 = bitcast i8** %bp to i8* %1 = bitcast i8** %bp to i8*
call void @llvm.va_copy(i8* %0, i8* %1) call void @llvm.va_copy(i8* %0, i8* %1)
ret void ret void
} }
; Test va_arg with an i8 argument. ; Test va_arg with an i8 argument.
; CHECK-LABEL: arg_i8: ; CHECK-LABEL: arg_i8:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: tee_local $push[[NUM1:[0-9]+]]=, $1=, $pop[[NUM0]]{{$}} ; CHECK-NEXT: tee_local $1={{$}}
; CHECK-NEXT: i32.const $push[[NUM2:[0-9]+]]=, 4{{$}} ; CHECK-NEXT: i32.const 4{{$}}
; CHECK-NEXT: i32.add $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($0), $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: i32.load $push[[NUM4:[0-9]+]]=, 0($1){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM4]]{{$}} ; CHECK-NEXT: return{{$}}
define i8 @arg_i8(i8** %ap) { define i8 @arg_i8(i8** %ap) {
entry: entry:
%t = va_arg i8** %ap, i8 %t = va_arg i8** %ap, i8
ret i8 %t ret i8 %t
} }
; Test va_arg with an i32 argument. ; Test va_arg with an i32 argument.
; CHECK-LABEL: arg_i32: ; CHECK-LABEL: arg_i32:
; CHECK-NEXT: .param i32{{$}} ; CHECK-NEXT: .param i32{{$}}
; CHECK-NEXT: .result i32{{$}} ; CHECK-NEXT: .result i32{{$}}
; CHECK-NEXT: i32.load $push[[NUM0:[0-9]+]]=, 0($0){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 3{{$}} ; CHECK-NEXT: i32.const 3{{$}}
; CHECK-NEXT: i32.add $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.const $push[[NUM3:[0-9]+]]=, -4{{$}} ; CHECK-NEXT: i32.const -4{{$}}
; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM2]], $pop[[NUM3]]{{$}} ; CHECK-NEXT: i32.and{{$}}
; CHECK-NEXT: tee_local $push[[NUM5:[0-9]+]]=, $1=, $pop[[NUM4]]{{$}} ; CHECK-NEXT: tee_local $1={{$}}
; CHECK-NEXT: i32.const $push[[NUM6:[0-9]+]]=, 4{{$}} ; CHECK-NEXT: i32.const 4{{$}}
; CHECK-NEXT: i32.add $push[[NUM7:[0-9]+]]=, $pop[[NUM5]], $pop[[NUM6]]{{$}} ; CHECK-NEXT: i32.add {{$}}
; CHECK-NEXT: i32.store 0($0), $pop[[NUM7]]{{$}} ; CHECK-NEXT: i32.store 0{{$}}
; CHECK-NEXT: i32.load $push[[NUM8:[0-9]+]]=, 0($1){{$}} ; CHECK-NEXT: i32.load 0{{$}}
; CHECK-NEXT: return $pop[[NUM8]]{{$}} ; CHECK-NEXT: return{{$}}
define i32 @arg_i32(i8** %ap) { define i32 @arg_i32(i8** %ap) {
entry: entry:
%t = va_arg i8** %ap, i32 %t = va_arg i8** %ap, i32
ret i32 %t ret i32 %t
} }
; Test va_arg with an i128 argument. ; Test va_arg with an i128 argument.
Show All 9 Linesentry:
ret i128 %t ret i128 %t
} }
; Test a varargs call with no actual arguments. ; Test a varargs call with no actual arguments.
declare void @callee(...) declare void @callee(...)
; CHECK-LABEL: caller_none: ; CHECK-LABEL: caller_none:
; CHECK-NEXT: i32.const $push0=, 0 ; CHECK-NEXT: i32.const 0
; CHECK-NEXT: call callee@FUNCTION, $pop0 ; CHECK-NEXT: call callee@FUNCTION
; CHECK-NEXT: return{{$}} ; CHECK-NEXT: return{{$}}
define void @caller_none() { define void @caller_none() {
call void (...) @callee() call void (...) @callee()
ret void ret void
} }
; Test a varargs call with some actual arguments. ; Test a varargs call with some actual arguments.
; Note that the store of 2.0 is converted to an i64 store; this optimization ; Note that the store of 2.0 is converted to an i64 store; this optimization
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define void @startbb(i1 %cond, i8** %ap, ...) { define void @startbb(i1 %cond, i8** %ap, ...) {
entry: entry:
br i1 %cond, label %bb0, label %bb1 br i1 %cond, label %bb0, label %bb1
bb0: bb0:
ret void ret void
bb1: bb1:
%0 = bitcast i8** %ap to i8* %0 = bitcast i8** %ap to i8*
; Store the second argument (the hidden vararg buffer pointer) into ap ; Store the second argument (the hidden vararg buffer pointer) into ap
; CHECK: i32.store 0($1), $2 ; CHECK: i32.store 0
call void @llvm.va_start(i8* %0) call void @llvm.va_start(i8* %0)
ret void ret void
} }
; Test a call to a varargs function with a non-legal fixed argument. ; Test a call to a varargs function with a non-legal fixed argument.
declare void @callee_with_nonlegal_fixed(fp128, ...) nounwind declare void @callee_with_nonlegal_fixed(fp128, ...) nounwind
; CHECK-LABEL: call_nonlegal_fixed: ; CHECK-LABEL: call_nonlegal_fixed:
; CHECK: i64.const $push[[L0:[0-9]+]]=, 0 ; CHECK: i64.const 0
; CHECK: i64.const $push[[L1:[0-9]+]]=, 0 ; CHECK: i64.const 0
; CHECK: i32.const $push[[L2:[0-9]+]]=, 0 ; CHECK: i32.const 0
; CHECK: call callee_with_nonlegal_fixed@FUNCTION, $pop[[L0]], $pop[[L1]], $pop[[L2]]{{$}} ; CHECK: call callee_with_nonlegal_fixed@FUNCTION{{$}}
define void @call_nonlegal_fixed() nounwind { define void @call_nonlegal_fixed() nounwind {
call void (fp128, ...) @callee_with_nonlegal_fixed(fp128 0xL00000000000000000000000000000000) call void (fp128, ...) @callee_with_nonlegal_fixed(fp128 0xL00000000000000000000000000000000)
ret void ret void
} }
; Test a definition a varargs function with a non-legal fixed argument. ; Test a definition a varargs function with a non-legal fixed argument.
; CHECK-LABEL: nonlegal_fixed: ; CHECK-LABEL: nonlegal_fixed:
; CHECK-NEXT: .param i64, i64, i32{{$}} ; CHECK-NEXT: .param i64, i64, i32{{$}}
define void @nonlegal_fixed(fp128 %x, ...) nounwind { define void @nonlegal_fixed(fp128 %x, ...) nounwind {
ret void ret void
} }
declare void @llvm.va_start(i8*) declare void @llvm.va_start(i8*)
declare void @llvm.va_end(i8*) declare void @llvm.va_end(i8*)
declare void @llvm.va_copy(i8*, i8*) declare void @llvm.va_copy(i8*, i8*)

test/CodeGen/WebAssembly/vtable.ll

; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s --check-prefix=TYPEINFONAME ; RUN: llc < %s -asm-verbose=false | FileCheck %s --check-prefix=TYPEINFONAME
; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s --check-prefix=VTABLE ; RUN: llc < %s -asm-verbose=false | FileCheck %s --check-prefix=VTABLE
; RUN: llc < %s -asm-verbose=false -disable-wasm-explicit-locals | FileCheck %s --check-prefix=TYPEINFO ; RUN: llc < %s -asm-verbose=false | FileCheck %s --check-prefix=TYPEINFO
; Test that simple vtables assemble as expected. ; Test that simple vtables assemble as expected.
; ;
; The class hierarchy is: ; The class hierarchy is:
; struct A; ; struct A;
; struct B : public A; ; struct B : public A;
; struct C : public A; ; struct C : public A;
; struct D : public B; ; struct D : public B;
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test/MC/WebAssembly/basic-assembly.s

# RUN: llvm-mc -triple=wasm32-unknown-unknown-elf < %s | FileCheck %s
# RUN: llvm-mc -triple=wasm32-unknown-unknown < %s | FileCheck %s # RUN: llvm-mc -triple=wasm32-unknown-unknown < %s | FileCheck %s
.text .text
.type test0,@function .type test0,@function
test0: test0:
# Test all types: # Test all types:
.param i32, i64 .param i32, i64
.local f32, f64 #, i8x16, i16x8, i32x4, f32x4 .local f32, f64 #, i8x16, i16x8, i32x4, f32x4
# Explicit getlocal/setlocal: # Explicit getlocal/setlocal:
get_local $push0=, 2 get_local 2
set_local 2, $pop0= set_local 2
# Implicit locals & immediates: # Immediates:
i32.const $0=, -1 i32.const -1
f64.const $3=, 0x1.999999999999ap1 f64.const 0x1.999999999999ap1
# Indirect addressing: # Indirect addressing:
get_local $push1=, 0 get_local 0
f64.store 0($pop1), $3 f64.store 0
# Loops, conditionals, binary ops, calls etc: # Loops, conditionals, binary ops, calls etc:
block block
i32.const $push2=, 1 i32.const 1
get_local $push7=, 0 get_local 0
i32.ge_s $push0=, $pop2, $pop7 i32.ge_s
br_if 0, $pop0 # 0: down to label0 br_if 0 # 0: down to label0
.LBB0_1: .LBB0_1:
loop # label1: loop # label1:
call $drop=, something1@FUNCTION call something1@FUNCTION
i64.const $push10=, 1234 i64.const 1234
i32.call $push8=, something2@FUNCTION, $pop10 i32.call something2@FUNCTION
i32.const $push11=, 0 i32.const 0
call_indirect $pop11 call_indirect
i32.const $push5=, 1 i32.const 1
i32.add $push4=, $pop8, $pop5 i32.add
tee_local $push3=, 0, $pop4 tee_local 0
get_local $push9=, 0 get_local 0
i32.lt_s $push1=, $pop3, $pop9 i32.lt_s
br_if 0, $pop1 # 0: up to label1 br_if 0 # 0: up to label1
.LBB0_2: .LBB0_2:
end_loop end_loop
end_block # label0: end_block # label0:
end_function end_function
# CHECK: .text # CHECK: .text
# CHECK-LABEL: test0: # CHECK-LABEL: test0:
# CHECK-NEXT: .param i32, i64 # CHECK-NEXT: .param i32, i64
# CHECK-NEXT: .local f32, f64 # CHECK-NEXT: .local f32, f64
# CHECK-NEXT: get_local $push0=, 2 # CHECK-NEXT: get_local 2
# CHECK-NEXT: set_local 2, $pop0 # CHECK-NEXT: set_local 2
# CHECK-NEXT: i32.const $0=, -1 # CHECK-NEXT: i32.const -1
# CHECK-NEXT: f64.const $3=, 0x1.999999999999ap1 # CHECK-NEXT: f64.const 0x1.999999999999ap1
# CHECK-NEXT: get_local $push1=, 0 # CHECK-NEXT: get_local 0
# CHECK-NEXT: f64.store 0($pop1):p2align=0, $3 # CHECK-NEXT: f64.store 0, :p2align=0
# CHECK-NEXT: block # CHECK-NEXT: block
# CHECK-NEXT: i32.const $push2=, 1 # CHECK-NEXT: i32.const 1
# CHECK-NEXT: get_local $push7=, 0 # CHECK-NEXT: get_local 0
# CHECK-NEXT: i32.ge_s $push0=, $pop2, $pop7 # CHECK-NEXT: i32.ge_s
# CHECK-NEXT: br_if 0, $pop0 # 0: down to label0 # CHECK-NEXT: br_if 0 # 0: down to label0
# CHECK-NEXT: .LBB0_1: # CHECK-NEXT: .LBB0_1:
# CHECK-NEXT: loop # label1: # CHECK-NEXT: loop # label1:
# CHECK-NEXT: call something1@FUNCTION # CHECK-NEXT: call something1@FUNCTION
# CHECK-NEXT: i64.const $push10=, 1234 # CHECK-NEXT: i64.const 1234
# CHECK-NEXT: i32.call $push8=, something2@FUNCTION # CHECK-NEXT: i32.call something2@FUNCTION
# CHECK-NEXT: i32.const $push11=, 0 # CHECK-NEXT: i32.const 0
# CHECK-NEXT: call_indirect # CHECK-NEXT: call_indirect
# CHECK-NEXT: i32.const $push5=, 1 # CHECK-NEXT: i32.const 1
# CHECK-NEXT: i32.add $push4=, $pop8, $pop5 # CHECK-NEXT: i32.add
# CHECK-NEXT: tee_local $push3=, 0, $pop4 # CHECK-NEXT: tee_local 0
# CHECK-NEXT: get_local $push9=, 0 # CHECK-NEXT: get_local 0
# CHECK-NEXT: i32.lt_s $push1=, $pop3, $pop9 # CHECK-NEXT: i32.lt_s
# CHECK-NEXT: br_if 0, $pop1 # 0: up to label1 # CHECK-NEXT: br_if 0 # 0: up to label1
# CHECK-NEXT: .LBB0_2: # CHECK-NEXT: .LBB0_2:
# CHECK-NEXT: end_loop # CHECK-NEXT: end_loop
# CHECK-NEXT: end_block # label0: # CHECK-NEXT: end_block # label0:
# CHECK-NEXT: end_function # CHECK-NEXT: end_function