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[Power9] Ensure float128 in non-homogenous aggregates are passed via VSX registers
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Authored by lei on Jun 18 2018, 8:08 PM.

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Summary

Non-homogenous aggregates are passed in consecutive GPRs, in GPRs and in memory, or in memory. This patch ensures that float128 members of non-homogenous aggregates are passed via VSX registers.

This is done via custom lowering a bitcast of a build_pari(i64,i64) to float128 to a new PPCISD node, BUILD_FP128.

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Event Timeline

lei created this revision.Jun 18 2018, 8:08 PM
lei retitled this revision from [POWER9] Ensure float128 in non-homogenous aggregates are passed via VSX registers to [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX registers.Jun 19 2018, 6:08 AM
nemanjai accepted this revision.Jul 3 2018, 12:18 PM

Other than a few cosmetic changes, LGTM.

lib/Target/PowerPC/PPCISelLowering.cpp
7662

A bitcast produces a single result, why getValueType(0) vs. just getValueType()?

7668

There are 3 more uses of this for the if statement above, why not define it up there and use it in the condition as well?

7669

No need for this temp. Just return the result of getNode().

This revision is now accepted and ready to land.Jul 3 2018, 12:18 PM
lei marked 2 inline comments as done.Jul 4 2018, 10:54 PM
lei added inline comments.
lib/Target/PowerPC/PPCISelLowering.cpp
7662

Op.getValueType() == Op->getValueType(0).
I can update to use Op.getValueType()

This revision was automatically updated to reflect the committed changes.
nemanjai added inline comments.Jul 5 2018, 2:47 AM
lib/Target/PowerPC/PPCISelLowering.cpp
7662

Correct, the two are equivalent. But the former calls a member function of SDValue directly while the latter calls operator->() and calls a member function of the containing SDNode.