This is an archive of the discontinued LLVM Phabricator instance.

Differential D47985

[CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select (PR33744)
ClosedPublic

Authored by RKSimon on Jun 9 2018, 11:48 AM.

Details

Reviewers
efriedma
delena
craig.topper
ABataev
dtemirbulatov
mkuper
spatel
javed.absar
Commits
rGe39fa6cbbb36: [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select…
rL334513: [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select…
Summary

As discussed on PR33744, this patch replaces ShuffleKind::SK_Alternate which requires shuffle masks to only match an alternating pattern from its 2 sources:

e.g. v4f32: <0,5,2,7> or <4,1,6,3>

This seems far too restrictive as most SIMD hardware which will implement it using a general blend/bit-select instruction (permitting elements from either source as long as they are inline):

e.g. v4f32: <0,5,2,7>, <4,1,6,3>, <0,1,6,7>, <4,1,2,3> etc.

This initial patch just updates the name and cost model shuffle mask analysis, later patch reviews will update SLP to better utilise this - it still limits itself to SK_Alternate patterns.

It also raised an interesting issue in that Identity shuffles are being matched by analysis to a mixture of SK_PermuteSingleSrc/SK_Alternate - shouldn't we just return cost = 0 for these cases?

Diff Detail

Repository
rL LLVM

Event Timeline

RKSimon created this revision.Jun 9 2018, 11:48 AM
Herald added a reviewer: javed.absar. · View Herald TranscriptJun 9 2018, 11:48 AM
RKSimon mentioned this in D47986: [CostModel] Treat Identity shuffle masks as zero cost.Jun 9 2018, 1:36 PM
RKSimon mentioned this in D48008: [SLPVectorizer] Remove default OperandValueKind arguments from getArithmeticInstrCost calls (NFC).Jun 11 2018, 4:21 AM
RKSimon mentioned this in D48023: [SLPVectorizer] Tidyup isShuffle helper.Jun 11 2018, 6:39 AM
RKSimon mentioned this in rL334506: [CostModel] Treat Identity shuffle masks as zero cost.Jun 12 2018, 7:51 AM
RKSimon updated this revision to Diff 150946.Jun 12 2018, 8:13 AM

rebase

spatel accepted this revision.Jun 12 2018, 8:38 AM

LGTM.

include/llvm/Analysis/TargetTransformInfo.h
644 ↗(On Diff #150946)

A bit more description would be good here. Something like:
Selects elements from the corresponding lane of one source operand or the other. This is equivalent to a vector select with a constant condition operand.

lib/Analysis/TargetTransformInfo.cpp
678 ↗(On Diff #150946)

Formatting: IsSelect.

This revision is now accepted and ready to land.Jun 12 2018, 8:38 AM
Closed by commit rL334513: [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select… (authored by RKSimon). · Explain WhyJun 12 2018, 9:17 AM
This revision was automatically updated to reflect the committed changes.
RKSimon mentioned this in D48174: [SLPVectorizer] Relax "alternate" opcode vectorisation to work with any SK_Select shuffle pattern.Jun 14 2018, 9:01 AM
RKSimon mentioned this in rL335045: [SLPVectorizer] Remove default OperandValueKind arguments from….Jun 19 2018, 6:44 AM
RKSimon mentioned this in rL335130: [SLPVectorizer] Relax "alternate" opcode vectorisation to work with any….Jun 20 2018, 7:31 AM

Revision Contents

PathSize
llvm/
trunk/
include/
llvm/
Analysis/
4 lines
CodeGen/
2 lines
lib/
Analysis/
34 lines
Target/
ARM/
12 lines
X86/
48 lines
Transforms/
Vectorize/
5 lines
test/
Analysis/
CostModel/
X86/
236 lines

Diff 150963

llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h

Show First 20 Lines • Show All 635 Lines • ▼ Show 20 Linespublic:
/// \name Vector Target Information /// \name Vector Target Information
/// @{ /// @{
/// The various kinds of shuffle patterns for vector queries. /// The various kinds of shuffle patterns for vector queries.
enum ShuffleKind { enum ShuffleKind {
SK_Broadcast, ///< Broadcast element 0 to all other elements. SK_Broadcast, ///< Broadcast element 0 to all other elements.
SK_Reverse, ///< Reverse the order of the vector. SK_Reverse, ///< Reverse the order of the vector.
SK_Alternate, ///< Choose alternate elements from vector. SK_Select, ///< Selects elements from the corresponding lane of
///< either source operand. This is equivalent to a
///< vector select with a constant condition operand.
SK_Transpose, ///< Transpose two vectors. SK_Transpose, ///< Transpose two vectors.
SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset. SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset.
SK_ExtractSubvector,///< ExtractSubvector Index indicates start offset. SK_ExtractSubvector,///< ExtractSubvector Index indicates start offset.
SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one
///< with any shuffle mask. ///< with any shuffle mask.
SK_PermuteSingleSrc ///< Shuffle elements of single source vector with any SK_PermuteSingleSrc ///< Shuffle elements of single source vector with any
///< shuffle mask. ///< shuffle mask.
}; };
▲ Show 20 Lines • Show All 1,020 Lines • Show Last 20 Lines

llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h

Show First 20 Lines • Show All 548 Lines • ▼ Show 20 Lines unsigned getArithmeticInstrCost(
// We don't know anything about this scalar instruction. // We don't know anything about this scalar instruction.
return OpCost; return OpCost;
} }
unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
Type *SubTp) { Type *SubTp) {
switch (Kind) { switch (Kind) {
case TTI::SK_Alternate: case TTI::SK_Select:
case TTI::SK_Transpose: case TTI::SK_Transpose:
case TTI::SK_PermuteSingleSrc: case TTI::SK_PermuteSingleSrc:
case TTI::SK_PermuteTwoSrc: case TTI::SK_PermuteTwoSrc:
return getPermuteShuffleOverhead(Tp); return getPermuteShuffleOverhead(Tp);
default: default:
return 1; return 1;
} }
} }
▲ Show 20 Lines • Show All 822 Lines • Show Last 20 Lines

llvm/trunk/lib/Analysis/TargetTransformInfo.cpp

Show First 20 Lines • Show All 668 Lines • ▼ Show 20 Lines for (unsigned i = 0; i < MaskSize && (IdentityLHS || IdentityRHS); ++i) {
if (Mask[i] < 0) if (Mask[i] < 0)
continue; continue;
IdentityLHS &= (Mask[i] == (int)i); IdentityLHS &= (Mask[i] == (int)i);
IdentityRHS &= (Mask[i] == (int)(i + MaskSize)); IdentityRHS &= (Mask[i] == (int)(i + MaskSize));
} }
return IdentityLHS || IdentityRHS; return IdentityLHS || IdentityRHS;
} }
static bool isAlternateVectorMask(ArrayRef<int> Mask) { static bool isSelectVectorMask(ArrayRef<int> Mask) {
bool isAlternate = true; bool IsSelect = true;
bool FoundLHS = false;
bool FoundRHS = false;
unsigned MaskSize = Mask.size(); unsigned MaskSize = Mask.size();
// Example: shufflevector A, B, <0,5,2,7> // Example: shufflevector A, B, <0,1,6,3>
for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
if (Mask[i] < 0)
continue;
isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i);
}
if (isAlternate)
return true;
isAlternate = true;
// Example: shufflevector A, B, <4,1,6,3> // Example: shufflevector A, B, <4,1,6,3>
for (unsigned i = 0; i < MaskSize && isAlternate; ++i) { for (unsigned i = 0; i < MaskSize && IsSelect; ++i) {
if (Mask[i] < 0) if (Mask[i] < 0)
continue; continue;
isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i); bool IsLHS = (Mask[i] == (int)i);
bool IsRHS = (Mask[i] == (int)(i + MaskSize));
FoundLHS |= IsLHS;
FoundRHS |= IsRHS;
IsSelect = IsLHS || IsRHS;
} }
// If we don't use both vectors this is really an Identity mask.
return isAlternate; return IsSelect && FoundLHS && FoundRHS;
} }
static bool isTransposeVectorMask(ArrayRef<int> Mask) { static bool isTransposeVectorMask(ArrayRef<int> Mask) {
// Transpose vector masks transpose a 2xn matrix. They read corresponding // Transpose vector masks transpose a 2xn matrix. They read corresponding
// even- or odd-numbered vector elements from two n-dimensional source // even- or odd-numbered vector elements from two n-dimensional source
// vectors and write each result into consecutive elements of an // vectors and write each result into consecutive elements of an
// n-dimensional destination vector. Two shuffles are necessary to complete // n-dimensional destination vector. Two shuffles are necessary to complete
// the transpose, one for the even elements and another for the odd elements. // the transpose, one for the even elements and another for the odd elements.
▲ Show 20 Lines • Show All 523 Lines • ▼ Show 20 Lines case Instruction::ShuffleVector: {
if (NumVecElems == Mask.size()) { if (NumVecElems == Mask.size()) {
if (isIdentityVectorMask(Mask)) if (isIdentityVectorMask(Mask))
return 0; return 0;
if (isReverseVectorMask(Mask)) if (isReverseVectorMask(Mask))
return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Reverse, return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Reverse,
VecTypOp0, 0, nullptr); VecTypOp0, 0, nullptr);
if (isAlternateVectorMask(Mask)) if (isSelectVectorMask(Mask))
return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Alternate, return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Select,
VecTypOp0, 0, nullptr); VecTypOp0, 0, nullptr);
if (isTransposeVectorMask(Mask)) if (isTransposeVectorMask(Mask))
return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Transpose, return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Transpose,
VecTypOp0, 0, nullptr); VecTypOp0, 0, nullptr);
if (isZeroEltBroadcastVectorMask(Mask)) if (isZeroEltBroadcastVectorMask(Mask))
return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Broadcast, return TTIImpl->getShuffleCost(TargetTransformInfo::SK_Broadcast,
▲ Show 20 Lines • Show All 79 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp

Show First 20 Lines • Show All 394 Lines • ▼ Show 20 Linesint ARMTTIImpl::getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
// In many cases the address computation is not merged into the instruction // In many cases the address computation is not merged into the instruction
// addressing mode. // addressing mode.
return 1; return 1;
} }
int ARMTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, int ARMTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
Type *SubTp) { Type *SubTp) {
// We only handle costs of reverse and alternate shuffles for now. // We only handle costs of reverse and select shuffles for now.
if (Kind != TTI::SK_Reverse && Kind != TTI::SK_Alternate) if (Kind != TTI::SK_Reverse && Kind != TTI::SK_Select)
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp); return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
if (Kind == TTI::SK_Reverse) { if (Kind == TTI::SK_Reverse) {
static const CostTblEntry NEONShuffleTbl[] = { static const CostTblEntry NEONShuffleTbl[] = {
// Reverse shuffle cost one instruction if we are shuffling within a // Reverse shuffle cost one instruction if we are shuffling within a
// double word (vrev) or two if we shuffle a quad word (vrev, vext). // double word (vrev) or two if we shuffle a quad word (vrev, vext).
{ISD::VECTOR_SHUFFLE, MVT::v2i32, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
{ISD::VECTOR_SHUFFLE, MVT::v4i32, 2}, {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
{ISD::VECTOR_SHUFFLE, MVT::v4f32, 2}, {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2},
{ISD::VECTOR_SHUFFLE, MVT::v8i16, 2}, {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2},
{ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}}; {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}};
std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp); std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp);
if (const auto *Entry = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, if (const auto *Entry = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE,
LT.second)) LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp); return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
} }
if (Kind == TTI::SK_Alternate) { if (Kind == TTI::SK_Select) {
static const CostTblEntry NEONAltShuffleTbl[] = { static const CostTblEntry NEONSelShuffleTbl[] = {
// Alt shuffle cost table for ARM. Cost is the number of instructions // Select shuffle cost table for ARM. Cost is the number of instructions
// required to create the shuffled vector. // required to create the shuffled vector.
{ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
{ISD::VECTOR_SHUFFLE, MVT::v2i32, 1}, {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
{ISD::VECTOR_SHUFFLE, MVT::v4i32, 2}, {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
{ISD::VECTOR_SHUFFLE, MVT::v4f32, 2}, {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2},
{ISD::VECTOR_SHUFFLE, MVT::v4i16, 2}, {ISD::VECTOR_SHUFFLE, MVT::v4i16, 2},
{ISD::VECTOR_SHUFFLE, MVT::v8i16, 16}, {ISD::VECTOR_SHUFFLE, MVT::v8i16, 16},
{ISD::VECTOR_SHUFFLE, MVT::v16i8, 32}}; {ISD::VECTOR_SHUFFLE, MVT::v16i8, 32}};
std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp); std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp);
if (const auto *Entry = CostTableLookup(NEONAltShuffleTbl, if (const auto *Entry = CostTableLookup(NEONSelShuffleTbl,
ISD::VECTOR_SHUFFLE, LT.second)) ISD::VECTOR_SHUFFLE, LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp); return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
} }
return BaseT::getShuffleCost(Kind, Tp, Index, SubTp); return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
} }
int ARMTTIImpl::getArithmeticInstrCost( int ARMTTIImpl::getArithmeticInstrCost(
▲ Show 20 Lines • Show All 174 Lines • Show Last 20 Lines

llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp

Show First 20 Lines • Show All 906 Lines • ▼ Show 20 Lines static const CostTblEntry AVX2ShuffleTbl[] = {
{ TTI::SK_Reverse, MVT::v4f64, 1 }, // vpermpd { TTI::SK_Reverse, MVT::v4f64, 1 }, // vpermpd
{ TTI::SK_Reverse, MVT::v8f32, 1 }, // vpermps { TTI::SK_Reverse, MVT::v8f32, 1 }, // vpermps
{ TTI::SK_Reverse, MVT::v4i64, 1 }, // vpermq { TTI::SK_Reverse, MVT::v4i64, 1 }, // vpermq
{ TTI::SK_Reverse, MVT::v8i32, 1 }, // vpermd { TTI::SK_Reverse, MVT::v8i32, 1 }, // vpermd
{ TTI::SK_Reverse, MVT::v16i16, 2 }, // vperm2i128 + pshufb { TTI::SK_Reverse, MVT::v16i16, 2 }, // vperm2i128 + pshufb
{ TTI::SK_Reverse, MVT::v32i8, 2 }, // vperm2i128 + pshufb { TTI::SK_Reverse, MVT::v32i8, 2 }, // vperm2i128 + pshufb
{ TTI::SK_Alternate, MVT::v16i16, 1 }, // vpblendw { TTI::SK_Select, MVT::v16i16, 1 }, // vpblendvb
{ TTI::SK_Alternate, MVT::v32i8, 1 }, // vpblendvb { TTI::SK_Select, MVT::v32i8, 1 }, // vpblendvb
{ TTI::SK_PermuteSingleSrc, MVT::v4f64, 1 }, // vpermpd { TTI::SK_PermuteSingleSrc, MVT::v4f64, 1 }, // vpermpd
{ TTI::SK_PermuteSingleSrc, MVT::v8f32, 1 }, // vpermps { TTI::SK_PermuteSingleSrc, MVT::v8f32, 1 }, // vpermps
{ TTI::SK_PermuteSingleSrc, MVT::v4i64, 1 }, // vpermq { TTI::SK_PermuteSingleSrc, MVT::v4i64, 1 }, // vpermq
{ TTI::SK_PermuteSingleSrc, MVT::v8i32, 1 }, // vpermd { TTI::SK_PermuteSingleSrc, MVT::v8i32, 1 }, // vpermd
{ TTI::SK_PermuteSingleSrc, MVT::v16i16, 4 }, // vperm2i128 + 2*vpshufb { TTI::SK_PermuteSingleSrc, MVT::v16i16, 4 }, // vperm2i128 + 2*vpshufb
// + vpblendvb // + vpblendvb
{ TTI::SK_PermuteSingleSrc, MVT::v32i8, 4 }, // vperm2i128 + 2*vpshufb { TTI::SK_PermuteSingleSrc, MVT::v32i8, 4 }, // vperm2i128 + 2*vpshufb
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines static const CostTblEntry AVX1ShuffleTbl[] = {
{ TTI::SK_Reverse, MVT::v8f32, 2 }, // vperm2f128 + vpermilps { TTI::SK_Reverse, MVT::v8f32, 2 }, // vperm2f128 + vpermilps
{ TTI::SK_Reverse, MVT::v4i64, 2 }, // vperm2f128 + vpermilpd { TTI::SK_Reverse, MVT::v4i64, 2 }, // vperm2f128 + vpermilpd
{ TTI::SK_Reverse, MVT::v8i32, 2 }, // vperm2f128 + vpermilps { TTI::SK_Reverse, MVT::v8i32, 2 }, // vperm2f128 + vpermilps
{ TTI::SK_Reverse, MVT::v16i16, 4 }, // vextractf128 + 2*pshufb { TTI::SK_Reverse, MVT::v16i16, 4 }, // vextractf128 + 2*pshufb
// + vinsertf128 // + vinsertf128
{ TTI::SK_Reverse, MVT::v32i8, 4 }, // vextractf128 + 2*pshufb { TTI::SK_Reverse, MVT::v32i8, 4 }, // vextractf128 + 2*pshufb
// + vinsertf128 // + vinsertf128
{ TTI::SK_Alternate, MVT::v4i64, 1 }, // vblendpd { TTI::SK_Select, MVT::v4i64, 1 }, // vblendpd
{ TTI::SK_Alternate, MVT::v4f64, 1 }, // vblendpd { TTI::SK_Select, MVT::v4f64, 1 }, // vblendpd
{ TTI::SK_Alternate, MVT::v8i32, 1 }, // vblendps { TTI::SK_Select, MVT::v8i32, 1 }, // vblendps
{ TTI::SK_Alternate, MVT::v8f32, 1 }, // vblendps { TTI::SK_Select, MVT::v8f32, 1 }, // vblendps
{ TTI::SK_Alternate, MVT::v16i16, 3 }, // vpand + vpandn + vpor { TTI::SK_Select, MVT::v16i16, 3 }, // vpand + vpandn + vpor
{ TTI::SK_Alternate, MVT::v32i8, 3 }, // vpand + vpandn + vpor { TTI::SK_Select, MVT::v32i8, 3 }, // vpand + vpandn + vpor
{ TTI::SK_PermuteSingleSrc, MVT::v4f64, 3 }, // 2*vperm2f128 + vshufpd { TTI::SK_PermuteSingleSrc, MVT::v4f64, 3 }, // 2*vperm2f128 + vshufpd
{ TTI::SK_PermuteSingleSrc, MVT::v4i64, 3 }, // 2*vperm2f128 + vshufpd { TTI::SK_PermuteSingleSrc, MVT::v4i64, 3 }, // 2*vperm2f128 + vshufpd
{ TTI::SK_PermuteSingleSrc, MVT::v8f32, 4 }, // 2*vperm2f128 + 2*vshufps { TTI::SK_PermuteSingleSrc, MVT::v8f32, 4 }, // 2*vperm2f128 + 2*vshufps
{ TTI::SK_PermuteSingleSrc, MVT::v8i32, 4 }, // 2*vperm2f128 + 2*vshufps { TTI::SK_PermuteSingleSrc, MVT::v8i32, 4 }, // 2*vperm2f128 + 2*vshufps
{ TTI::SK_PermuteSingleSrc, MVT::v16i16, 8 }, // vextractf128 + 4*pshufb { TTI::SK_PermuteSingleSrc, MVT::v16i16, 8 }, // vextractf128 + 4*pshufb
// + 2*por + vinsertf128 // + 2*por + vinsertf128
{ TTI::SK_PermuteSingleSrc, MVT::v32i8, 8 }, // vextractf128 + 4*pshufb { TTI::SK_PermuteSingleSrc, MVT::v32i8, 8 }, // vextractf128 + 4*pshufb
Show All 9 Lines static const CostTblEntry AVX1ShuffleTbl[] = {
// + 4*por + vinsertf128 // + 4*por + vinsertf128
}; };
if (ST->hasAVX()) if (ST->hasAVX())
if (const auto *Entry = CostTableLookup(AVX1ShuffleTbl, Kind, LT.second)) if (const auto *Entry = CostTableLookup(AVX1ShuffleTbl, Kind, LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
static const CostTblEntry SSE41ShuffleTbl[] = { static const CostTblEntry SSE41ShuffleTbl[] = {
{ TTI::SK_Alternate, MVT::v2i64, 1 }, // pblendw { TTI::SK_Select, MVT::v2i64, 1 }, // pblendw
{ TTI::SK_Alternate, MVT::v2f64, 1 }, // movsd { TTI::SK_Select, MVT::v2f64, 1 }, // movsd
{ TTI::SK_Alternate, MVT::v4i32, 1 }, // pblendw { TTI::SK_Select, MVT::v4i32, 1 }, // pblendw
{ TTI::SK_Alternate, MVT::v4f32, 1 }, // blendps { TTI::SK_Select, MVT::v4f32, 1 }, // blendps
{ TTI::SK_Alternate, MVT::v8i16, 1 }, // pblendw { TTI::SK_Select, MVT::v8i16, 1 }, // pblendw
{ TTI::SK_Alternate, MVT::v16i8, 1 } // pblendvb { TTI::SK_Select, MVT::v16i8, 1 } // pblendvb
}; };
if (ST->hasSSE41()) if (ST->hasSSE41())
if (const auto *Entry = CostTableLookup(SSE41ShuffleTbl, Kind, LT.second)) if (const auto *Entry = CostTableLookup(SSE41ShuffleTbl, Kind, LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
static const CostTblEntry SSSE3ShuffleTbl[] = { static const CostTblEntry SSSE3ShuffleTbl[] = {
{ TTI::SK_Broadcast, MVT::v8i16, 1 }, // pshufb { TTI::SK_Broadcast, MVT::v8i16, 1 }, // pshufb
{ TTI::SK_Broadcast, MVT::v16i8, 1 }, // pshufb { TTI::SK_Broadcast, MVT::v16i8, 1 }, // pshufb
{ TTI::SK_Reverse, MVT::v8i16, 1 }, // pshufb { TTI::SK_Reverse, MVT::v8i16, 1 }, // pshufb
{ TTI::SK_Reverse, MVT::v16i8, 1 }, // pshufb { TTI::SK_Reverse, MVT::v16i8, 1 }, // pshufb
{ TTI::SK_Alternate, MVT::v8i16, 3 }, // 2*pshufb + por { TTI::SK_Select, MVT::v8i16, 3 }, // 2*pshufb + por
{ TTI::SK_Alternate, MVT::v16i8, 3 }, // 2*pshufb + por { TTI::SK_Select, MVT::v16i8, 3 }, // 2*pshufb + por
{ TTI::SK_PermuteSingleSrc, MVT::v8i16, 1 }, // pshufb { TTI::SK_PermuteSingleSrc, MVT::v8i16, 1 }, // pshufb
{ TTI::SK_PermuteSingleSrc, MVT::v16i8, 1 }, // pshufb { TTI::SK_PermuteSingleSrc, MVT::v16i8, 1 }, // pshufb
{ TTI::SK_PermuteTwoSrc, MVT::v8i16, 3 }, // 2*pshufb + por { TTI::SK_PermuteTwoSrc, MVT::v8i16, 3 }, // 2*pshufb + por
{ TTI::SK_PermuteTwoSrc, MVT::v16i8, 3 }, // 2*pshufb + por { TTI::SK_PermuteTwoSrc, MVT::v16i8, 3 }, // 2*pshufb + por
}; };
Show All 10 Lines static const CostTblEntry SSE2ShuffleTbl[] = {
{ TTI::SK_Reverse, MVT::v2f64, 1 }, // shufpd { TTI::SK_Reverse, MVT::v2f64, 1 }, // shufpd
{ TTI::SK_Reverse, MVT::v2i64, 1 }, // pshufd { TTI::SK_Reverse, MVT::v2i64, 1 }, // pshufd
{ TTI::SK_Reverse, MVT::v4i32, 1 }, // pshufd { TTI::SK_Reverse, MVT::v4i32, 1 }, // pshufd
{ TTI::SK_Reverse, MVT::v8i16, 3 }, // pshuflw + pshufhw + pshufd { TTI::SK_Reverse, MVT::v8i16, 3 }, // pshuflw + pshufhw + pshufd
{ TTI::SK_Reverse, MVT::v16i8, 9 }, // 2*pshuflw + 2*pshufhw { TTI::SK_Reverse, MVT::v16i8, 9 }, // 2*pshuflw + 2*pshufhw
// + 2*pshufd + 2*unpck + packus // + 2*pshufd + 2*unpck + packus
{ TTI::SK_Alternate, MVT::v2i64, 1 }, // movsd { TTI::SK_Select, MVT::v2i64, 1 }, // movsd
{ TTI::SK_Alternate, MVT::v2f64, 1 }, // movsd { TTI::SK_Select, MVT::v2f64, 1 }, // movsd
{ TTI::SK_Alternate, MVT::v4i32, 2 }, // 2*shufps { TTI::SK_Select, MVT::v4i32, 2 }, // 2*shufps
{ TTI::SK_Alternate, MVT::v8i16, 3 }, // pand + pandn + por { TTI::SK_Select, MVT::v8i16, 3 }, // pand + pandn + por
{ TTI::SK_Alternate, MVT::v16i8, 3 }, // pand + pandn + por { TTI::SK_Select, MVT::v16i8, 3 }, // pand + pandn + por
{ TTI::SK_PermuteSingleSrc, MVT::v2f64, 1 }, // shufpd { TTI::SK_PermuteSingleSrc, MVT::v2f64, 1 }, // shufpd
{ TTI::SK_PermuteSingleSrc, MVT::v2i64, 1 }, // pshufd { TTI::SK_PermuteSingleSrc, MVT::v2i64, 1 }, // pshufd
{ TTI::SK_PermuteSingleSrc, MVT::v4i32, 1 }, // pshufd { TTI::SK_PermuteSingleSrc, MVT::v4i32, 1 }, // pshufd
{ TTI::SK_PermuteSingleSrc, MVT::v8i16, 5 }, // 2*pshuflw + 2*pshufhw { TTI::SK_PermuteSingleSrc, MVT::v8i16, 5 }, // 2*pshuflw + 2*pshufhw
// + pshufd/unpck // + pshufd/unpck
{ TTI::SK_PermuteSingleSrc, MVT::v16i8, 10 }, // 2*pshuflw + 2*pshufhw { TTI::SK_PermuteSingleSrc, MVT::v16i8, 10 }, // 2*pshuflw + 2*pshufhw
// + 2*pshufd + 2*unpck + 2*packus // + 2*pshufd + 2*unpck + 2*packus
{ TTI::SK_PermuteTwoSrc, MVT::v2f64, 1 }, // shufpd { TTI::SK_PermuteTwoSrc, MVT::v2f64, 1 }, // shufpd
{ TTI::SK_PermuteTwoSrc, MVT::v2i64, 1 }, // shufpd { TTI::SK_PermuteTwoSrc, MVT::v2i64, 1 }, // shufpd
{ TTI::SK_PermuteTwoSrc, MVT::v4i32, 2 }, // 2*{unpck,movsd,pshufd} { TTI::SK_PermuteTwoSrc, MVT::v4i32, 2 }, // 2*{unpck,movsd,pshufd}
{ TTI::SK_PermuteTwoSrc, MVT::v8i16, 8 }, // blend+permute { TTI::SK_PermuteTwoSrc, MVT::v8i16, 8 }, // blend+permute
{ TTI::SK_PermuteTwoSrc, MVT::v16i8, 13 }, // blend+permute { TTI::SK_PermuteTwoSrc, MVT::v16i8, 13 }, // blend+permute
}; };
if (ST->hasSSE2()) if (ST->hasSSE2())
if (const auto *Entry = CostTableLookup(SSE2ShuffleTbl, Kind, LT.second)) if (const auto *Entry = CostTableLookup(SSE2ShuffleTbl, Kind, LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
static const CostTblEntry SSE1ShuffleTbl[] = { static const CostTblEntry SSE1ShuffleTbl[] = {
{ TTI::SK_Broadcast, MVT::v4f32, 1 }, // shufps { TTI::SK_Broadcast, MVT::v4f32, 1 }, // shufps
{ TTI::SK_Reverse, MVT::v4f32, 1 }, // shufps { TTI::SK_Reverse, MVT::v4f32, 1 }, // shufps
{ TTI::SK_Alternate, MVT::v4f32, 2 }, // 2*shufps { TTI::SK_Select, MVT::v4f32, 2 }, // 2*shufps
{ TTI::SK_PermuteSingleSrc, MVT::v4f32, 1 }, // shufps { TTI::SK_PermuteSingleSrc, MVT::v4f32, 1 }, // shufps
{ TTI::SK_PermuteTwoSrc, MVT::v4f32, 2 }, // 2*shufps { TTI::SK_PermuteTwoSrc, MVT::v4f32, 2 }, // 2*shufps
}; };
if (ST->hasSSE1()) if (ST->hasSSE1())
if (const auto *Entry = CostTableLookup(SSE1ShuffleTbl, Kind, LT.second)) if (const auto *Entry = CostTableLookup(SSE1ShuffleTbl, Kind, LT.second))
return LT.first * Entry->Cost; return LT.first * Entry->Cost;
▲ Show 20 Lines • Show All 841 Lines • ▼ Show 20 Linesint X86TTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *SrcTy,
// Legalize the type. // Legalize the type.
std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, SrcVTy); std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, SrcVTy);
auto VT = TLI->getValueType(DL, SrcVTy); auto VT = TLI->getValueType(DL, SrcVTy);
int Cost = 0; int Cost = 0;
if (VT.isSimple() && LT.second != VT.getSimpleVT() && if (VT.isSimple() && LT.second != VT.getSimpleVT() &&
LT.second.getVectorNumElements() == NumElem) LT.second.getVectorNumElements() == NumElem)
// Promotion requires expand/truncate for data and a shuffle for mask. // Promotion requires expand/truncate for data and a shuffle for mask.
Cost += getShuffleCost(TTI::SK_Alternate, SrcVTy, 0, nullptr) + Cost += getShuffleCost(TTI::SK_Select, SrcVTy, 0, nullptr) +
getShuffleCost(TTI::SK_Alternate, MaskTy, 0, nullptr); getShuffleCost(TTI::SK_Select, MaskTy, 0, nullptr);
else if (LT.second.getVectorNumElements() > NumElem) { else if (LT.second.getVectorNumElements() > NumElem) {
VectorType *NewMaskTy = VectorType::get(MaskTy->getVectorElementType(), VectorType *NewMaskTy = VectorType::get(MaskTy->getVectorElementType(),
LT.second.getVectorNumElements()); LT.second.getVectorNumElements());
// Expanding requires fill mask with zeroes // Expanding requires fill mask with zeroes
Cost += getShuffleCost(TTI::SK_InsertSubvector, NewMaskTy, 0, MaskTy); Cost += getShuffleCost(TTI::SK_InsertSubvector, NewMaskTy, 0, MaskTy);
} }
if (!ST->hasAVX512()) if (!ST->hasAVX512())
▲ Show 20 Lines • Show All 966 Lines • Show Last 20 Lines

llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp

Show First 20 Lines • Show All 307 Lines • ▼ Show 20 Lines for (unsigned I = 0, E = VL.size(); I < E; ++I) {
// operation - permutation. // operation - permutation.
if (CommonShuffleMode != CurrentShuffleMode) if (CommonShuffleMode != CurrentShuffleMode)
CommonShuffleMode = Permute; CommonShuffleMode = Permute;
} }
// If we're not crossing lanes in different vectors, consider it as blending. // If we're not crossing lanes in different vectors, consider it as blending.
if ((CommonShuffleMode == FirstAlternate || if ((CommonShuffleMode == FirstAlternate ||
CommonShuffleMode == SecondAlternate) && CommonShuffleMode == SecondAlternate) &&
Vec2) Vec2)
return TargetTransformInfo::SK_Alternate; return TargetTransformInfo::SK_Select;
// If Vec2 was never used, we have a permutation of a single vector, otherwise // If Vec2 was never used, we have a permutation of a single vector, otherwise
// we have permutation of 2 vectors. // we have permutation of 2 vectors.
return Vec2 ? TargetTransformInfo::SK_PermuteTwoSrc return Vec2 ? TargetTransformInfo::SK_PermuteTwoSrc
: TargetTransformInfo::SK_PermuteSingleSrc; : TargetTransformInfo::SK_PermuteSingleSrc;
} }
///\returns Opcode that can be clubbed with \p Op to create an alternate ///\returns Opcode that can be clubbed with \p Op to create an alternate
/// sequence which can later be merged as a ShuffleVector instruction. /// sequence which can later be merged as a ShuffleVector instruction.
▲ Show 20 Lines • Show All 2,131 Lines • ▼ Show 20 Lines case Instruction::ShuffleVector: {
// VecCost is equal to sum of the cost of creating 2 vectors // VecCost is equal to sum of the cost of creating 2 vectors
// and the cost of creating shuffle. // and the cost of creating shuffle.
Instruction *I0 = cast<Instruction>(VL[0]); Instruction *I0 = cast<Instruction>(VL[0]);
VecCost = VecCost =
TTI->getArithmeticInstrCost(I0->getOpcode(), VecTy, Op1VK, Op2VK); TTI->getArithmeticInstrCost(I0->getOpcode(), VecTy, Op1VK, Op2VK);
Instruction *I1 = cast<Instruction>(VL[1]); Instruction *I1 = cast<Instruction>(VL[1]);
VecCost += VecCost +=
TTI->getArithmeticInstrCost(I1->getOpcode(), VecTy, Op1VK, Op2VK); TTI->getArithmeticInstrCost(I1->getOpcode(), VecTy, Op1VK, Op2VK);
VecCost += VecCost += TTI->getShuffleCost(TargetTransformInfo::SK_Select, VecTy, 0);
TTI->getShuffleCost(TargetTransformInfo::SK_Alternate, VecTy, 0);
return ReuseShuffleCost + VecCost - ScalarCost; return ReuseShuffleCost + VecCost - ScalarCost;
} }
default: default:
llvm_unreachable("Unknown instruction"); llvm_unreachable("Unknown instruction");
} }
} }
bool BoUpSLP::isFullyVectorizableTinyTree() { bool BoUpSLP::isFullyVectorizableTinyTree() {
▲ Show 20 Lines • Show All 3,991 Lines • Show Last 20 Lines

llvm/trunk/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll

Show First 20 Lines • Show All 194 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
; ;
%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
ret <4 x i32> %1 ret <4 x i32> %1
} }
define <4 x i32> @test_v4i32_3(<4 x i32> %a, <4 x i32> %b) { define <4 x i32> @test_v4i32_3(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: 'test_v4i32_3' ; SSE2-LABEL: 'test_v4i32_3'
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3> ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
;
; SSSE3-LABEL: 'test_v4i32_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
;
; SSE42-LABEL: 'test_v4i32_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
;
; AVX-LABEL: 'test_v4i32_3'
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
; ;
; BTVER2-LABEL: 'test_v4i32_3' ; BTVER2-LABEL: 'test_v4i32_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1
; ;
%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3> %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
ret <4 x i32> %1 ret <4 x i32> %1
} }
define <4 x float> @test_v4f32(<4 x float> %a, <4 x float> %b) { define <4 x float> @test_v4f32(<4 x float> %a, <4 x float> %b) {
; SSE2-LABEL: 'test_v4f32' ; SSE2-LABEL: 'test_v4f32'
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
; ;
%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
ret <4 x float> %1 ret <4 x float> %1
} }
define <4 x float> @test_v4f32_3(<4 x float> %a, <4 x float> %b) { define <4 x float> @test_v4f32_3(<4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: 'test_v4f32_3' ; SSE2-LABEL: 'test_v4f32_3'
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3> ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
;
; SSSE3-LABEL: 'test_v4f32_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
;
; SSE42-LABEL: 'test_v4f32_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
;
; AVX-LABEL: 'test_v4f32_3'
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
; ;
; BTVER2-LABEL: 'test_v4f32_3' ; BTVER2-LABEL: 'test_v4f32_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1
; ;
%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3> %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
ret <4 x float> %1 ret <4 x float> %1
} }
define <4 x i64> @test_v4i64(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @test_v4i64(<4 x i64> %a, <4 x i64> %b) {
; SSE-LABEL: 'test_v4i64' ; SSE-LABEL: 'test_v4i64'
Show All 26 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
; ;
%1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
ret <4 x i64> %1 ret <4 x i64> %1
} }
define <4 x i64> @test_v4i64_3(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @test_v4i64_3(<4 x i64> %a, <4 x i64> %b) {
; SSE-LABEL: 'test_v4i64_3' ; SSE-LABEL: 'test_v4i64_3'
; SSE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
; ;
; AVX1-LABEL: 'test_v4i64_3' ; AVX-LABEL: 'test_v4i64_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
;
; AVX2-LABEL: 'test_v4i64_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
;
; XOPAVX1-LABEL: 'test_v4i64_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
;
; XOPAVX2-LABEL: 'test_v4i64_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
; ;
; BTVER2-LABEL: 'test_v4i64_3' ; BTVER2-LABEL: 'test_v4i64_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1
; ;
%1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3> %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
ret <4 x i64> %1 ret <4 x i64> %1
} }
define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) { define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) {
; SSE-LABEL: 'test_v4f64' ; SSE-LABEL: 'test_v4f64'
Show All 26 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
; ;
%1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3> %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
ret <4 x double> %1 ret <4 x double> %1
} }
define <4 x double> @test_v4f64_3(<4 x double> %a, <4 x double> %b) { define <4 x double> @test_v4f64_3(<4 x double> %a, <4 x double> %b) {
; SSE-LABEL: 'test_v4f64_3' ; SSE-LABEL: 'test_v4f64_3'
; SSE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3> ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
; ;
; AVX1-LABEL: 'test_v4f64_3' ; AVX-LABEL: 'test_v4f64_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
;
; AVX2-LABEL: 'test_v4f64_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
;
; XOPAVX1-LABEL: 'test_v4f64_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
;
; XOPAVX2-LABEL: 'test_v4f64_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
; ;
; BTVER2-LABEL: 'test_v4f64_3' ; BTVER2-LABEL: 'test_v4f64_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1
; ;
%1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3> %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
ret <4 x double> %1 ret <4 x double> %1
} }
; Test shuffles on packed vectors of eight elements. ; Test shuffles on packed vectors of eight elements.
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
%1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
ret <8 x i16> %1 ret <8 x i16> %1
} }
define <8 x i16> @test_v8i16_3(<8 x i16> %a, <8 x i16> %b) { define <8 x i16> @test_v8i16_3(<8 x i16> %a, <8 x i16> %b) {
; SSE2-LABEL: 'test_v8i16_3' ; SSE2-LABEL: 'test_v8i16_3'
; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
; SSSE3-LABEL: 'test_v8i16_3' ; SSSE3-LABEL: 'test_v8i16_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
; SSE42-LABEL: 'test_v8i16_3' ; SSE42-LABEL: 'test_v8i16_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
; AVX1-LABEL: 'test_v8i16_3' ; AVX-LABEL: 'test_v8i16_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
;
; AVX2-LABEL: 'test_v8i16_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
;
; XOPAVX1-LABEL: 'test_v8i16_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
;
; XOPAVX2-LABEL: 'test_v8i16_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
; BTVER2-LABEL: 'test_v8i16_3' ; BTVER2-LABEL: 'test_v8i16_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1
; ;
%1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
ret <8 x i16> %1 ret <8 x i16> %1
} }
define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) {
; SSE2-LABEL: 'test_v8i32' ; SSE2-LABEL: 'test_v8i32'
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
%1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
ret <8 x i32> %1 ret <8 x i32> %1
} }
define <8 x i32> @test_v8i32_3(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @test_v8i32_3(<8 x i32> %a, <8 x i32> %b) {
; SSE-LABEL: 'test_v8i32_3' ; SSE2-LABEL: 'test_v8i32_3'
; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
; AVX1-LABEL: 'test_v8i32_3' ; SSSE3-LABEL: 'test_v8i32_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
; AVX2-LABEL: 'test_v8i32_3' ; SSE42-LABEL: 'test_v8i32_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
; XOPAVX1-LABEL: 'test_v8i32_3' ; AVX-LABEL: 'test_v8i32_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
;
; XOPAVX2-LABEL: 'test_v8i32_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
; BTVER2-LABEL: 'test_v8i32_3' ; BTVER2-LABEL: 'test_v8i32_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1
; ;
%1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
ret <8 x i32> %1 ret <8 x i32> %1
} }
define <8 x float> @test_v8f32(<8 x float> %a, <8 x float> %b) { define <8 x float> @test_v8f32(<8 x float> %a, <8 x float> %b) {
; SSE2-LABEL: 'test_v8f32' ; SSE2-LABEL: 'test_v8f32'
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
%1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7> %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7>
ret <8 x float> %1 ret <8 x float> %1
} }
define <8 x float> @test_v8f32_3(<8 x float> %a, <8 x float> %b) { define <8 x float> @test_v8f32_3(<8 x float> %a, <8 x float> %b) {
; SSE-LABEL: 'test_v8f32_3' ; SSE2-LABEL: 'test_v8f32_3'
; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
; AVX1-LABEL: 'test_v8f32_3' ; SSSE3-LABEL: 'test_v8f32_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
; AVX2-LABEL: 'test_v8f32_3' ; SSE42-LABEL: 'test_v8f32_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
; XOPAVX1-LABEL: 'test_v8f32_3' ; AVX-LABEL: 'test_v8f32_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
;
; XOPAVX2-LABEL: 'test_v8f32_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
; BTVER2-LABEL: 'test_v8f32_3' ; BTVER2-LABEL: 'test_v8f32_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1
; ;
%1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15> %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 15>
ret <8 x float> %1 ret <8 x float> %1
} }
; Test shuffles on packed vectors of sixteen elements. ; Test shuffles on packed vectors of sixteen elements.
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
%1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15> %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15>
ret <16 x i8> %1 ret <16 x i8> %1
} }
define <16 x i8> @test_v16i8_3(<16 x i8> %a, <16 x i8> %b) { define <16 x i8> @test_v16i8_3(<16 x i8> %a, <16 x i8> %b) {
; SSE2-LABEL: 'test_v16i8_3' ; SSE2-LABEL: 'test_v16i8_3'
; SSE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
; SSSE3-LABEL: 'test_v16i8_3' ; SSSE3-LABEL: 'test_v16i8_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
; SSE42-LABEL: 'test_v16i8_3' ; SSE42-LABEL: 'test_v16i8_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
; AVX1-LABEL: 'test_v16i8_3' ; AVX-LABEL: 'test_v16i8_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
;
; AVX2-LABEL: 'test_v16i8_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
;
; XOPAVX1-LABEL: 'test_v16i8_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
;
; XOPAVX2-LABEL: 'test_v16i8_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
; BTVER2-LABEL: 'test_v16i8_3' ; BTVER2-LABEL: 'test_v16i8_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1
; ;
%1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
ret <16 x i8> %1 ret <16 x i8> %1
} }
define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) { define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) {
; SSE2-LABEL: 'test_v16i16' ; SSE2-LABEL: 'test_v16i16'
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
%1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15> %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15>
ret <16 x i16> %1 ret <16 x i16> %1
} }
define <16 x i16> @test_v16i16_3(<16 x i16> %a, <16 x i16> %b) { define <16 x i16> @test_v16i16_3(<16 x i16> %a, <16 x i16> %b) {
; SSE2-LABEL: 'test_v16i16_3' ; SSE2-LABEL: 'test_v16i16_3'
; SSE2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; SSSE3-LABEL: 'test_v16i16_3' ; SSSE3-LABEL: 'test_v16i16_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; SSE42-LABEL: 'test_v16i16_3' ; SSE42-LABEL: 'test_v16i16_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; AVX1-LABEL: 'test_v16i16_3' ; AVX1-LABEL: 'test_v16i16_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; AVX2-LABEL: 'test_v16i16_3' ; AVX2-LABEL: 'test_v16i16_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; XOPAVX1-LABEL: 'test_v16i16_3' ; XOPAVX1-LABEL: 'test_v16i16_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; XOPAVX2-LABEL: 'test_v16i16_3' ; XOPAVX2-LABEL: 'test_v16i16_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
; BTVER2-LABEL: 'test_v16i16_3' ; BTVER2-LABEL: 'test_v16i16_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1
; ;
%1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31> %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 29, i32 30, i32 31>
ret <16 x i16> %1 ret <16 x i16> %1
} }
define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) { define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) {
; SSE2-LABEL: 'test_v32i8' ; SSE2-LABEL: 'test_v32i8'
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
%1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 32, i32 1, i32 34, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 29, i32 62, i32 31> %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 32, i32 1, i32 34, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 29, i32 62, i32 31>
ret <32 x i8> %1 ret <32 x i8> %1
} }
define <32 x i8> @test_v32i8_3(<32 x i8> %a, <32 x i8> %b) { define <32 x i8> @test_v32i8_3(<32 x i8> %a, <32 x i8> %b) {
; SSE2-LABEL: 'test_v32i8_3' ; SSE2-LABEL: 'test_v32i8_3'
; SSE2-NEXT: Cost Model: Found an estimated cost of 78 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; SSSE3-LABEL: 'test_v32i8_3' ; SSSE3-LABEL: 'test_v32i8_3'
; SSSE3-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; SSE42-LABEL: 'test_v32i8_3' ; SSE42-LABEL: 'test_v32i8_3'
; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; AVX1-LABEL: 'test_v32i8_3' ; AVX1-LABEL: 'test_v32i8_3'
; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; AVX2-LABEL: 'test_v32i8_3' ; AVX2-LABEL: 'test_v32i8_3'
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; XOPAVX1-LABEL: 'test_v32i8_3' ; XOPAVX1-LABEL: 'test_v32i8_3'
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; XOPAVX2-LABEL: 'test_v32i8_3' ; XOPAVX2-LABEL: 'test_v32i8_3'
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
; BTVER2-LABEL: 'test_v32i8_3' ; BTVER2-LABEL: 'test_v32i8_3'
; BTVER2-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> ; BTVER2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1
; ;
%1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63> %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 36, i32 5, i32 38, i32 7, i32 40, i32 9, i32 42, i32 11, i32 44, i32 13, i32 46, i32 15, i32 48, i32 17, i32 50, i32 19, i32 52, i32 21, i32 54, i32 23, i32 56, i32 25, i32 58, i32 27, i32 60, i32 61, i32 62, i32 63>
ret <32 x i8> %1 ret <32 x i8> %1
} }