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Differential D47873

[AArch64] Tighten up directives tests
ClosedPublic

Authored by bogden on Jun 7 2018, 4:20 AM.

Details

Reviewers
compnerd
javed.absar
fhahn
Commits
rG56c6e7015b6c: [AArch64] Tighten up directives tests
rL335586: [AArch64] Tighten up directives tests
Summary

Move expected-fail cases from directive-cpu.s to
directive-cpu-err.s. This allows us to remove the 'not' from the
llvm-mc invocation in directive-cpu.s so that this test will fail
in unexpected error cases. It also means that we are not relying
on all stderr coming before any stdout, which seems fragile.

Also make use of CHECK-NEXT to ensure that multiline error messages
really are occuring together.

Diff Detail

Repository
rL LLVM

Event Timeline

bogden created this revision.Jun 7 2018, 4:20 AM
Herald added a reviewer: javed.absar. · View Herald TranscriptJun 7 2018, 4:20 AM
Herald added subscribers: llvm-commits, kristof.beyls. · View Herald Transcript
bogden added a parent revision: D47872: [AArch64] Clean up LSE directive tests.Jun 7 2018, 4:25 AM
fhahn mentioned this in D47872: [AArch64] Clean up LSE directive tests.Jun 7 2018, 4:52 AM
compnerd accepted this revision.Jun 12 2018, 4:22 PM

Nice cleanup! Thanks for doing this

This revision is now accepted and ready to land.Jun 12 2018, 4:22 PM
bogden updated this revision to Diff 152258.Jun 21 2018, 5:15 AM

Add test that arch is not an acceptable cpu extension, as requested by fhahn

fhahn accepted this revision.Jun 21 2018, 5:21 AM
fhahn added a subscriber: fhahn.

LGTM thanks.

Closed by commit rL335586: [AArch64] Tighten up directives tests (authored by bogden). · Explain WhyJun 26 2018, 2:54 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
MC/
AArch64/
24 lines
35 lines
45 lines

Diff 152861

llvm/trunk/test/MC/AArch64/directive-arch-negative.s

// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s // RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
.arch axp64 .arch axp64
# CHECK: error: unknown arch name # CHECK: error: unknown arch name
# CHECK: .arch axp64 # CHECK-NEXT: .arch axp64
# CHECK: ^ # CHECK-NEXT: ^
.arch armv8 .arch armv8
aese v0.8h, v1.8h aese v0.8h, v1.8h
# CHECK: error: invalid operand for instruction # CHECK: error: invalid operand for instruction
# CHECK: aese v0.8h, v1.8h # CHECK-NEXT: aese v0.8h, v1.8h
# CHECK: ^ # CHECK-NEXT: ^
// We silently ignore invalid features. // We silently ignore invalid features.
.arch armv8+foo .arch armv8+foo
aese v0.8h, v1.8h aese v0.8h, v1.8h
# CHECK: error: invalid operand for instruction # CHECK: error: invalid operand for instruction
# CHECK: aese v0.8h, v1.8h # CHECK-NEXT: aese v0.8h, v1.8h
# CHECK: ^ # CHECK-NEXT: ^
.arch armv8+crypto .arch armv8+crypto
.arch armv8 .arch armv8
aese v0.8h, v1.8h aese v0.8h, v1.8h
# CHECK: error: invalid operand for instruction # CHECK: error: invalid operand for instruction
# CHECK: aese v0.8h, v1.8h # CHECK-NEXT: aese v0.8h, v1.8h
# CHECK: ^ # CHECK-NEXT: ^
.arch armv8.1-a+noras .arch armv8.1-a+noras
esb esb
# CHECK: error: instruction requires: ras # CHECK: error: instruction requires: ras
# CHECK: esb # CHECK-NEXT: esb
// PR32873: without extra features, '.arch' is currently ignored. // PR32873: without extra features, '.arch' is currently ignored.
// Add an unrelated feature to accept the directive. // Add an unrelated feature to accept the directive.
.arch armv8+crc .arch armv8+crc
casa w5, w7, [x19] casa w5, w7, [x19]
# CHECK: error: instruction requires: lse # CHECK: error: instruction requires: lse
# CHECK: casa w5, w7, [x19] # CHECK-NEXT: casa w5, w7, [x19]
.arch armv8+crypto .arch armv8+crypto
crc32b w0, w1, w2 crc32b w0, w1, w2
# CHECK: error: instruction requires: crc # CHECK: error: instruction requires: crc
# CHECK: crc32b w0, w1, w2 # CHECK-NEXT: crc32b w0, w1, w2
.arch armv8.1-a+nolse .arch armv8.1-a+nolse
casa w5, w7, [x20] casa w5, w7, [x20]
# CHECK: error: instruction requires: lse # CHECK: error: instruction requires: lse
# CHECK: casa w5, w7, [x20] # CHECK-NEXT: casa w5, w7, [x20]

llvm/trunk/test/MC/AArch64/directive-cpu-err.s

// RUN: not llvm-mc -triple aarch64-linux-gnu %s 2> %t > /dev/null // RUN: not llvm-mc -triple aarch64-linux-gnu %s 2> %t > /dev/null
// RUN: FileCheck %s < %t // RUN: FileCheck %s < %t
.cpu invalid .cpu invalid
// CHECK: error: unknown CPU name // CHECK: error: unknown CPU name
.cpu generic+wibble+nowobble .cpu generic+wibble+nowobble
// CHECK: :[[@LINE-1]]:18: error: unsupported architectural extension // CHECK: :[[@LINE-1]]:18: error: unsupported architectural extension
// CHECK: :[[@LINE-2]]:25: error: unsupported architectural extension // CHECK: :[[@LINE-2]]:25: error: unsupported architectural extension
.cpu generic+nofp
fminnm d0, d0, d1
// CHECK: error: instruction requires: fp-armv8
// CHECK-NEXT: fminnm d0, d0, d1
// CHECK-NEXT: ^
.cpu generic+nosimd
addp v0.4s, v0.4s, v0.4s
// CHECK: error: instruction requires: neon
// CHECK-NEXT: addp v0.4s, v0.4s, v0.4s
// CHECK-NEXT: ^
.cpu generic+nocrc
crc32cx w0, w1, x3
// CHECK: error: instruction requires: crc
// CHECK-NEXT: crc32cx w0, w1, x3
// CHECK-NEXT: ^
.cpu generic+nocrypto+crc
aesd v0.16b, v2.16b
// CHECK: error: instruction requires: crypto
// CHECK-NEXT: aesd v0.16b, v2.16b
// CHECK-NEXT: ^
.cpu generic+nolse
casa w5, w7, [x20]
// CHECK: error: instruction requires: lse
// CHECK-NEXT: casa w5, w7, [x20]
// CHECK-NEXT: ^
.cpu generic+v8.1-a
// CHECK: error: unsupported architectural extension
// CHECK-NEXT: .cpu generic+v8.1-a
// CHECK-NEXT: ^

llvm/trunk/test/MC/AArch64/directive-cpu.s

// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s // RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
.cpu generic .cpu generic
fminnm d0, d0, d1 fminnm d0, d0, d1
.cpu generic+fp .cpu generic+fp
fminnm d0, d0, d1 fminnm d0, d0, d1
.cpu generic+nofp
fminnm d0, d0, d1
.cpu generic+simd .cpu generic+simd
addp v0.4s, v0.4s, v0.4s addp v0.4s, v0.4s, v0.4s
.cpu generic+nosimd
addp v0.4s, v0.4s, v0.4s
.cpu generic+crc .cpu generic+crc
crc32cx w0, w1, x3 crc32cx w0, w1, x3
.cpu generic+nocrc
crc32cx w0, w1, x3
.cpu generic+crypto+nocrc .cpu generic+crypto+nocrc
aesd v0.16b, v2.16b aesd v0.16b, v2.16b
.cpu generic+nocrypto+crc
aesd v0.16b, v2.16b
.cpu generic+nolse
casa w5, w7, [x20]
.cpu generic+lse .cpu generic+lse
casa w5, w7, [x20] casa w5, w7, [x20]
// NOTE: the errors precede the actual output! The errors appear in order
// though, so validate by hoisting them to the top and preservering relative
// ordering
// CHECK: error: instruction requires: fp-armv8
// CHECK: fminnm d0, d0, d1
// CHECK: ^
// CHECK: error: instruction requires: neon
// CHECK: addp v0.4s, v0.4s, v0.4s
// CHECK: ^
// CHECK: error: instruction requires: crc
// CHECK: crc32cx w0, w1, x3
// CHECK: ^
// CHECK: error: instruction requires: crypto
// CHECK: aesd v0.16b, v2.16b
// CHECK: ^
// CHECK: error: instruction requires: lse
// CHECK: casa w5, w7, [x20]
// CHECK: ^
// CHECK: fminnm d0, d0, d1 // CHECK: fminnm d0, d0, d1
// CHECK: fminnm d0, d0, d1 // CHECK: fminnm d0, d0, d1
// CHECK: addp v0.4s, v0.4s, v0.4s // CHECK: addp v0.4s, v0.4s, v0.4s
// CHECK: crc32cx w0, w1, x3 // CHECK: crc32cx w0, w1, x3
// CHECK: aesd v0.16b, v2.16b // CHECK: aesd v0.16b, v2.16b
// CHECK: casa w5, w7, [x20] // CHECK: casa w5, w7, [x20]