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Differential D47872

[AArch64] Clean up LSE directive tests
ClosedPublic

Authored by bogden on Jun 7 2018, 4:15 AM.

Details

Reviewers
compnerd
javed.absar
fhahn
Commits
rG15aa0db05204: [AArch64] Clean up LSE directive tests
rL335585: [AArch64] Clean up LSE directive tests
Summary

These were specifying an architecture version with .cpu directive,
which is invalid. As the error for this case outputs the problem
instruction we were still matching the expectations of FileCheck.

This patch fixes up the LSE tests to do what they seem to intend. A
follow-up patch will tighten up the directive tests.

Diff Detail

Repository
rL LLVM

Event Timeline

bogden created this revision.Jun 7 2018, 4:15 AM
Herald added a reviewer: javed.absar. · View Herald TranscriptJun 7 2018, 4:15 AM
Herald added subscribers: llvm-commits, kristof.beyls. · View Herald Transcript
bogden added a child revision: D47873: [AArch64] Tighten up directives tests.Jun 7 2018, 4:25 AM
fhahn added a reviewer: fhahn.Jun 7 2018, 4:52 AM
fhahn added a subscriber: fhahn.

It would be great if you could add the test with .cpu generic+v8.1-a as a negative test in D47873

test/MC/AArch64/directive-arch.s
11 ↗(On Diff #150292)

armv8.1-a does imply LSE, right? So would it be better to test .arch armv8-a+lse and .arch armv8.1-a?

bogden added a comment.Jun 21 2018, 5:12 AM
In D47872#1124809, @fhahn wrote:

It would be great if you could add the test with .cpu generic+v8.1-a as a negative test in D47873

Coming soon...

test/MC/AArch64/directive-arch.s
11 ↗(On Diff #150292)

Good catch. Fixed patch coming.

bogden updated this revision to Diff 152257.Jun 21 2018, 5:13 AM

Test LSE as an extension for v8-a and as an implied feature of v8.1-a.

fhahn accepted this revision.Jun 21 2018, 5:20 AM

LGTM, thanks!

This revision is now accepted and ready to land.Jun 21 2018, 5:20 AM
Closed by commit rL335585: [AArch64] Clean up LSE directive tests (authored by bogden). · Explain WhyJun 26 2018, 2:40 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
MC/
AArch64/
9 lines
4 lines

Diff 152860

llvm/trunk/test/MC/AArch64/directive-arch.s

// RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s // RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
.arch armv8-a+crypto .arch armv8-a+crypto
aesd v0.16b, v2.16b aesd v0.16b, v2.16b
eor v0.16b, v0.16b, v2.16b eor v0.16b, v0.16b, v2.16b
# CHECK: aesd v0.16b, v2.16b # CHECK: aesd v0.16b, v2.16b
# CHECK: eor v0.16b, v0.16b, v2.16b # CHECK: eor v0.16b, v0.16b, v2.16b
// PR32873: without extra features, '.arch' is currently ignored.
// Add an unrelated feature to accept the directive.
.arch armv8.1-a+crypto
casa w5, w7, [x20]
# CHECK: casa w5, w7, [x20]
.arch armv8-a+lse
casa w5, w7, [x20]
# CHECK: casa w5, w7, [x20]

llvm/trunk/test/MC/AArch64/directive-cpu.s

Show All 30 Lines// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
.cpu generic+crypto+nocrc .cpu generic+crypto+nocrc
aesd v0.16b, v2.16b aesd v0.16b, v2.16b
.cpu generic+nocrypto+crc .cpu generic+nocrypto+crc
aesd v0.16b, v2.16b aesd v0.16b, v2.16b
.cpu generic+v8.1a+nolse .cpu generic+nolse
casa w5, w7, [x20] casa w5, w7, [x20]
.cpu generic+v8.1a+lse .cpu generic+lse
casa w5, w7, [x20] casa w5, w7, [x20]
// NOTE: the errors precede the actual output! The errors appear in order // NOTE: the errors precede the actual output! The errors appear in order
// though, so validate by hoisting them to the top and preservering relative // though, so validate by hoisting them to the top and preservering relative
// ordering // ordering
// CHECK: error: instruction requires: fp-armv8 // CHECK: error: instruction requires: fp-armv8
// CHECK: fminnm d0, d0, d1 // CHECK: fminnm d0, d0, d1
Show All 24 Lines