AMDGPU: Don't force the IEEE bit for Mesa compute shaders.

[bnieuwenhuizen]

Summary

Neither GL nor Vulkan have any requirements on signaling/quiet
NaNs.

[arsenm]

This needs a test (I'm pretty sure it already exists and should break with this change).

Nobody has any requirement for signaling nans, but it's unclear you actually want to do this. I think things are moving in the direction of having this on at all times.

[bnieuwenhuizen]

No tests fail with this, seems like the tests for this use CL kernels.

Reason I took a stab at disabling this is that it seems to disables some of the output modifiers:

https://github.com/llvm-mirror/llvm/blob/master/lib/Target/AMDGPU/SIFoldOperands.cpp#L994

[arsenm]

This patch should be obsolete. The default is still to enable the IEEE bit for all compute shaders, but you can override this with the amdgpu-ieee attribute

lib/Target/AMDGPU/AMDGPUSubtarget.h

bool hasFPExceptions() const {
     return FPExceptions;
   }
 
   bool enableDX10Clamp() const {
     return DX10Clamp;
   }
 
   bool enableIEEEBit(const MachineFunction &MF) const {
-    return AMDGPU::isCompute(MF.getFunction().getCallingConv());
+    return !AMDGPU::isShader(MF.getFunction().getCallingConv());
   }
 
   bool useFlatForGlobal() const {
     return FlatForGlobal;
   }
 
   /// \returns If target supports ds_read/write_b128 and user enables generation
   /// of ds_read/write_b128.