This is related to "[RFC] MC support for variant scheduling classes" in LLVM-dev.
This is an example of how the new predicates can be used in the AArch64 backend.
This is not meant to be committed.
The full RFC (including this example) can be seen at http://lists.llvm.org/pipermail/llvm-dev/2018-May/123181.html
Essentially, the new approach gives the ability to use the same semantic information for both MachineInstr and MCInst which is important for llvm-mca which operates entirely in the MCInst domain.
it may not be easier than defining two functions (one for MachineInstr, another for MCInst). In some cases it may be less obvious to read.
If you don't, then I totally agree: there is no reason why you should use the new syntax.
My idea was: rather than forcing people to define multiple TII hooks (which are semantically the same), let's give to people a tool to automatically generate them.
Not sure if this comment helps.