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Differential D46247

[LLD][ELF][AArch64] Simplify relocations sharing same encoding [NFC]
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Authored by peter.smith on Apr 30 2018, 1:48 AM.

Details

Reviewers
ruiu
• espindola
javed.absar
grimar
Commits
rG2e54353b865c: [LLD][AArch64] Simplify relocations sharing same encoding [NFC]
rL331452: [LLD][AArch64] Simplify relocations sharing same encoding [NFC]
rLLD331452: [LLD][AArch64] Simplify relocations sharing same encoding [NFC]
Summary

The code to encode the result in relocateOne for the relocations:
R_AARCH64_LD64_GOT_LO12_NC
R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
R_AARCH64_TLSDESC_LD64_LO12




is equivalent to that for R_AARCH64_LDST64_ABS_LO12_NC. This is described in the ABI as "Set the LD/ST immediate field bits [11:3] of X. No overflow check; check that X&7 =0." This is a simple refactoring change to combine into one case.
Diff Detail
Repository 
rLLD LLVM Linker 
Event Timeline
peter.smith created this revision.Apr 30 2018, 1:48 AM
Herald added a reviewer: javed.absar.  ·  View Herald TranscriptApr 30 2018, 1:48 AM
Herald added subscribers: kristof.beyls, arichardson, emaste, rengolin.  ·  View Herald Transcript
grimar accepted this revision.May 3 2018, 2:28 AM
grimar added a subscriber: grimar.
LGTM.



(It was a bit unobvious, but I agree that or32AArch64Imm(Loc, getBits(Val, 3, 11)) is an equivalent for or32le(Loc, (Val & 0xFF8) << 7).)
This revision is now accepted and ready to land.May 3 2018, 2:28 AM
Closed by commit rLLD331452: [LLD][AArch64] Simplify relocations sharing same encoding [NFC] (authored by psmith).  ·  Explain WhyMay 3 2018, 6:03 AM
This revision was automatically updated to reflect the committed changes.
Revision Contents
PathSize
ELF/
Arch/
9 lines
Diff 145007
ELF/Arch/AArch64.cpp
Show First 20 Lines • Show All 283 Lines • ▼ Show 20 Lines  case R_AARCH64_CALL26:

    or32le(Loc, (Val & 0x0FFFFFFC) >> 2);
    or32le(Loc, (Val & 0x0FFFFFFC) >> 2);

    break;
    break;

  case R_AARCH64_CONDBR19:
  case R_AARCH64_CONDBR19:

  case R_AARCH64_LD_PREL_LO19:
  case R_AARCH64_LD_PREL_LO19:

    checkAlignment(Loc, Val, 4, Type);
    checkAlignment(Loc, Val, 4, Type);

    checkInt(Loc, Val, 21, Type);
    checkInt(Loc, Val, 21, Type);

    or32le(Loc, (Val & 0x1FFFFC) << 3);
    or32le(Loc, (Val & 0x1FFFFC) << 3);

    break;
    break;

  case R_AARCH64_LD64_GOT_LO12_NC:

  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:

  case R_AARCH64_TLSDESC_LD64_LO12:

    checkAlignment(Loc, Val, 8, Type);

    or32le(Loc, (Val & 0xFF8) << 7);

    break;

  case R_AARCH64_LDST8_ABS_LO12_NC:
  case R_AARCH64_LDST8_ABS_LO12_NC:

    or32AArch64Imm(Loc, getBits(Val, 0, 11));
    or32AArch64Imm(Loc, getBits(Val, 0, 11));

    break;
    break;

  case R_AARCH64_LDST16_ABS_LO12_NC:
  case R_AARCH64_LDST16_ABS_LO12_NC:

    checkAlignment(Loc, Val, 2, Type);
    checkAlignment(Loc, Val, 2, Type);

    or32AArch64Imm(Loc, getBits(Val, 1, 11));
    or32AArch64Imm(Loc, getBits(Val, 1, 11));

    break;
    break;

  case R_AARCH64_LDST32_ABS_LO12_NC:
  case R_AARCH64_LDST32_ABS_LO12_NC:

    checkAlignment(Loc, Val, 4, Type);
    checkAlignment(Loc, Val, 4, Type);

    or32AArch64Imm(Loc, getBits(Val, 2, 11));
    or32AArch64Imm(Loc, getBits(Val, 2, 11));

    break;
    break;

  case R_AARCH64_LDST64_ABS_LO12_NC:
  case R_AARCH64_LDST64_ABS_LO12_NC:

  case R_AARCH64_LD64_GOT_LO12_NC:

  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:

  case R_AARCH64_TLSDESC_LD64_LO12:

    checkAlignment(Loc, Val, 8, Type);
    checkAlignment(Loc, Val, 8, Type);

    or32AArch64Imm(Loc, getBits(Val, 3, 11));
    or32AArch64Imm(Loc, getBits(Val, 3, 11));

    break;
    break;

  case R_AARCH64_LDST128_ABS_LO12_NC:
  case R_AARCH64_LDST128_ABS_LO12_NC:

    checkAlignment(Loc, Val, 16, Type);
    checkAlignment(Loc, Val, 16, Type);

    or32AArch64Imm(Loc, getBits(Val, 4, 11));
    or32AArch64Imm(Loc, getBits(Val, 4, 11));

    break;
    break;

  case R_AARCH64_MOVW_UABS_G0_NC:
  case R_AARCH64_MOVW_UABS_G0_NC:

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