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Be more accurate when calculating the previous instruction address on Arm.
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Authored by ikudrin on Apr 24 2018, 4:58 AM.

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Summary

Right now, we report backtraces with uneven addresses on Arm32 and Arm64.

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Looks great, thank you!

This revision is now accepted and ready to land.May 4 2018, 9:35 AM

This revision was automatically updated to reflect the committed changes.

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Size

compiler-rt/

trunk/

lib/

sanitizer_common/

9 lines

Show First 20 Lines • Show All 69 Lines • ▼ Show 20 Lines	struct StackTrace {
typedef bool (SymbolizeCallback)(const void pc, char *out_buffer,		typedef bool (SymbolizeCallback)(const void pc, char *out_buffer,
int out_size);		int out_size);
};		};

// Performance-critical, must be in the header.		// Performance-critical, must be in the header.
ALWAYS_INLINE		ALWAYS_INLINE
uptr StackTrace::GetPreviousInstructionPc(uptr pc) {		uptr StackTrace::GetPreviousInstructionPc(uptr pc) {
#if defined(__arm__)		#if defined(__arm__)
// Cancel Thumb bit.		// T32 (Thumb) branch instructions can be 16 or 32 bit long,
pc = pc & (~1);		// so we return (pc-2) in that case in order to be safe.
#endif		// For A32 mode we return (pc-4) because all instructions are 32 bit long.
#if defined(__powerpc__) \|\| defined(__powerpc64__)		return (pc - 3) & (~1);
		#elif defined(__powerpc__) \|\| defined(__powerpc64__) \|\| defined(__aarch64__)
// PCs are always 4 byte aligned.		// PCs are always 4 byte aligned.
return pc - 4;		return pc - 4;
#elif defined(__sparc__) \|\| defined(__mips__)		#elif defined(__sparc__) \|\| defined(__mips__)
return pc - 8;		return pc - 8;
#else		#else
return pc - 1;		return pc - 1;
#endif		#endif
}		}
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