[ELF][MIPS] Fix calculation of GP relative relocations in case of relocatable output

[atanasyan]

Summary

Some MIPS relocations depend on "gp" value. By default, this value has 0x7ff0 offset from a .got section. But relocatable files produced by a compiler or a linker might redefine this default value and we have to use it for a calculation of the relocation result. When we generate EXE or DSO it's trivial. Generating a relocatable output is more difficult case because the linker does calculate relocations in this case and cannot store individual "gp" values used by each input object file. As a workaround we add the "gp" value to the relocation addend.

This fixes https://llvm.org/pr31149

[grimar]

What bfd/gold do to solve this? I guess the same?

ELF/InputSection.cpp

393 ↗

(On Diff #143585)

Does not seem that test case covers all of these relocations?

404 ↗

(On Diff #143585)

I would probably make addend calculation a bit more explicit
to avoid additional variable, something like:

  int64_t Addend = getAddend<ELFT>(Rel);
  if (!RelTy::IsRela) {
    const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
    Addend += Target->getImplicitAddend(BufLoc, Type);
  }

  if (Config->EMachine == EM_MIPS && ...)
    Addend += Sec->getFile<ELFT>()->MipsGp0;
...

[atanasyan]

What bfd/gold do to solve this? I guess the same?

Yes.

ELF/InputSection.cpp

393 ↗

(On Diff #143585)

Exactly. Moreover the patch contains a bug related to non-tested functionality. I will add more tests in the updated patch.

404 ↗

(On Diff #143585)

OK

[atanasyan]

• Add more tests
• Fix handling non-zero GP0 in case of microMIPS code

[grimar]

It seems you can produce .o files you have added (mips-micro-gp0-non-zero.o, mips-n64-gp0-non-zero.o) with use of llvm-mc, right?
Can you do that in this patch? I think we generally want to avoid binaries in inputs. You might be able to test produced input objects to check they contain
non-zero gp0 if you think that makes sense.

(Would also probably be nice to do that for mips-gp0-non-zero.o in a followup).

test/ELF/mips-non-zero-gp0.s

26 ↗

(On Diff #143754)

The source code is missing.

42 ↗

(On Diff #143754)

Please move it to the first line of the test.

[atanasyan]

In D45972#1077893, @grimar wrote:

It seems you can produce .o files you have added (mips-micro-gp0-non-zero.o, mips-n64-gp0-non-zero.o) with use of llvm-mc, right?

LLD and llvm-mc both generate relocatable object files with zero GP0 value. Non-zero value appears in EXE / DSO only. That's why I have to generate the input object files using GNU as and ld.

[grimar]

In D45972#1077898, @atanasyan wrote:

In D45972#1077893, @grimar wrote:

It seems you can produce .o files you have added (mips-micro-gp0-non-zero.o, mips-n64-gp0-non-zero.o) with use of llvm-mc, right?

LLD and llvm-mc both generate relocatable object files with zero GP0 value. Non-zero value appears in EXE / DSO only. That's why I have to generate the input object files using GNU as and ld.

I see. Please add this information to the test case then (including GNU as version you use and invocation line for each object).

[atanasyan]

• Fix comments in the test file.
• Add command line and version numbers of GNU tools used to produce input test files.

[grimar]

LGTM with a nit.

test/ELF/mips-non-zero-gp0.s

10 ↗

(On Diff #143921)

I would not use test.o as there is no such file in your test case.

I suggest to explicitly list all 3 invocations here: for mips-gp0-non-zero.o, for mips-n64-gp0-non-zero.o and for mips-micro-gp0-non-zero.o. With that it is trivial to reproduce and people unfamiliar with mips like me do not need to guess where to use -mips32/elf32btsmip and where -mips64/elf64btsmip if they would want to rebuild the inputs.

[atanasyan]

Thanks for review.

lld/trunk/ELF/InputSection.cpp

if (Sym.Type == STT_SECTION) {
         continue;
       }
       SectionBase *Section = D->Section;
       if (Section == &InputSection::Discarded) {
         P->setSymbolAndType(0, 0, false);
         continue;
       }
 
-      if (RelTy::IsRela) {
-        P->r_addend =
-            Sym.getVA(getAddend<ELFT>(Rel)) - Section->getOutputSection()->Addr;
-      } else if (Config->Relocatable) {
-        const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
-        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset,
-                                    Target->getImplicitAddend(BufLoc, Type),
-                                    &Sym});
-      }
+      int64_t Addend = getAddend<ELFT>(Rel);
+      if (!RelTy::IsRela)
+        Addend = Target->getImplicitAddend(BufLoc, Type);
+
+      if (Config->EMachine == EM_MIPS && Config->Relocatable &&
+          Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL) {
+        // Some MIPS relocations depend on "gp" value. By default,
+        // this value has 0x7ff0 offset from a .got section. But
+        // relocatable files produced by a complier or a linker
+        // might redefine this default value and we must use it
+        // for a calculation of the relocation result. When we
+        // generate EXE or DSO it's trivial. Generating a relocatable
+        // output is more difficult case because the linker does
+        // not calculate relocations in this mode and loses
+        // individual "gp" values used by each input object file.
+        // As a workaround we add the "gp" value to the relocation
+        // addend and save it back to the file.
+        Addend += Sec->getFile<ELFT>()->MipsGp0;
       }
 
+      if (RelTy::IsRela)
+        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
+      else if (Config->Relocatable)
+        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
+    }
   }
 }
 
 // The ARM and AArch64 ABI handle pc-relative relocations to undefined weak
 // references specially. The general rule is that the value of the symbol in
 // this context is the address of the place P. A further special case is that
 // branch relocations to an undefined weak reference resolve to the next
 // instruction.

lld/trunk/ELF/SyntheticSections.cpp

for (InputSectionBase *Sec : Sections) {
     while (!D.empty()) {
       if (D.size() < sizeof(Elf_Mips_Options)) {
         error(Filename + ": invalid size of .MIPS.options section");
         break;
       }
 
       auto *Opt = reinterpret_cast<const Elf_Mips_Options *>(D.data());
       if (Opt->kind == ODK_REGINFO) {
-        if (Config->Relocatable && Opt->getRegInfo().ri_gp_value)
-          error(Filename + ": unsupported non-zero ri_gp_value");
         Reginfo.ri_gprmask |= Opt->getRegInfo().ri_gprmask;
         Sec->getFile<ELFT>()->MipsGp0 = Opt->getRegInfo().ri_gp_value;
         break;
       }
 
       if (!Opt->size)
         fatal(Filename + ": zero option descriptor size");
       D = D.slice(Opt->size);
MipsReginfoSection<ELFT> *MipsReginfoSection<ELFT>::create() {
   Elf_Mips_RegInfo Reginfo = {};
   for (InputSectionBase *Sec : Sections) {
     Sec->Live = false;
 
     if (Sec->Data.size() != sizeof(Elf_Mips_RegInfo)) {
       error(toString(Sec->File) + ": invalid size of .reginfo section");
       return nullptr;
     }
-    auto *R = reinterpret_cast<const Elf_Mips_RegInfo *>(Sec->Data.data());
-    if (Config->Relocatable && R->ri_gp_value)
-      error(toString(Sec->File) + ": unsupported non-zero ri_gp_value");
 
+    auto *R = reinterpret_cast<const Elf_Mips_RegInfo *>(Sec->Data.data());
     Reginfo.ri_gprmask |= R->ri_gprmask;
     Sec->getFile<ELFT>()->MipsGp0 = R->ri_gp_value;
   };
 
   return make<MipsReginfoSection<ELFT>>(Reginfo);
 }
 
 InputSection *elf::createInterpSection() {

lld/trunk/test/ELF/mips-gprel32-relocs-gp0.s

 # Check that relocatable object produced by LLD has zero gp0 value.
-# Also check an error message if input object file has non-zero gp0 value
-# and the linker generates a relocatable object.
-# mips-gp0-non-zero.o is a relocatable object produced from the asm code
-# below and linked by GNU bfd linker.
 
 # RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux %s -o %t.o
 # RUN: ld.lld -r -o %t-rel.o %t.o
 # RUN: llvm-readobj -mips-reginfo %t-rel.o | FileCheck --check-prefix=REL %s
 
 # RUN: ld.lld -shared -o %t.so %S/Inputs/mips-gp0-non-zero.o
 # RUN: llvm-readobj -mips-reginfo %t.so | FileCheck --check-prefix=DSO %s
 # RUN: llvm-objdump -s -t %t.so | FileCheck --check-prefix=DUMP %s
 
-# RUN: not ld.lld -r -o %t-rel.o %S/Inputs/mips-gp0-non-zero.o 2>&1 \
-# RUN:   | FileCheck --check-prefix=ERR %s
-
 # REQUIRES: mips
 
 # REL: GP: 0x0
 
 # DSO: GP: 0x27FF0
 
 # DUMP: Contents of section .rodata:
 # DUMP:  {{[0-9a-f]+}} ffff0004 ffff0008
 #                      ^ 0x10004 + 0x7ff0 - 0x27ff0
 #                               ^ 0x10008 + 0x7ff0 - 0x27ff0
 
 # DUMP: SYMBOL TABLE:
 # DUMP: 00010008         .text          00000000 bar
 # DUMP: 00010004         .text          00000000 foo
 # DUMP: 00027ff0         .got           00000000 .hidden _gp
 
-# ERR: error: {{.*}}mips-gp0-non-zero.o: unsupported non-zero ri_gp_value
-
   .text
   .global  __start
 __start:
   lw      $t0,%call16(__start)($gp)
 foo:
   nop
 bar:
   nop
 
   .section .rodata, "a"
 v:
   .gpword foo
   .gpword bar

lld/trunk/test/ELF/mips-non-zero-gp0.s

+# REQUIRES: mips
+
+# Check addend adjustment in case of generating a relocatable object
+# if some input files have non-zero GP0 value.
+
+# We have to use GNU as and ld.bfd 2.28 to generate relocatable object
+# files with non-zero GP0 value using the following command lines:
+#
+# as -mips32 -o test.o \
+#   && ld.bfd -m elf32btsmip -r test.o -o mips-gp0-non-zero.o
+# as -mips64 -mmicromips -o test.o \
+#   && ld.bfd -m elf64btsmip -r test.o -o mips-micro-gp0-non-zero.o
+# as -mips64 -o test.o \
+#   && ld.bfd -m elf64btsmip -r test.o -o mips-n64-gp0-non-zero.o
+
+# Source code for mips-gp0-non-zero.o:
+#   .text
+#   .global  __start
+# __start:
+#   lw      $t0,%call16(__start)($gp)
+# foo:
+#   nop
+# bar:
+#   nop
+#
+#   .section .rodata, "a"
+# v:
+#   .gpword foo
+#   .gpword bar
+
+# Source code for mips-n64-gp0-non-zero.o and mips-micro-gp0-non-zero.o:
+#   .text
+#   .global  __start
+# __start:
+# foo:
+#   lui     $gp,%hi(%neg(%gp_rel(foo)))
+
+# RUN: ld.lld -r -o %t-32.r %S/Inputs/mips-gp0-non-zero.o
+# RUN: llvm-readobj -mips-reginfo %t-32.r | FileCheck --check-prefix=GPVAL %s
+# RUN: llvm-objdump -s %t-32.r | FileCheck --check-prefix=ADDEND32 %s
+
+# RUN: ld.lld -r -o %t-64.r %S/Inputs/mips-n64-gp0-non-zero.o
+# RUN: llvm-readobj -mips-options %t-64.r | FileCheck --check-prefix=GPVAL %s
+# RUN: llvm-readobj -r %S/Inputs/mips-n64-gp0-non-zero.o %t-64.r \
+# RUN:   | FileCheck --check-prefix=ADDEND64 %s
+
+# RUN: ld.lld -r -o %t-micro.r %S/Inputs/mips-micro-gp0-non-zero.o
+# RUN: llvm-readobj -mips-options %t-micro.r | FileCheck --check-prefix=GPVAL %s
+# RUN: llvm-readobj -r %S/Inputs/mips-micro-gp0-non-zero.o %t-micro.r \
+# RUN:   | FileCheck --check-prefix=ADDENDMM %s
+
+# GPVAL: GP: 0x0
+
+# ADDEND32:      Contents of section .rodata:
+# ADDEND32-NEXT:  0000 00007ff4 00007ff8
+#                      ^ 4+GP0  ^ 8+GP0
+
+# ADDEND64: File: {{.*}}/Inputs/mips-n64-gp0-non-zero.o
+# ADDEND64: .text 0xFFFFFFFFFFFF8011
+# ADDEND64: File: {{.*}}/mips-non-zero-gp0.s.tmp-64.r
+# ADDEND64: .text 0x0
+
+# ADDENDMM: File: {{.*}}/Inputs/mips-micro-gp0-non-zero.o
+# ADDENDMM: .text 0xFFFFFFFFFFFF8012
+# ADDENDMM: File: {{.*}}/mips-non-zero-gp0.s.tmp-micro.r
+# ADDENDMM: .text 0x1